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authorKukjin Kim <kgene.kim@samsung.com>2010-01-27 02:57:07 -0500
committerBen Dooks <ben-linux@fluff.org>2010-01-27 03:43:07 -0500
commit81317960466ebd37fd958aa07993e3fea461dbe4 (patch)
treee3bfbebd233b69d426352eb7d3dc758be3997ff7 /arch/arm/plat-s5p/irq.c
parente96b234b7e9d24e50528287b881ca229b7f094b8 (diff)
ARM: S5P6440: Move common memory map definitions for S5P
1. Moved common memory map definitions for S5P such as S5P_VA_XXX into plat-s5p/include/mach/map-s5p.h from mach-s5p6440/include/mach. 2. Removed unnecessary definitions in the map.h and irq.c 3. Removed the unnecessary support for unaligned UART address 4. Renamed S5P_VA_VICx definitions as VA_VICx 5. Moved the definitons of VIC_BASE to plat-s5p/include/plat/irqs.h Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s5p/irq.c')
-rw-r--r--arch/arm/plat-s5p/irq.c5
1 files changed, 1 insertions, 4 deletions
diff --git a/arch/arm/plat-s5p/irq.c b/arch/arm/plat-s5p/irq.c
index eada40d0847d..11535a5f534e 100644
--- a/arch/arm/plat-s5p/irq.c
+++ b/arch/arm/plat-s5p/irq.c
@@ -25,9 +25,6 @@
25#include <plat/irq-vic-timer.h> 25#include <plat/irq-vic-timer.h>
26#include <plat/irq-uart.h> 26#include <plat/irq-uart.h>
27 27
28#define VIC_VAADDR(no) (S5P_VA_VIC0 + ((no)*0x10000))
29#define VIC_BASE(no) (S5P_VIC0_BASE + ((no)*32))
30
31/* 28/*
32 * Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3] 29 * Note, we make use of the fact that the parent IRQs, IRQ_UART[0..3]
33 * are consecutive when looking up the interrupt in the demux routines. 30 * are consecutive when looking up the interrupt in the demux routines.
@@ -61,7 +58,7 @@ void __init s5p_init_irq(u32 *vic, u32 num_vic)
61 58
62 /* initialize the VICs */ 59 /* initialize the VICs */
63 for (irq = 0; irq < num_vic; irq++) 60 for (irq = 0; irq < num_vic; irq++)
64 vic_init(VIC_VAADDR(irq), VIC_BASE(irq), vic[irq], 0); 61 vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0);
65 62
66 s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0); 63 s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0);
67 s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1); 64 s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1);