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authorKukjin Kim <kgene.kim@samsung.com>2010-01-14 01:29:17 -0500
committerBen Dooks <ben-linux@fluff.org>2010-01-15 05:16:08 -0500
commit209fecd1b8e65b8046efbbc8314d449e53c4c6b6 (patch)
tree5b8cc8ea137431224c22fc5cfd6dbb21dd652ed6 /arch/arm/plat-s5p/cpu.c
parentbe97162d47b2e067f9d21097650f2f0405dacc9f (diff)
ARM: S5P6440: Add new CPU initialization support
This patch adds Samsung's S5P6440 CPU support. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s5p/cpu.c')
-rw-r--r--arch/arm/plat-s5p/cpu.c90
1 files changed, 90 insertions, 0 deletions
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
new file mode 100644
index 000000000000..0895a77a2835
--- /dev/null
+++ b/arch/arm/plat-s5p/cpu.c
@@ -0,0 +1,90 @@
1/* linux/arch/arm/plat-s5p/cpu.c
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P CPU Support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/init.h>
14#include <linux/module.h>
15#include <mach/map.h>
16#include <asm/mach/arch.h>
17#include <asm/mach/map.h>
18#include <mach/regs-clock.h>
19#include <plat/cpu.h>
20#include <plat/s5p6440.h>
21
22/* table of supported CPUs */
23
24static const char name_s5p6440[] = "S5P6440";
25
26static struct cpu_table cpu_ids[] __initdata = {
27 {
28 .idcode = 0x56440100,
29 .idmask = 0xffffff00,
30 .map_io = s5p6440_map_io,
31 .init_clocks = s5p6440_init_clocks,
32 .init_uarts = s5p6440_init_uarts,
33 .init = s5p6440_init,
34 .name = name_s5p6440,
35 },
36};
37
38/* minimal IO mapping */
39
40#define UART_OFFS (S5P_PA_UART & 0xfffff)
41
42static struct map_desc s5p_iodesc[] __initdata = {
43 {
44 .virtual = (unsigned long)S5P_VA_SYSCON,
45 .pfn = __phys_to_pfn(S5P_PA_SYSCON),
46 .length = SZ_64K,
47 .type = MT_DEVICE,
48 }, {
49 .virtual = (unsigned long)(S5P_VA_UART + UART_OFFS),
50 .pfn = __phys_to_pfn(S5P_PA_UART),
51 .length = SZ_4K,
52 .type = MT_DEVICE,
53 }, {
54 .virtual = (unsigned long)S5P_VA_VIC0,
55 .pfn = __phys_to_pfn(S5P_PA_VIC0),
56 .length = SZ_16K,
57 .type = MT_DEVICE,
58 }, {
59 .virtual = (unsigned long)S5P_VA_VIC1,
60 .pfn = __phys_to_pfn(S5P_PA_VIC1),
61 .length = SZ_16K,
62 .type = MT_DEVICE,
63 }, {
64 .virtual = (unsigned long)S5P_VA_TIMER,
65 .pfn = __phys_to_pfn(S5P_PA_TIMER),
66 .length = SZ_16K,
67 .type = MT_DEVICE,
68 }, {
69 .virtual = (unsigned long)S5P_VA_GPIO,
70 .pfn = __phys_to_pfn(S5P_PA_GPIO),
71 .length = SZ_4K,
72 .type = MT_DEVICE,
73 },
74};
75
76/* read cpu identification code */
77
78void __init s5p_init_io(struct map_desc *mach_desc,
79 int size, void __iomem *cpuid_addr)
80{
81 unsigned long idcode;
82
83 /* initialize the io descriptors we need for initialization */
84 iotable_init(s5p_iodesc, ARRAY_SIZE(s5p_iodesc));
85 if (mach_desc)
86 iotable_init(mach_desc, size);
87
88 idcode = __raw_readl(cpuid_addr);
89 s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids));
90}