ARM: S5PV210: Add clock support for S5PV210

This patch adds clock support for S5PV210. This patch adds the clock
register definitions and the various system clocks in S5PV210.
Clocks that are common to other S5P SoC'c are added in the common
S5P clock support.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>

1 files changed, 13 insertions, 0 deletions

diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-s5p/clock.c
index 3d3c0f1934fc..aa96e335073b 100644
--- a/arch/arm/plat-s5p/clock.c
+++ b/arch/arm/plat-s5p/clock.c
@@ -33,6 +33,12 @@ struct clk clk_ext_xtal_mux = {
         .id             = -1,
 };
 
+static struct clk s5p_clk_27m = {
+        .name           = "clk_27m",
+        .id             = -1,
+        .rate           = 27000000,
+};
+
 /* 48MHz USB Phy clock output */
 struct clk clk_48m = {
         .name           = "clk_48m",
@@ -104,6 +110,11 @@ struct clksrc_sources clk_src_epll = {
         .nr_sources     = ARRAY_SIZE(clk_src_epll_list),
 };
 
+struct clk clk_vpll = {
+        .name           = "vpll",
+        .id             = -1,
+};
+
 int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable)
 {
         unsigned int ctrlbit = clk->ctrlbit;
@@ -118,10 +129,12 @@ int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable)
 static struct clk *s5p_clks[] __initdata = {
         &clk_ext_xtal_mux,
         &clk_48m,
+        &s5p_clk_27m,
         &clk_fout_apll,
         &clk_fout_mpll,
         &clk_fout_epll,
         &clk_arm,
+        &clk_vpll,
 };
 
 void __init s5p_register_clocks(unsigned long xtal_freq)