diff options
author | Ben Dooks <ben-linux@fluff.org> | 2008-11-21 05:36:06 -0500 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2008-12-15 16:46:25 -0500 |
commit | 7d2dbcf9faad074c52a941d01fc21eea3c95ca33 (patch) | |
tree | e06a1dc63a99afd6471d17d228a66226aa321f4d /arch/arm/plat-s3c | |
parent | 82fd8e681d60a195ce6e9fc783d0ebe7a81b1ead (diff) |
[ARM] S3C: Fix scaler1 clock rate information
The pwm-scaler0 and pwm-scaler1 clocks have their
.id field set to -1 as they are not referenced to
any specific device. However, parts of the pwm-clock
code used the .id field to identify which scaler
clock was being used.
Fix the problem by comparing against the pointer to
the clock to identify the scalers.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c')
-rw-r--r-- | arch/arm/plat-s3c/pwm-clock.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/plat-s3c/pwm-clock.c b/arch/arm/plat-s3c/pwm-clock.c index b0fcbc1fb64b..e07d82891a92 100644 --- a/arch/arm/plat-s3c/pwm-clock.c +++ b/arch/arm/plat-s3c/pwm-clock.c | |||
@@ -73,11 +73,13 @@ | |||
73 | * tclk -------------------------/ | 73 | * tclk -------------------------/ |
74 | */ | 74 | */ |
75 | 75 | ||
76 | static struct clk clk_timer_scaler[]; | ||
77 | |||
76 | static unsigned long clk_pwm_scaler_get_rate(struct clk *clk) | 78 | static unsigned long clk_pwm_scaler_get_rate(struct clk *clk) |
77 | { | 79 | { |
78 | unsigned long tcfg0 = __raw_readl(S3C2410_TCFG0); | 80 | unsigned long tcfg0 = __raw_readl(S3C2410_TCFG0); |
79 | 81 | ||
80 | if (clk->id == 1) { | 82 | if (clk == &clk_timer_scaler[1]) { |
81 | tcfg0 &= S3C2410_TCFG_PRESCALER1_MASK; | 83 | tcfg0 &= S3C2410_TCFG_PRESCALER1_MASK; |
82 | tcfg0 >>= S3C2410_TCFG_PRESCALER1_SHIFT; | 84 | tcfg0 >>= S3C2410_TCFG_PRESCALER1_SHIFT; |
83 | } else { | 85 | } else { |
@@ -114,7 +116,7 @@ static int clk_pwm_scaler_set_rate(struct clk *clk, unsigned long rate) | |||
114 | local_irq_save(flags); | 116 | local_irq_save(flags); |
115 | tcfg0 = __raw_readl(S3C2410_TCFG0); | 117 | tcfg0 = __raw_readl(S3C2410_TCFG0); |
116 | 118 | ||
117 | if (clk->id == 1) { | 119 | if (clk == &clk_timer_scaler[1]) { |
118 | tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK; | 120 | tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK; |
119 | tcfg0 |= divisor << S3C2410_TCFG_PRESCALER1_SHIFT; | 121 | tcfg0 |= divisor << S3C2410_TCFG_PRESCALER1_SHIFT; |
120 | } else { | 122 | } else { |