ARM: SAMSUNG: Reduce size of struct clk.

Reduce the size of struct clk by 12 bytes and make defining clocks with
common implementation functions easier by moving the set_rate, get_rate,
round_rate and set_parent calls into a new structure called 'struct clk_ops'
and using that instead.

This change does make a few clocks larger as they need their own clk_ops,
but this is outweighed by the number of clocks with either no ops or having
a common set of ops.

Update all the users of this.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>

2 files changed, 65 insertions, 60 deletions

diff --git a/arch/arm/plat-s3c/clock.c b/arch/arm/plat-s3c/clock.c
index 619cfa82dcab..fa91125c7e0e 100644
--- a/arch/arm/plat-s3c/clock.c
+++ b/arch/arm/plat-s3c/clock.c
@@ -150,8 +150,8 @@ unsigned long clk_get_rate(struct clk *clk)
         if (clk->rate != 0)
                 return clk->rate;
 
-        if (clk->get_rate != NULL)
-                return (clk->get_rate)(clk);
+        if (clk->ops != NULL && clk->ops->get_rate != NULL)
+                return (clk->ops->get_rate)(clk);
 
         if (clk->parent != NULL)
                 return clk_get_rate(clk->parent);
@@ -161,8 +161,8 @@ unsigned long clk_get_rate(struct clk *clk)
 
 long clk_round_rate(struct clk *clk, unsigned long rate)
 {
-        if (!IS_ERR(clk) && clk->round_rate)
-                return (clk->round_rate)(clk, rate);
+        if (!IS_ERR(clk) && clk->ops && clk->ops->round_rate)
+                return (clk->ops->round_rate)(clk, rate);
 
         return rate;
 }
@@ -178,13 +178,14 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
          * the clock may have been made this way by choice.
          */
 
-        WARN_ON(clk->set_rate == NULL);
+        WARN_ON(clk->ops == NULL);
+        WARN_ON(clk->ops && clk->ops->set_rate == NULL);
 
-        if (clk->set_rate == NULL)
+        if (clk->ops == NULL || clk->ops->set_rate == NULL)
                 return -EINVAL;
 
         spin_lock(&clocks_lock);
-        ret = (clk->set_rate)(clk, rate);
+        ret = (clk->ops->set_rate)(clk, rate);
         spin_unlock(&clocks_lock);
 
         return ret;
@@ -204,8 +205,8 @@ int clk_set_parent(struct clk *clk, struct clk *parent)
 
         spin_lock(&clocks_lock);
 
-        if (clk->set_parent)
-                ret = (clk->set_parent)(clk, parent);
+        if (clk->ops && clk->ops->set_parent)
+                ret = (clk->ops->set_parent)(clk, parent);
 
         spin_unlock(&clocks_lock);
 
@@ -230,6 +231,10 @@ static int clk_default_setrate(struct clk *clk, unsigned long rate)
         return 0;
 }
 
+static struct clk_ops clk_ops_def_setrate = {
+        .set_rate       = clk_default_setrate,
+};
+
 struct clk clk_xtal = {
         .name           = "xtal",
         .id             = -1,
@@ -251,7 +256,7 @@ struct clk clk_epll = {
 struct clk clk_mpll = {
         .name           = "mpll",
         .id             = -1,
-        .set_rate       = clk_default_setrate,
+        .ops            = &clk_ops_def_setrate,
 };
 
 struct clk clk_upll = {
@@ -267,7 +272,6 @@ struct clk clk_f = {
         .rate           = 0,
         .parent         = &clk_mpll,
         .ctrlbit        = 0,
-        .set_rate       = clk_default_setrate,
 };
 
 struct clk clk_h = {
@@ -276,7 +280,7 @@ struct clk clk_h = {
         .rate           = 0,
         .parent         = NULL,
         .ctrlbit        = 0,
-        .set_rate       = clk_default_setrate,
+        .ops            = &clk_ops_def_setrate,
 };
 
 struct clk clk_p = {
@@ -285,7 +289,7 @@ struct clk clk_p = {
         .rate           = 0,
         .parent         = NULL,
         .ctrlbit        = 0,
-        .set_rate       = clk_default_setrate,
+        .ops            = &clk_ops_def_setrate,
 };
 
 struct clk clk_usb_bus = {
@@ -296,7 +300,6 @@ struct clk clk_usb_bus = {
 };
 
 
-
 struct clk s3c24xx_uclk = {
         .name           = "uclk",
         .id             = -1,
diff --git a/arch/arm/plat-s3c/pwm-clock.c b/arch/arm/plat-s3c/pwm-clock.c
index a318215ab535..1808fa88609a 100644
--- a/arch/arm/plat-s3c/pwm-clock.c
+++ b/arch/arm/plat-s3c/pwm-clock.c
@@ -130,20 +130,22 @@ static int clk_pwm_scaler_set_rate(struct clk *clk, unsigned long rate)
         return 0;
 }
 
+static struct clk_ops clk_pwm_scaler_ops = {
+        .get_rate       = clk_pwm_scaler_get_rate,
+        .set_rate       = clk_pwm_scaler_set_rate,
+        .round_rate     = clk_pwm_scaler_round_rate,
+};
+
 static struct clk clk_timer_scaler[] = {
         [0]     = {
                 .name           = "pwm-scaler0",
                 .id             = -1,
-                .get_rate       = clk_pwm_scaler_get_rate,
-                .set_rate       = clk_pwm_scaler_set_rate,
-                .round_rate     = clk_pwm_scaler_round_rate,
+                .ops            = &clk_pwm_scaler_ops,
         },
         [1]     = {
                 .name           = "pwm-scaler1",
                 .id             = -1,
-                .get_rate       = clk_pwm_scaler_get_rate,
-                .set_rate       = clk_pwm_scaler_set_rate,
-                .round_rate     = clk_pwm_scaler_round_rate,
+                .ops            = &clk_pwm_scaler_ops,
         },
 };
 
@@ -256,50 +258,46 @@ static int clk_pwm_tdiv_set_rate(struct clk *clk, unsigned long rate)
         return 0;
 }
 
+static struct clk_ops clk_tdiv_ops = {
+        .get_rate       = clk_pwm_tdiv_get_rate,
+        .set_rate       = clk_pwm_tdiv_set_rate,
+        .round_rate     = clk_pwm_tdiv_round_rate,
+};
+
 static struct pwm_tdiv_clk clk_timer_tdiv[] = {
         [0]     = {
                 .clk    = {
-                        .name           = "pwm-tdiv",
-                        .parent         = &clk_timer_scaler[0],
-                        .get_rate       = clk_pwm_tdiv_get_rate,
-                        .set_rate       = clk_pwm_tdiv_set_rate,
-                        .round_rate     = clk_pwm_tdiv_round_rate,
+                        .name   = "pwm-tdiv",
+                        .ops    = &clk_tdiv_ops,
+                        .parent = &clk_timer_scaler[0],
                 },
         },
         [1]     = {
                 .clk    = {
-                        .name           = "pwm-tdiv",
-                        .parent         = &clk_timer_scaler[0],
-                        .get_rate       = clk_pwm_tdiv_get_rate,
-                        .set_rate       = clk_pwm_tdiv_set_rate,
-                        .round_rate     = clk_pwm_tdiv_round_rate,
+                        .name   = "pwm-tdiv",
+                        .ops    = &clk_tdiv_ops,
+                        .parent = &clk_timer_scaler[0],
                 }
         },
         [2]     = {
                 .clk    = {
-                        .name           = "pwm-tdiv",
-                        .parent         = &clk_timer_scaler[1],
-                        .get_rate       = clk_pwm_tdiv_get_rate,
-                        .set_rate       = clk_pwm_tdiv_set_rate,
-                        .round_rate     = clk_pwm_tdiv_round_rate,
+                        .name   = "pwm-tdiv",
+                        .ops    = &clk_tdiv_ops,
+                        .parent = &clk_timer_scaler[1],
                 },
         },
         [3]     = {
                 .clk    = {
-                        .name           = "pwm-tdiv",
-                        .parent         = &clk_timer_scaler[1],
-                        .get_rate       = clk_pwm_tdiv_get_rate,
-                        .set_rate       = clk_pwm_tdiv_set_rate,
-                        .round_rate     = clk_pwm_tdiv_round_rate,
+                        .name   = "pwm-tdiv",
+                        .ops    = &clk_tdiv_ops,
+                        .parent = &clk_timer_scaler[1],
                 },
         },
         [4]     = {
                 .clk    = {
-                        .name           = "pwm-tdiv",
-                        .parent         = &clk_timer_scaler[1],
-                        .get_rate       = clk_pwm_tdiv_get_rate,
-                        .set_rate       = clk_pwm_tdiv_set_rate,
-                        .round_rate     = clk_pwm_tdiv_round_rate,
+                        .name   = "pwm-tdiv",
+                        .ops    = &clk_tdiv_ops,
+                        .parent = &clk_timer_scaler[1],
                 },
         },
 };
@@ -356,31 +354,35 @@ static int clk_pwm_tin_set_parent(struct clk *clk, struct clk *parent)
         return 0;
 }
 
+static struct clk_ops clk_tin_ops = {
+        .set_parent     = clk_pwm_tin_set_parent,
+};
+
 static struct clk clk_tin[] = {
         [0]     = {
-                .name           = "pwm-tin",
-                .id             = 0,
-                .set_parent     = clk_pwm_tin_set_parent,
+                .name   = "pwm-tin",
+                .id     = 0,
+                .ops    = &clk_tin_ops,
         },
         [1]     = {
-                .name           = "pwm-tin",
-                .id             = 1,
-                .set_parent     = clk_pwm_tin_set_parent,
+                .name   = "pwm-tin",
+                .id     = 1,
+                .ops    = &clk_tin_ops,
         },
         [2]     = {
-                .name           = "pwm-tin",
-                .id             = 2,
-                .set_parent     = clk_pwm_tin_set_parent,
+                .name   = "pwm-tin",
+                .id     = 2,
+                .ops    = &clk_tin_ops,
         },
         [3]     = {
-                .name           = "pwm-tin",
-                .id             = 3,
-                .set_parent     = clk_pwm_tin_set_parent,
+                .name   = "pwm-tin",
+                .id     = 3,
+                .ops    = &clk_tin_ops,
         },
         [4]     = {
-                .name           = "pwm-tin",
-                .id             = 4,
-                .set_parent     = clk_pwm_tin_set_parent,
+                .name   = "pwm-tin",
+                .id     = 4,
+                .ops    = &clk_tin_ops,
         },
 };