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authorBen Dooks <ben-linux@fluff.org>2010-01-05 12:28:20 -0500
committerBen Dooks <ben-linux@fluff.org>2010-01-15 03:10:13 -0500
commit4f830db9629e413e7c5523085ab009b0de5ae6d0 (patch)
tree8d3feb830483426e2e5f263dd1b65e564890a598 /arch/arm/plat-s3c
parentb6a604137bb978d9f65b1228cf0bb691ece45cba (diff)
ARM: SAMSUNG: Move gpio-config.c into plat-samsung
The arch/arm/plat-s3c/gpio-config.c file is common to pretty much all the Samsung SoCs, so move it to arch/arm/plat-samsung Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c')
-rw-r--r--arch/arm/plat-s3c/Kconfig33
-rw-r--r--arch/arm/plat-s3c/Makefile1
-rw-r--r--arch/arm/plat-s3c/gpio-config.c166
3 files changed, 0 insertions, 200 deletions
diff --git a/arch/arm/plat-s3c/Kconfig b/arch/arm/plat-s3c/Kconfig
index cd979b1f6120..454cc39b7adc 100644
--- a/arch/arm/plat-s3c/Kconfig
+++ b/arch/arm/plat-s3c/Kconfig
@@ -130,39 +130,6 @@ config S3C_GPIO_TRACK
130 Internal configuration option to enable the s3c specific gpio 130 Internal configuration option to enable the s3c specific gpio
131 chip tracking if the platform requires it. 131 chip tracking if the platform requires it.
132 132
133config S3C_GPIO_PULL_UPDOWN
134 bool
135 help
136 Internal configuration to enable the correct GPIO pull helper
137
138config S3C_GPIO_PULL_DOWN
139 bool
140 help
141 Internal configuration to enable the correct GPIO pull helper
142
143config S3C_GPIO_PULL_UP
144 bool
145 help
146 Internal configuration to enable the correct GPIO pull helper
147
148config S3C_GPIO_CFG_S3C24XX
149 bool
150 help
151 Internal configuration to enable S3C24XX style GPIO configuration
152 functions.
153
154config S3C_GPIO_CFG_S3C64XX
155 bool
156 help
157 Internal configuration to enable S3C64XX style GPIO configuration
158 functions.
159
160config S5P_GPIO_CFG_S5PC1XX
161 bool
162 help
163 Internal configuration to enable S5PC1XX style GPIO configuration
164 functions.
165
166# DMA 133# DMA
167 134
168config S3C_DMA 135config S3C_DMA
diff --git a/arch/arm/plat-s3c/Makefile b/arch/arm/plat-s3c/Makefile
index d86299556552..ea4a001f6793 100644
--- a/arch/arm/plat-s3c/Makefile
+++ b/arch/arm/plat-s3c/Makefile
@@ -14,7 +14,6 @@ obj- :=
14obj-y += init.o 14obj-y += init.o
15obj-y += time.o 15obj-y += time.o
16obj-y += gpio.o 16obj-y += gpio.o
17obj-y += gpio-config.o
18 17
19# DMA support 18# DMA support
20 19
diff --git a/arch/arm/plat-s3c/gpio-config.c b/arch/arm/plat-s3c/gpio-config.c
deleted file mode 100644
index 456969b6fa0d..000000000000
--- a/arch/arm/plat-s3c/gpio-config.c
+++ /dev/null
@@ -1,166 +0,0 @@
1/* linux/arch/arm/plat-s3c/gpio-config.c
2 *
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
7 *
8 * S3C series GPIO configuration core
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/gpio.h>
18#include <linux/io.h>
19
20#include <mach/gpio-core.h>
21#include <plat/gpio-cfg.h>
22#include <plat/gpio-cfg-helpers.h>
23
24int s3c_gpio_cfgpin(unsigned int pin, unsigned int config)
25{
26 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
27 unsigned long flags;
28 int offset;
29 int ret;
30
31 if (!chip)
32 return -EINVAL;
33
34 offset = pin - chip->chip.base;
35
36 local_irq_save(flags);
37 ret = s3c_gpio_do_setcfg(chip, offset, config);
38 local_irq_restore(flags);
39
40 return ret;
41}
42EXPORT_SYMBOL(s3c_gpio_cfgpin);
43
44int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull)
45{
46 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
47 unsigned long flags;
48 int offset, ret;
49
50 if (!chip)
51 return -EINVAL;
52
53 offset = pin - chip->chip.base;
54
55 local_irq_save(flags);
56 ret = s3c_gpio_do_setpull(chip, offset, pull);
57 local_irq_restore(flags);
58
59 return ret;
60}
61EXPORT_SYMBOL(s3c_gpio_setpull);
62
63#ifdef CONFIG_S3C_GPIO_CFG_S3C24XX
64int s3c_gpio_setcfg_s3c24xx_banka(struct s3c_gpio_chip *chip,
65 unsigned int off, unsigned int cfg)
66{
67 void __iomem *reg = chip->base;
68 unsigned int shift = off;
69 u32 con;
70
71 if (s3c_gpio_is_cfg_special(cfg)) {
72 cfg &= 0xf;
73
74 /* Map output to 0, and SFN2 to 1 */
75 cfg -= 1;
76 if (cfg > 1)
77 return -EINVAL;
78
79 cfg <<= shift;
80 }
81
82 con = __raw_readl(reg);
83 con &= ~(0x1 << shift);
84 con |= cfg;
85 __raw_writel(con, reg);
86
87 return 0;
88}
89
90int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip,
91 unsigned int off, unsigned int cfg)
92{
93 void __iomem *reg = chip->base;
94 unsigned int shift = off * 2;
95 u32 con;
96
97 if (s3c_gpio_is_cfg_special(cfg)) {
98 cfg &= 0xf;
99 if (cfg > 3)
100 return -EINVAL;
101
102 cfg <<= shift;
103 }
104
105 con = __raw_readl(reg);
106 con &= ~(0x3 << shift);
107 con |= cfg;
108 __raw_writel(con, reg);
109
110 return 0;
111}
112#endif
113
114#ifdef CONFIG_S3C_GPIO_CFG_S3C64XX
115int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
116 unsigned int off, unsigned int cfg)
117{
118 void __iomem *reg = chip->base;
119 unsigned int shift = (off & 7) * 4;
120 u32 con;
121
122 if (off < 8 && chip->chip.ngpio > 8)
123 reg -= 4;
124
125 if (s3c_gpio_is_cfg_special(cfg)) {
126 cfg &= 0xf;
127 cfg <<= shift;
128 }
129
130 con = __raw_readl(reg);
131 con &= ~(0xf << shift);
132 con |= cfg;
133 __raw_writel(con, reg);
134
135 return 0;
136}
137#endif /* CONFIG_S3C_GPIO_CFG_S3C64XX */
138
139#ifdef CONFIG_S3C_GPIO_PULL_UPDOWN
140int s3c_gpio_setpull_updown(struct s3c_gpio_chip *chip,
141 unsigned int off, s3c_gpio_pull_t pull)
142{
143 void __iomem *reg = chip->base + 0x08;
144 int shift = off * 2;
145 u32 pup;
146
147 pup = __raw_readl(reg);
148 pup &= ~(3 << shift);
149 pup |= pull << shift;
150 __raw_writel(pup, reg);
151
152 return 0;
153}
154
155s3c_gpio_pull_t s3c_gpio_getpull_updown(struct s3c_gpio_chip *chip,
156 unsigned int off)
157{
158 void __iomem *reg = chip->base + 0x08;
159 int shift = off * 2;
160 u32 pup = __raw_readl(reg);
161
162 pup >>= shift;
163 pup &= 0x3;
164 return (__force s3c_gpio_pull_t)pup;
165}
166#endif