diff options
author | Ben Dooks <ben-linux@fluff.org> | 2009-03-25 07:01:24 -0400 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2009-05-07 06:04:58 -0400 |
commit | 4faf6867638cc21aa43b4ca4ed0bdf14a2d29762 (patch) | |
tree | 1fed91079785469a6f044900bd322166df37adbf /arch/arm/plat-s3c64xx | |
parent | e074f9803227236252c8e7be16d836d709abff57 (diff) |
[ARM] S3C64XX: Add S3C6400 SDHCI setup support
Add support for S3C6400 SDHCI channels 0 and 1, making
the GPIO code common to both S3C6400 and S3C6410.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c64xx')
-rw-r--r-- | arch/arm/plat-s3c64xx/Kconfig | 5 | ||||
-rw-r--r-- | arch/arm/plat-s3c64xx/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/plat-s3c64xx/setup-sdhci-gpio.c | 55 |
3 files changed, 61 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c64xx/Kconfig b/arch/arm/plat-s3c64xx/Kconfig index ad48fd73e04d..eb088db0e650 100644 --- a/arch/arm/plat-s3c64xx/Kconfig +++ b/arch/arm/plat-s3c64xx/Kconfig | |||
@@ -60,4 +60,9 @@ config S3C64XX_SETUP_FB_24BPP | |||
60 | help | 60 | help |
61 | Common setup code for S3C64XX with an 24bpp RGB display helper. | 61 | Common setup code for S3C64XX with an 24bpp RGB display helper. |
62 | 62 | ||
63 | config S3C64XX_SETUP_SDHCI_GPIO | ||
64 | bool | ||
65 | help | ||
66 | Common setup code for S3C64XX SDHCI GPIO configurations | ||
67 | |||
63 | endif | 68 | endif |
diff --git a/arch/arm/plat-s3c64xx/Makefile b/arch/arm/plat-s3c64xx/Makefile index 12ac7a50ab74..030050f5c76d 100644 --- a/arch/arm/plat-s3c64xx/Makefile +++ b/arch/arm/plat-s3c64xx/Makefile | |||
@@ -35,3 +35,4 @@ obj-$(CONFIG_PM) += irq-pm.o | |||
35 | obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o | 35 | obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o |
36 | obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o | 36 | obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o |
37 | obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o | 37 | obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o |
38 | obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o \ No newline at end of file | ||
diff --git a/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c b/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c new file mode 100644 index 000000000000..5417123b0ac1 --- /dev/null +++ b/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c | |||
@@ -0,0 +1,55 @@ | |||
1 | /* linux/arch/arm/plat-s3c64xx/setup-sdhci-gpio.c | ||
2 | * | ||
3 | * Copyright 2008 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * | ||
7 | * S3C64XX - Helper functions for setting up SDHCI device(s) GPIO (HSMMC) | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/types.h> | ||
16 | #include <linux/interrupt.h> | ||
17 | #include <linux/platform_device.h> | ||
18 | #include <linux/io.h> | ||
19 | |||
20 | #include <mach/gpio.h> | ||
21 | #include <plat/gpio-cfg.h> | ||
22 | |||
23 | void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) | ||
24 | { | ||
25 | unsigned int gpio; | ||
26 | unsigned int end; | ||
27 | |||
28 | end = S3C64XX_GPG(2 + width); | ||
29 | |||
30 | /* Set all the necessary GPG pins to special-function 0 */ | ||
31 | for (gpio = S3C64XX_GPG(0); gpio < end; gpio++) { | ||
32 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
33 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
34 | } | ||
35 | |||
36 | s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); | ||
37 | s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(2)); | ||
38 | } | ||
39 | |||
40 | void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) | ||
41 | { | ||
42 | unsigned int gpio; | ||
43 | unsigned int end; | ||
44 | |||
45 | end = S3C64XX_GPH(2 + width); | ||
46 | |||
47 | /* Set all the necessary GPG pins to special-function 0 */ | ||
48 | for (gpio = S3C64XX_GPH(0); gpio < end; gpio++) { | ||
49 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); | ||
50 | s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); | ||
51 | } | ||
52 | |||
53 | s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_UP); | ||
54 | s3c_gpio_cfgpin(S3C64XX_GPG(6), S3C_GPIO_SFN(3)); | ||
55 | } | ||