[ARM] S3C: Add i2c1 device definition

Add device definition and support functions for the
second i2c device (i2c1). If this is selected, the first
i2c bus will become index 0 instead of index -1.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>

1 files changed, 5 insertions, 0 deletions

diff --git a/arch/arm/plat-s3c64xx/include/plat/irqs.h b/arch/arm/plat-s3c64xx/include/plat/irqs.h
index bc25689c3f83..02e8dd4c97d5 100644
--- a/arch/arm/plat-s3c64xx/include/plat/irqs.h
+++ b/arch/arm/plat-s3c64xx/include/plat/irqs.h
@@ -70,6 +70,7 @@
 #define IRQ_CAMIF_C             S3C64XX_IRQ_VIC0(3)
 #define IRQ_CAMIF_P             S3C64XX_IRQ_VIC0(4)
 #define IRQ_CAMIF_MC            S3C64XX_IRQ_VIC0(5)
+#define IRQ_S3C6410_IIC1        S3C64XX_IRQ_VIC0(5)
 #define IRQ_S3C6410_IIS         S3C64XX_IRQ_VIC0(6)
 #define IRQ_S3C6400_CAMIF_MP    S3C64XX_IRQ_VIC0(6)
 #define IRQ_CAMIF_WE_C          S3C64XX_IRQ_VIC0(7)
@@ -144,6 +145,10 @@
 #define IRQ_TIMER3              S3C64XX_TIMER_IRQ(3)
 #define IRQ_TIMER4              S3C64XX_TIMER_IRQ(4)
 
+/* compatibility for device defines */
+
+#define IRQ_IIC1                IRQ_S3C6410_IIC1
+
 /* Since the IRQ_EINT(x) are a linear mapping on current s3c64xx series
  * we just defined them as an IRQ_EINT(x) macro from S3C_IRQ_EINT_BASE
  * which we place after the pair of VICs. */