ARM: Add common entry code for system with two VICs

Add a common entry-macro-vic2.S for systems where there are two VICs
so that the machine or platform directories just need to setup the
correct information before including <asm/entry-macro-vic2.S> into
their own entry-macro.S file.

Since this code is from the S3C64XX project, we update the S3C64XX
machine entry code to use this new header.

Signed-off-by: Ben Dooks <ben-linux@fluff.org>

3 files changed, 8 insertions, 8 deletions

diff --git a/arch/arm/plat-s3c64xx/cpu.c b/arch/arm/plat-s3c64xx/cpu.c
index 49796d2db86d..c0e6f2a45154 100644
--- a/arch/arm/plat-s3c64xx/cpu.c
+++ b/arch/arm/plat-s3c64xx/cpu.c
@@ -78,12 +78,12 @@ static struct map_desc s3c_iodesc[] __initdata = {
                 .length         = SZ_4K,
                 .type           = MT_DEVICE,
         }, {
-                .virtual        = (unsigned long)S3C_VA_VIC0,
+                .virtual        = (unsigned long)VA_VIC0,
                 .pfn            = __phys_to_pfn(S3C64XX_PA_VIC0),
                 .length         = SZ_16K,
                 .type           = MT_DEVICE,
         }, {
-                .virtual        = (unsigned long)S3C_VA_VIC1,
+                .virtual        = (unsigned long)VA_VIC1,
                 .pfn            = __phys_to_pfn(S3C64XX_PA_VIC1),
                 .length         = SZ_16K,
                 .type           = MT_DEVICE,
diff --git a/arch/arm/plat-s3c64xx/include/plat/irqs.h b/arch/arm/plat-s3c64xx/include/plat/irqs.h
index 7956fd3bb194..176fe15a61d6 100644
--- a/arch/arm/plat-s3c64xx/include/plat/irqs.h
+++ b/arch/arm/plat-s3c64xx/include/plat/irqs.h
@@ -24,8 +24,8 @@
 
 #define S3C_IRQ(x)      ((x) + S3C_IRQ_OFFSET)
 
-#define S3C_VIC0_BASE   S3C_IRQ(0)
-#define S3C_VIC1_BASE   S3C_IRQ(32)
+#define IRQ_VIC0_BASE   S3C_IRQ(0)
+#define IRQ_VIC1_BASE   S3C_IRQ(32)
 
 /* UART interrupts, each UART has 4 intterupts per channel so
  * use the space between the ISA and S3C main interrupts. Note, these
@@ -59,8 +59,8 @@
 
 /* VIC based IRQs */
 
-#define S3C64XX_IRQ_VIC0(x)     (S3C_VIC0_BASE + (x))
-#define S3C64XX_IRQ_VIC1(x)     (S3C_VIC1_BASE + (x))
+#define S3C64XX_IRQ_VIC0(x)     (IRQ_VIC0_BASE + (x))
+#define S3C64XX_IRQ_VIC1(x)     (IRQ_VIC1_BASE + (x))
 
 /* VIC0 */
 
diff --git a/arch/arm/plat-s3c64xx/irq.c b/arch/arm/plat-s3c64xx/irq.c
index b98451e8ee24..67a145d440f3 100644
--- a/arch/arm/plat-s3c64xx/irq.c
+++ b/arch/arm/plat-s3c64xx/irq.c
@@ -54,8 +54,8 @@ void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
         printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
 
         /* initialise the pair of VICs */
-        vic_init(S3C_VA_VIC0, S3C_VIC0_BASE, vic0_valid, 0);
-        vic_init(S3C_VA_VIC1, S3C_VIC1_BASE, vic1_valid, 0);
+        vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, 0);
+        vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, 0);
 
         /* add the timer sub-irqs */