diff options
author | Ben Dooks <ben-linux@fluff.org> | 2008-10-21 09:06:40 -0400 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2008-12-15 16:47:27 -0500 |
commit | d521f87e9c642dbc820cb839039e25a05cb02151 (patch) | |
tree | b4f3c9cfbff62ed75c40dfbe3e30c55720e06d79 /arch/arm/plat-s3c64xx | |
parent | a08ab63761730634bbbf8f361d1a058c1f4af9c5 (diff) |
[ARM] S3C64XX: Initial arch header files
Add the initial header files for the S3C64XX support to satisfy the
minimal requirements to build a kernel. Some definitions will therefore
be placeholders or empty functions that will ensure that the system can
build and have base functionality. These will be filled in at a later
date.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c64xx')
-rw-r--r-- | arch/arm/plat-s3c64xx/include/plat/irqs.h | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c64xx/include/plat/irqs.h b/arch/arm/plat-s3c64xx/include/plat/irqs.h new file mode 100644 index 000000000000..592a56354551 --- /dev/null +++ b/arch/arm/plat-s3c64xx/include/plat/irqs.h | |||
@@ -0,0 +1,38 @@ | |||
1 | /* linux/arch/arm/plat-s3c64xx/include/mach/irqs.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * S3C64XX - Common IRQ support | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_PLAT_S3C64XX_IRQS_H | ||
12 | #define __ASM_PLAT_S3C64XX_IRQS_H __FILE__ | ||
13 | |||
14 | /* we keep the first set of CPU IRQs out of the range of | ||
15 | * the ISA space, so that the PC104 has them to itself | ||
16 | * and we don't end up having to do horrible things to the | ||
17 | * standard ISA drivers.... | ||
18 | */ | ||
19 | |||
20 | #define S3C_IRQ_OFFSET (16) | ||
21 | |||
22 | #define S3C_IRQ(x) ((x) + S3C_IRQ_OFFSET) | ||
23 | |||
24 | /* Since the IRQ_EINT(x) are a linear mapping on current s3c64xx series | ||
25 | * we just defined them as an IRQ_EINT(x) macro from S3C_IRQ_EINT_BASE | ||
26 | * which we place after the pair of VICs. */ | ||
27 | |||
28 | #define S3C_IRQ_EINT_BASE S3C_IRQ(64) | ||
29 | |||
30 | #define S3C_EINT(x) ((x) + S3C_IRQ_EINT_BASE) | ||
31 | |||
32 | /* Define NR_IRQs here, machine specific can always re-define. | ||
33 | * Currently the IRQ_EINT27 is the last one we can have. */ | ||
34 | |||
35 | #define NR_IRQS (S3C_EINT(27) + 1) | ||
36 | |||
37 | #endif /* __ASM_PLAT_S3C64XX_IRQS_H */ | ||
38 | |||