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author | David S. Miller <davem@davemloft.net> | 2009-03-19 02:53:57 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-03-19 02:53:57 -0400 |
commit | 0702b30dd821ac8a4103ddbe545518713fdca9be (patch) | |
tree | 8ce0c9f5e58c5ccb99870505eecd139986caa05e /arch/arm/plat-s3c64xx/irq-eint.c | |
parent | 192d7a4667c6d11d1a174ec4cad9a3c5d5f9043c (diff) | |
parent | a1e4ee22863d41a6fbb24310d7951836cb6dafe7 (diff) |
Merge branch 'master' of /home/davem/src/GIT/linux-2.6/
Diffstat (limited to 'arch/arm/plat-s3c64xx/irq-eint.c')
-rw-r--r-- | arch/arm/plat-s3c64xx/irq-eint.c | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/arch/arm/plat-s3c64xx/irq-eint.c b/arch/arm/plat-s3c64xx/irq-eint.c index 1f7cc0067f5c..cf524826c93a 100644 --- a/arch/arm/plat-s3c64xx/irq-eint.c +++ b/arch/arm/plat-s3c64xx/irq-eint.c | |||
@@ -14,12 +14,15 @@ | |||
14 | 14 | ||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/interrupt.h> | 16 | #include <linux/interrupt.h> |
17 | #include <linux/gpio.h> | ||
17 | #include <linux/irq.h> | 18 | #include <linux/irq.h> |
18 | #include <linux/io.h> | 19 | #include <linux/io.h> |
19 | 20 | ||
20 | #include <asm/hardware/vic.h> | 21 | #include <asm/hardware/vic.h> |
21 | 22 | ||
22 | #include <plat/regs-irqtype.h> | 23 | #include <plat/regs-irqtype.h> |
24 | #include <plat/regs-gpio.h> | ||
25 | #include <plat/gpio-cfg.h> | ||
23 | 26 | ||
24 | #include <mach/map.h> | 27 | #include <mach/map.h> |
25 | #include <plat/cpu.h> | 28 | #include <plat/cpu.h> |
@@ -55,7 +58,7 @@ static void s3c_irq_eint_unmask(unsigned int irq) | |||
55 | u32 mask; | 58 | u32 mask; |
56 | 59 | ||
57 | mask = __raw_readl(S3C64XX_EINT0MASK); | 60 | mask = __raw_readl(S3C64XX_EINT0MASK); |
58 | mask |= eint_irq_to_bit(irq); | 61 | mask &= ~eint_irq_to_bit(irq); |
59 | __raw_writel(mask, S3C64XX_EINT0MASK); | 62 | __raw_writel(mask, S3C64XX_EINT0MASK); |
60 | } | 63 | } |
61 | 64 | ||
@@ -74,6 +77,7 @@ static void s3c_irq_eint_maskack(unsigned int irq) | |||
74 | static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type) | 77 | static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type) |
75 | { | 78 | { |
76 | int offs = eint_offset(irq); | 79 | int offs = eint_offset(irq); |
80 | int pin; | ||
77 | int shift; | 81 | int shift; |
78 | u32 ctrl, mask; | 82 | u32 ctrl, mask; |
79 | u32 newvalue = 0; | 83 | u32 newvalue = 0; |
@@ -125,6 +129,15 @@ static int s3c_irq_eint_set_type(unsigned int irq, unsigned int type) | |||
125 | ctrl |= newvalue << shift; | 129 | ctrl |= newvalue << shift; |
126 | __raw_writel(ctrl, reg); | 130 | __raw_writel(ctrl, reg); |
127 | 131 | ||
132 | /* set the GPIO pin appropriately */ | ||
133 | |||
134 | if (offs < 23) | ||
135 | pin = S3C64XX_GPN(offs); | ||
136 | else | ||
137 | pin = S3C64XX_GPM(offs - 23); | ||
138 | |||
139 | s3c_gpio_cfgpin(pin, S3C_GPIO_SFN(2)); | ||
140 | |||
128 | return 0; | 141 | return 0; |
129 | } | 142 | } |
130 | 143 | ||
@@ -181,7 +194,7 @@ static void s3c_irq_demux_eint20_27(unsigned int irq, struct irq_desc *desc) | |||
181 | s3c_irq_demux_eint(20, 27); | 194 | s3c_irq_demux_eint(20, 27); |
182 | } | 195 | } |
183 | 196 | ||
184 | int __init s3c64xx_init_irq_eint(void) | 197 | static int __init s3c64xx_init_irq_eint(void) |
185 | { | 198 | { |
186 | int irq; | 199 | int irq; |
187 | 200 | ||