diff options
author | Ben Dooks <ben-linux@fluff.org> | 2008-10-31 12:14:33 -0400 |
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committer | Ben Dooks <ben-linux@fluff.org> | 2008-12-15 18:33:59 -0500 |
commit | 89d043c3db22c37523165905708d2fa8062fda86 (patch) | |
tree | 53d66e6fdde2ef3288ac06f229e3ca626ff88722 /arch/arm/plat-s3c64xx/include | |
parent | 8a53bdb907cb924ed30f79bcfe7f4f15ff7de15e (diff) |
[ARM] S3C64XX: GPIO library support
Add gpiolib registration for the GPIOs available on the
S3C64XX platform
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c64xx/include')
-rw-r--r-- | arch/arm/plat-s3c64xx/include/plat/regs-gpio.h | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-gpio.h b/arch/arm/plat-s3c64xx/include/plat/regs-gpio.h new file mode 100644 index 000000000000..75b873d82808 --- /dev/null +++ b/arch/arm/plat-s3c64xx/include/plat/regs-gpio.h | |||
@@ -0,0 +1,35 @@ | |||
1 | /* linux/arch/arm/plat-s3c64xx/include/mach/regs-gpio.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * S3C64XX - GPIO register definitions | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_PLAT_S3C64XX_REGS_GPIO_H | ||
12 | #define __ASM_PLAT_S3C64XX_REGS_GPIO_H __FILE__ | ||
13 | |||
14 | /* Base addresses for each of the banks */ | ||
15 | |||
16 | #define S3C64XX_GPA_BASE (S3C64XX_VA_GPIO + 0x0000) | ||
17 | #define S3C64XX_GPB_BASE (S3C64XX_VA_GPIO + 0x0020) | ||
18 | #define S3C64XX_GPC_BASE (S3C64XX_VA_GPIO + 0x0040) | ||
19 | #define S3C64XX_GPD_BASE (S3C64XX_VA_GPIO + 0x0060) | ||
20 | #define S3C64XX_GPE_BASE (S3C64XX_VA_GPIO + 0x0080) | ||
21 | #define S3C64XX_GPF_BASE (S3C64XX_VA_GPIO + 0x00A0) | ||
22 | #define S3C64XX_GPG_BASE (S3C64XX_VA_GPIO + 0x00C0) | ||
23 | #define S3C64XX_GPH_BASE (S3C64XX_VA_GPIO + 0x00E0) | ||
24 | #define S3C64XX_GPI_BASE (S3C64XX_VA_GPIO + 0x0100) | ||
25 | #define S3C64XX_GPJ_BASE (S3C64XX_VA_GPIO + 0x0120) | ||
26 | #define S3C64XX_GPK_BASE (S3C64XX_VA_GPIO + 0x0800) | ||
27 | #define S3C64XX_GPL_BASE (S3C64XX_VA_GPIO + 0x0810) | ||
28 | #define S3C64XX_GPM_BASE (S3C64XX_VA_GPIO + 0x0820) | ||
29 | #define S3C64XX_GPN_BASE (S3C64XX_VA_GPIO + 0x0830) | ||
30 | #define S3C64XX_GPO_BASE (S3C64XX_VA_GPIO + 0x0140) | ||
31 | #define S3C64XX_GPP_BASE (S3C64XX_VA_GPIO + 0x0160) | ||
32 | #define S3C64XX_GPQ_BASE (S3C64XX_VA_GPIO + 0x0180) | ||
33 | |||
34 | #endif /* __ASM_PLAT_S3C64XX_REGS_GPIO_H */ | ||
35 | |||