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authorMarek Szyprowski <m.szyprowski@samsung.com>2009-05-07 09:07:47 -0400
committerBen Dooks <ben-linux@fluff.org>2009-05-15 10:13:06 -0400
commitf36dd6e7c0c04a056d3441185a17e5d4e3723192 (patch)
tree52163b8e799c1d61a92e6fabe0bf0a9ec28a6b57 /arch/arm/plat-s3c64xx/include
parent3ea385f061d08a9509a884e347ad1007bb6c3c66 (diff)
[ARM] S3C64XX: GPIO include cleanup
Cleanup arm/plat-s3c64xx/include/plat/gpio-bank-h.h include file. Using shift-left operation with value >32 is a bad habit. Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c64xx/include')
-rw-r--r--arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h20
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h
index 81549516572f..2ba1767512d7 100644
--- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h
+++ b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h
@@ -61,14 +61,14 @@
61#define S3C64XX_GPH7_ADDR_CF1 (0x06 << 28) 61#define S3C64XX_GPH7_ADDR_CF1 (0x06 << 28)
62#define S3C64XX_GPH7_EINT_G6_7 (0x07 << 28) 62#define S3C64XX_GPH7_EINT_G6_7 (0x07 << 28)
63 63
64#define S3C64XX_GPH8_MMC1_DATA6 (0x02 << 32) 64#define S3C64XX_GPH8_MMC1_DATA6 (0x02 << 0)
65#define S3C64XX_GPH8_MMC2_DATA2 (0x03 << 32) 65#define S3C64XX_GPH8_MMC2_DATA2 (0x03 << 0)
66#define S3C64XX_GPH8_I2S_V40_LRCLK (0x05 << 32) 66#define S3C64XX_GPH8_I2S_V40_LRCLK (0x05 << 0)
67#define S3C64XX_GPH8_ADDR_CF2 (0x06 << 32) 67#define S3C64XX_GPH8_ADDR_CF2 (0x06 << 0)
68#define S3C64XX_GPH8_EINT_G6_8 (0x07 << 32) 68#define S3C64XX_GPH8_EINT_G6_8 (0x07 << 0)
69
70#define S3C64XX_GPH9_MMC1_DATA7 (0x02 << 36)
71#define S3C64XX_GPH9_MMC2_DATA3 (0x03 << 36)
72#define S3C64XX_GPH9_I2S_V40_DI (0x05 << 36)
73#define S3C64XX_GPH9_EINT_G6_9 (0x07 << 36)
74 69
70#define S3C64XX_GPH9_OUTPUT (0x01 << 4)
71#define S3C64XX_GPH9_MMC1_DATA7 (0x02 << 4)
72#define S3C64XX_GPH9_MMC2_DATA3 (0x03 << 4)
73#define S3C64XX_GPH9_I2S_V40_DI (0x05 << 4)
74#define S3C64XX_GPH9_EINT_G6_9 (0x07 << 4)