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authorKukjin Kim <kgene.kim@samsung.com>2009-09-22 23:59:07 -0400
committerBen Dooks <ben-linux@fluff.org>2009-10-26 12:49:46 -0400
commite73486b8c9d8d649dd080eb1b810e5b0c11a955a (patch)
treee115603fc4c2598995325fc8e2a00bb187d5b01f /arch/arm/plat-s3c64xx/include/plat
parent964fe080d94db82a3268443e9b9ece4c60246414 (diff)
ARM: S3C64XX: Fix S3C64XX_CLKDIV0_ARM_MASK value
Fix the values of S3C6400_CLKDIV0_ARM_MASK and S3C6410_CLKDIV0_ARM_MASK. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c64xx/include/plat')
-rw-r--r--arch/arm/plat-s3c64xx/include/plat/regs-clock.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/plat-s3c64xx/include/plat/regs-clock.h b/arch/arm/plat-s3c64xx/include/plat/regs-clock.h
index a8777a755dfa..ff46e7fa957a 100644
--- a/arch/arm/plat-s3c64xx/include/plat/regs-clock.h
+++ b/arch/arm/plat-s3c64xx/include/plat/regs-clock.h
@@ -51,8 +51,8 @@
51#define S3C6400_CLKDIV0_HCLK_SHIFT (8) 51#define S3C6400_CLKDIV0_HCLK_SHIFT (8)
52#define S3C6400_CLKDIV0_MPLL_MASK (0x1 << 4) 52#define S3C6400_CLKDIV0_MPLL_MASK (0x1 << 4)
53#define S3C6400_CLKDIV0_MPLL_SHIFT (4) 53#define S3C6400_CLKDIV0_MPLL_SHIFT (4)
54#define S3C6400_CLKDIV0_ARM_MASK (0x3 << 0) 54#define S3C6400_CLKDIV0_ARM_MASK (0x7 << 0)
55#define S3C6410_CLKDIV0_ARM_MASK (0x7 << 0) 55#define S3C6410_CLKDIV0_ARM_MASK (0xf << 0)
56#define S3C6400_CLKDIV0_ARM_SHIFT (0) 56#define S3C6400_CLKDIV0_ARM_SHIFT (0)
57 57
58/* CLKDIV1 */ 58/* CLKDIV1 */