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author | Vegard Nossum <vegard.nossum@gmail.com> | 2009-06-15 09:50:49 -0400 |
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committer | Vegard Nossum <vegard.nossum@gmail.com> | 2009-06-15 09:50:49 -0400 |
commit | 722f2a6c87f34ee0fd0130a8cf45f81e0705594a (patch) | |
tree | 50b054df34d2731eb0ba0cf1a6c27e43e7eed428 /arch/arm/plat-s3c64xx/clock.c | |
parent | 7a0aeb14e18ad59394bd9bbc6e57fb345819e748 (diff) | |
parent | 45e3e1935e2857c54783291107d33323b3ef33c8 (diff) |
Merge commit 'linus/master' into HEAD
Conflicts:
MAINTAINERS
Signed-off-by: Vegard Nossum <vegard.nossum@gmail.com>
Diffstat (limited to 'arch/arm/plat-s3c64xx/clock.c')
-rw-r--r-- | arch/arm/plat-s3c64xx/clock.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c64xx/clock.c b/arch/arm/plat-s3c64xx/clock.c index ad1b9682c9c3..0bc2fa1dfc40 100644 --- a/arch/arm/plat-s3c64xx/clock.c +++ b/arch/arm/plat-s3c64xx/clock.c | |||
@@ -27,6 +27,12 @@ | |||
27 | #include <plat/devs.h> | 27 | #include <plat/devs.h> |
28 | #include <plat/clock.h> | 28 | #include <plat/clock.h> |
29 | 29 | ||
30 | struct clk clk_h2 = { | ||
31 | .name = "hclk2", | ||
32 | .id = -1, | ||
33 | .rate = 0, | ||
34 | }; | ||
35 | |||
30 | struct clk clk_27m = { | 36 | struct clk clk_27m = { |
31 | .name = "clk_27m", | 37 | .name = "clk_27m", |
32 | .id = -1, | 38 | .id = -1, |
@@ -152,6 +158,18 @@ static struct clk init_clocks_disable[] = { | |||
152 | .parent = &clk_48m, | 158 | .parent = &clk_48m, |
153 | .enable = s3c64xx_sclk_ctrl, | 159 | .enable = s3c64xx_sclk_ctrl, |
154 | .ctrlbit = S3C_CLKCON_SCLK_MMC2_48, | 160 | .ctrlbit = S3C_CLKCON_SCLK_MMC2_48, |
161 | }, { | ||
162 | .name = "dma0", | ||
163 | .id = -1, | ||
164 | .parent = &clk_h, | ||
165 | .enable = s3c64xx_hclk_ctrl, | ||
166 | .ctrlbit = S3C_CLKCON_HCLK_DMA0, | ||
167 | }, { | ||
168 | .name = "dma1", | ||
169 | .id = -1, | ||
170 | .parent = &clk_h, | ||
171 | .enable = s3c64xx_hclk_ctrl, | ||
172 | .ctrlbit = S3C_CLKCON_HCLK_DMA1, | ||
155 | }, | 173 | }, |
156 | }; | 174 | }; |
157 | 175 | ||
@@ -246,6 +264,7 @@ static struct clk *clks[] __initdata = { | |||
246 | &clk_epll, | 264 | &clk_epll, |
247 | &clk_27m, | 265 | &clk_27m, |
248 | &clk_48m, | 266 | &clk_48m, |
267 | &clk_h2, | ||
249 | }; | 268 | }; |
250 | 269 | ||
251 | void __init s3c64xx_register_clocks(void) | 270 | void __init s3c64xx_register_clocks(void) |