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authorHeiko Stuebner <heiko@sntech.de>2011-10-14 02:08:56 -0400
committerKukjin Kim <kgene.kim@samsung.com>2011-10-14 02:15:51 -0400
commit5f33bd76f5c4df45cd5b2e4132c6451dac8afee9 (patch)
tree8ce2f769d4b0ee8b0cdb44eecea1ecf5b1d9395a /arch/arm/plat-s3c24xx
parentefb1fb486a8187f02ac4a0170ab45823ebbe58f2 (diff)
ARM: S3C2443: Add get_rate operation for clk_armdiv
Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/plat-s3c24xx')
-rw-r--r--arch/arm/plat-s3c24xx/s3c2443-clock.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c24xx/s3c2443-clock.c b/arch/arm/plat-s3c24xx/s3c2443-clock.c
index f9c5b0343cf3..fea3d5c0252e 100644
--- a/arch/arm/plat-s3c24xx/s3c2443-clock.c
+++ b/arch/arm/plat-s3c24xx/s3c2443-clock.c
@@ -189,6 +189,19 @@ static unsigned long s3c2443_armclk_roundrate(struct clk *clk,
189 return parent / best; 189 return parent / best;
190} 190}
191 191
192static unsigned long s3c2443_armclk_getrate(struct clk *clk)
193{
194 unsigned long rate = clk_get_rate(clk->parent);
195 unsigned long clkcon0;
196 int val;
197
198 clkcon0 = __raw_readl(S3C2443_CLKDIV0);
199 clkcon0 &= armdivmask;
200 val = clkcon0 >> S3C2443_CLKDIV0_ARMDIV_SHIFT;
201
202 return rate / armdiv[val];
203}
204
192static int s3c2443_armclk_setrate(struct clk *clk, unsigned long rate) 205static int s3c2443_armclk_setrate(struct clk *clk, unsigned long rate)
193{ 206{
194 unsigned long parent = clk_get_rate(clk->parent); 207 unsigned long parent = clk_get_rate(clk->parent);
@@ -224,6 +237,7 @@ static struct clk clk_armdiv = {
224 .parent = &clk_msysclk.clk, 237 .parent = &clk_msysclk.clk,
225 .ops = &(struct clk_ops) { 238 .ops = &(struct clk_ops) {
226 .round_rate = s3c2443_armclk_roundrate, 239 .round_rate = s3c2443_armclk_roundrate,
240 .get_rate = s3c2443_armclk_getrate,
227 .set_rate = s3c2443_armclk_setrate, 241 .set_rate = s3c2443_armclk_setrate,
228 }, 242 },
229}; 243};