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authorBen Dooks <ben-linux@fluff.org>2009-05-17 17:32:23 -0400
committerBen Dooks <ben-linux@fluff.org>2009-05-18 11:26:03 -0400
commit070276d5d049f385763dee19112bea08f56c9a0d (patch)
tree5a32a885de72f18476ff067a25d8a159ac01629d /arch/arm/plat-s3c24xx
parent75cbcff3729fe2568dff38d16d6494f8fb7f59fe (diff)
[ARM] S3C24XX: GPIO: Change to macros for GPIO numbering
Prepare to remove the large number of S3C2410_GPxn defines by moving to S3C2410_GPx(n) in arch/arm. The following perl was used to change the files: perl -pi~ -e 's/S3C2410_GP([A-Z])([0-9]+)([^_^0-9])/S3C2410_GP\1\(\2\)\3/g' Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c24xx')
-rw-r--r--arch/arm/plat-s3c24xx/common-smdk.c24
-rw-r--r--arch/arm/plat-s3c24xx/gpio.c14
-rw-r--r--arch/arm/plat-s3c24xx/gpiolib.c14
-rw-r--r--arch/arm/plat-s3c24xx/pm.c8
-rw-r--r--arch/arm/plat-s3c24xx/setup-i2c.c4
-rw-r--r--arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c20
-rw-r--r--arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c20
7 files changed, 52 insertions, 52 deletions
diff --git a/arch/arm/plat-s3c24xx/common-smdk.c b/arch/arm/plat-s3c24xx/common-smdk.c
index fe658c48f724..aa119863c5ce 100644
--- a/arch/arm/plat-s3c24xx/common-smdk.c
+++ b/arch/arm/plat-s3c24xx/common-smdk.c
@@ -48,27 +48,27 @@
48/* LED devices */ 48/* LED devices */
49 49
50static struct s3c24xx_led_platdata smdk_pdata_led4 = { 50static struct s3c24xx_led_platdata smdk_pdata_led4 = {
51 .gpio = S3C2410_GPF4, 51 .gpio = S3C2410_GPF(4),
52 .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE, 52 .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
53 .name = "led4", 53 .name = "led4",
54 .def_trigger = "timer", 54 .def_trigger = "timer",
55}; 55};
56 56
57static struct s3c24xx_led_platdata smdk_pdata_led5 = { 57static struct s3c24xx_led_platdata smdk_pdata_led5 = {
58 .gpio = S3C2410_GPF5, 58 .gpio = S3C2410_GPF(5),
59 .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE, 59 .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
60 .name = "led5", 60 .name = "led5",
61 .def_trigger = "nand-disk", 61 .def_trigger = "nand-disk",
62}; 62};
63 63
64static struct s3c24xx_led_platdata smdk_pdata_led6 = { 64static struct s3c24xx_led_platdata smdk_pdata_led6 = {
65 .gpio = S3C2410_GPF6, 65 .gpio = S3C2410_GPF(6),
66 .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE, 66 .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
67 .name = "led6", 67 .name = "led6",
68}; 68};
69 69
70static struct s3c24xx_led_platdata smdk_pdata_led7 = { 70static struct s3c24xx_led_platdata smdk_pdata_led7 = {
71 .gpio = S3C2410_GPF7, 71 .gpio = S3C2410_GPF(7),
72 .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE, 72 .flags = S3C24XX_LEDF_ACTLOW | S3C24XX_LEDF_TRISTATE,
73 .name = "led7", 73 .name = "led7",
74}; 74};
@@ -185,15 +185,15 @@ void __init smdk_machine_init(void)
185{ 185{
186 /* Configure the LEDs (even if we have no LED support)*/ 186 /* Configure the LEDs (even if we have no LED support)*/
187 187
188 s3c2410_gpio_cfgpin(S3C2410_GPF4, S3C2410_GPIO_OUTPUT); 188 s3c2410_gpio_cfgpin(S3C2410_GPF(4), S3C2410_GPIO_OUTPUT);
189 s3c2410_gpio_cfgpin(S3C2410_GPF5, S3C2410_GPIO_OUTPUT); 189 s3c2410_gpio_cfgpin(S3C2410_GPF(5), S3C2410_GPIO_OUTPUT);
190 s3c2410_gpio_cfgpin(S3C2410_GPF6, S3C2410_GPIO_OUTPUT); 190 s3c2410_gpio_cfgpin(S3C2410_GPF(6), S3C2410_GPIO_OUTPUT);
191 s3c2410_gpio_cfgpin(S3C2410_GPF7, S3C2410_GPIO_OUTPUT); 191 s3c2410_gpio_cfgpin(S3C2410_GPF(7), S3C2410_GPIO_OUTPUT);
192 192
193 s3c2410_gpio_setpin(S3C2410_GPF4, 1); 193 s3c2410_gpio_setpin(S3C2410_GPF(4), 1);
194 s3c2410_gpio_setpin(S3C2410_GPF5, 1); 194 s3c2410_gpio_setpin(S3C2410_GPF(5), 1);
195 s3c2410_gpio_setpin(S3C2410_GPF6, 1); 195 s3c2410_gpio_setpin(S3C2410_GPF(6), 1);
196 s3c2410_gpio_setpin(S3C2410_GPF7, 1); 196 s3c2410_gpio_setpin(S3C2410_GPF(7), 1);
197 197
198 if (machine_is_smdk2443()) 198 if (machine_is_smdk2443())
199 smdk_nand_info.twrph0 = 50; 199 smdk_nand_info.twrph0 = 50;
diff --git a/arch/arm/plat-s3c24xx/gpio.c b/arch/arm/plat-s3c24xx/gpio.c
index 65ebbaff7d50..ae0b9d6f3fb8 100644
--- a/arch/arm/plat-s3c24xx/gpio.c
+++ b/arch/arm/plat-s3c24xx/gpio.c
@@ -183,19 +183,19 @@ EXPORT_SYMBOL(s3c2410_modify_misccr);
183 183
184int s3c2410_gpio_getirq(unsigned int pin) 184int s3c2410_gpio_getirq(unsigned int pin)
185{ 185{
186 if (pin < S3C2410_GPF0 || pin > S3C2410_GPG15) 186 if (pin < S3C2410_GPF(0) || pin > S3C2410_GPG(15))
187 return -1; /* not valid interrupts */ 187 return -1; /* not valid interrupts */
188 188
189 if (pin < S3C2410_GPG0 && pin > S3C2410_GPF7) 189 if (pin < S3C2410_GPG(0) && pin > S3C2410_GPF(7))
190 return -1; /* not valid pin */ 190 return -1; /* not valid pin */
191 191
192 if (pin < S3C2410_GPF4) 192 if (pin < S3C2410_GPF(4))
193 return (pin - S3C2410_GPF0) + IRQ_EINT0; 193 return (pin - S3C2410_GPF(0)) + IRQ_EINT0;
194 194
195 if (pin < S3C2410_GPG0) 195 if (pin < S3C2410_GPG(0))
196 return (pin - S3C2410_GPF4) + IRQ_EINT4; 196 return (pin - S3C2410_GPF(4)) + IRQ_EINT4;
197 197
198 return (pin - S3C2410_GPG0) + IRQ_EINT8; 198 return (pin - S3C2410_GPG(0)) + IRQ_EINT8;
199} 199}
200 200
201EXPORT_SYMBOL(s3c2410_gpio_getirq); 201EXPORT_SYMBOL(s3c2410_gpio_getirq);
diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c
index 60a9f7247205..a82adc3c98a5 100644
--- a/arch/arm/plat-s3c24xx/gpiolib.c
+++ b/arch/arm/plat-s3c24xx/gpiolib.c
@@ -82,7 +82,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
82 .base = S3C2410_GPACON, 82 .base = S3C2410_GPACON,
83 .pm = __gpio_pm(&s3c_gpio_pm_1bit), 83 .pm = __gpio_pm(&s3c_gpio_pm_1bit),
84 .chip = { 84 .chip = {
85 .base = S3C2410_GPA0, 85 .base = S3C2410_GPA(0),
86 .owner = THIS_MODULE, 86 .owner = THIS_MODULE,
87 .label = "GPIOA", 87 .label = "GPIOA",
88 .ngpio = 24, 88 .ngpio = 24,
@@ -94,7 +94,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
94 .base = S3C2410_GPBCON, 94 .base = S3C2410_GPBCON,
95 .pm = __gpio_pm(&s3c_gpio_pm_2bit), 95 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
96 .chip = { 96 .chip = {
97 .base = S3C2410_GPB0, 97 .base = S3C2410_GPB(0),
98 .owner = THIS_MODULE, 98 .owner = THIS_MODULE,
99 .label = "GPIOB", 99 .label = "GPIOB",
100 .ngpio = 16, 100 .ngpio = 16,
@@ -104,7 +104,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
104 .base = S3C2410_GPCCON, 104 .base = S3C2410_GPCCON,
105 .pm = __gpio_pm(&s3c_gpio_pm_2bit), 105 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
106 .chip = { 106 .chip = {
107 .base = S3C2410_GPC0, 107 .base = S3C2410_GPC(0),
108 .owner = THIS_MODULE, 108 .owner = THIS_MODULE,
109 .label = "GPIOC", 109 .label = "GPIOC",
110 .ngpio = 16, 110 .ngpio = 16,
@@ -114,7 +114,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
114 .base = S3C2410_GPDCON, 114 .base = S3C2410_GPDCON,
115 .pm = __gpio_pm(&s3c_gpio_pm_2bit), 115 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
116 .chip = { 116 .chip = {
117 .base = S3C2410_GPD0, 117 .base = S3C2410_GPD(0),
118 .owner = THIS_MODULE, 118 .owner = THIS_MODULE,
119 .label = "GPIOD", 119 .label = "GPIOD",
120 .ngpio = 16, 120 .ngpio = 16,
@@ -124,7 +124,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
124 .base = S3C2410_GPECON, 124 .base = S3C2410_GPECON,
125 .pm = __gpio_pm(&s3c_gpio_pm_2bit), 125 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
126 .chip = { 126 .chip = {
127 .base = S3C2410_GPE0, 127 .base = S3C2410_GPE(0),
128 .label = "GPIOE", 128 .label = "GPIOE",
129 .owner = THIS_MODULE, 129 .owner = THIS_MODULE,
130 .ngpio = 16, 130 .ngpio = 16,
@@ -134,7 +134,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
134 .base = S3C2410_GPFCON, 134 .base = S3C2410_GPFCON,
135 .pm = __gpio_pm(&s3c_gpio_pm_2bit), 135 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
136 .chip = { 136 .chip = {
137 .base = S3C2410_GPF0, 137 .base = S3C2410_GPF(0),
138 .owner = THIS_MODULE, 138 .owner = THIS_MODULE,
139 .label = "GPIOF", 139 .label = "GPIOF",
140 .ngpio = 8, 140 .ngpio = 8,
@@ -145,7 +145,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = {
145 .base = S3C2410_GPGCON, 145 .base = S3C2410_GPGCON,
146 .pm = __gpio_pm(&s3c_gpio_pm_2bit), 146 .pm = __gpio_pm(&s3c_gpio_pm_2bit),
147 .chip = { 147 .chip = {
148 .base = S3C2410_GPG0, 148 .base = S3C2410_GPG(0),
149 .owner = THIS_MODULE, 149 .owner = THIS_MODULE,
150 .label = "GPIOG", 150 .label = "GPIOG",
151 .ngpio = 10, 151 .ngpio = 10,
diff --git a/arch/arm/plat-s3c24xx/pm.c b/arch/arm/plat-s3c24xx/pm.c
index 16aaf36b6e5a..56e5253ca02c 100644
--- a/arch/arm/plat-s3c24xx/pm.c
+++ b/arch/arm/plat-s3c24xx/pm.c
@@ -124,12 +124,12 @@ void s3c_pm_configure_extint(void)
124 * and then configure it as an input if it is not 124 * and then configure it as an input if it is not
125 */ 125 */
126 126
127 for (pin = S3C2410_GPF0; pin <= S3C2410_GPF7; pin++) { 127 for (pin = S3C2410_GPF(0); pin <= S3C2410_GPF(7); pin++) {
128 s3c_pm_check_resume_pin(pin, pin - S3C2410_GPF0); 128 s3c_pm_check_resume_pin(pin, pin - S3C2410_GPF(0));
129 } 129 }
130 130
131 for (pin = S3C2410_GPG0; pin <= S3C2410_GPG7; pin++) { 131 for (pin = S3C2410_GPG(0); pin <= S3C2410_GPG(7); pin++) {
132 s3c_pm_check_resume_pin(pin, (pin - S3C2410_GPG0)+8); 132 s3c_pm_check_resume_pin(pin, (pin - S3C2410_GPG(0))+8);
133 } 133 }
134} 134}
135 135
diff --git a/arch/arm/plat-s3c24xx/setup-i2c.c b/arch/arm/plat-s3c24xx/setup-i2c.c
index e0d18530555e..71a6accf114e 100644
--- a/arch/arm/plat-s3c24xx/setup-i2c.c
+++ b/arch/arm/plat-s3c24xx/setup-i2c.c
@@ -21,6 +21,6 @@ struct platform_device;
21 21
22void s3c_i2c0_cfg_gpio(struct platform_device *dev) 22void s3c_i2c0_cfg_gpio(struct platform_device *dev)
23{ 23{
24 s3c2410_gpio_cfgpin(S3C2410_GPE15, S3C2410_GPE15_IICSDA); 24 s3c2410_gpio_cfgpin(S3C2410_GPE(15), S3C2410_GPE15_IICSDA);
25 s3c2410_gpio_cfgpin(S3C2410_GPE14, S3C2410_GPE14_IICSCL); 25 s3c2410_gpio_cfgpin(S3C2410_GPE(14), S3C2410_GPE14_IICSCL);
26} 26}
diff --git a/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c b/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c
index 8b403cbb53d2..9edf7894eedd 100644
--- a/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c
+++ b/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c
@@ -22,16 +22,16 @@ void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi,
22 int enable) 22 int enable)
23{ 23{
24 if (enable) { 24 if (enable) {
25 s3c2410_gpio_cfgpin(S3C2410_GPE13, S3C2410_GPE13_SPICLK0); 25 s3c2410_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPE13_SPICLK0);
26 s3c2410_gpio_cfgpin(S3C2410_GPE12, S3C2410_GPE12_SPIMOSI0); 26 s3c2410_gpio_cfgpin(S3C2410_GPE(12), S3C2410_GPE12_SPIMOSI0);
27 s3c2410_gpio_cfgpin(S3C2410_GPE11, S3C2410_GPE11_SPIMISO0); 27 s3c2410_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPE11_SPIMISO0);
28 s3c2410_gpio_pullup(S3C2410_GPE11, 0); 28 s3c2410_gpio_pullup(S3C2410_GPE(11), 0);
29 s3c2410_gpio_pullup(S3C2410_GPE13, 0); 29 s3c2410_gpio_pullup(S3C2410_GPE(13), 0);
30 } else { 30 } else {
31 s3c2410_gpio_cfgpin(S3C2410_GPE13, S3C2410_GPIO_INPUT); 31 s3c2410_gpio_cfgpin(S3C2410_GPE(13), S3C2410_GPIO_INPUT);
32 s3c2410_gpio_cfgpin(S3C2410_GPE11, S3C2410_GPIO_INPUT); 32 s3c2410_gpio_cfgpin(S3C2410_GPE(11), S3C2410_GPIO_INPUT);
33 s3c2410_gpio_pullup(S3C2410_GPE11, 1); 33 s3c2410_gpio_pullup(S3C2410_GPE(11), 1);
34 s3c2410_gpio_pullup(S3C2410_GPE12, 1); 34 s3c2410_gpio_pullup(S3C2410_GPE(12), 1);
35 s3c2410_gpio_pullup(S3C2410_GPE13, 1); 35 s3c2410_gpio_pullup(S3C2410_GPE(13), 1);
36 } 36 }
37} 37}
diff --git a/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c b/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c
index 8fccd4e549f0..f34d0fc69ad8 100644
--- a/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c
+++ b/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c
@@ -22,16 +22,16 @@ void s3c24xx_spi_gpiocfg_bus1_gpg5_6_7(struct s3c2410_spi_info *spi,
22 int enable) 22 int enable)
23{ 23{
24 if (enable) { 24 if (enable) {
25 s3c2410_gpio_cfgpin(S3C2410_GPG7, S3C2410_GPG7_SPICLK1); 25 s3c2410_gpio_cfgpin(S3C2410_GPG(7), S3C2410_GPG7_SPICLK1);
26 s3c2410_gpio_cfgpin(S3C2410_GPG6, S3C2410_GPG6_SPIMOSI1); 26 s3c2410_gpio_cfgpin(S3C2410_GPG(6), S3C2410_GPG6_SPIMOSI1);
27 s3c2410_gpio_cfgpin(S3C2410_GPG5, S3C2410_GPG5_SPIMISO1); 27 s3c2410_gpio_cfgpin(S3C2410_GPG(5), S3C2410_GPG5_SPIMISO1);
28 s3c2410_gpio_pullup(S3C2410_GPG5, 0); 28 s3c2410_gpio_pullup(S3C2410_GPG(5), 0);
29 s3c2410_gpio_pullup(S3C2410_GPG6, 0); 29 s3c2410_gpio_pullup(S3C2410_GPG(6), 0);
30 } else { 30 } else {
31 s3c2410_gpio_cfgpin(S3C2410_GPG7, S3C2410_GPIO_INPUT); 31 s3c2410_gpio_cfgpin(S3C2410_GPG(7), S3C2410_GPIO_INPUT);
32 s3c2410_gpio_cfgpin(S3C2410_GPG5, S3C2410_GPIO_INPUT); 32 s3c2410_gpio_cfgpin(S3C2410_GPG(5), S3C2410_GPIO_INPUT);
33 s3c2410_gpio_pullup(S3C2410_GPG5, 1); 33 s3c2410_gpio_pullup(S3C2410_GPG(5), 1);
34 s3c2410_gpio_pullup(S3C2410_GPG6, 1); 34 s3c2410_gpio_pullup(S3C2410_GPG(6), 1);
35 s3c2410_gpio_pullup(S3C2410_GPG7, 1); 35 s3c2410_gpio_pullup(S3C2410_GPG(7), 1);
36 } 36 }
37} 37}