diff options
author | Ben Dooks <ben-linux@fluff.org> | 2010-02-05 07:52:53 -0500 |
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committer | Ben Dooks <ben-linux@fluff.org> | 2010-02-20 17:34:03 -0500 |
commit | 431fb7df24ebf360ba35895a60d084de364e39f8 (patch) | |
tree | 0aedc22279524a21f48da577edcbdbbbfe35ef6b /arch/arm/plat-s3c24xx | |
parent | 89f0ce721c0bc95c109300edcd8525d8ea5df8f2 (diff) |
ARM: SAMSUNG: Move pm-core.h to machine directory
Move the pm-core.h to the machine include directory in the process of
eliminating the plat-s3c64xx.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c24xx')
-rw-r--r-- | arch/arm/plat-s3c24xx/include/plat/pm-core.h | 64 |
1 files changed, 0 insertions, 64 deletions
diff --git a/arch/arm/plat-s3c24xx/include/plat/pm-core.h b/arch/arm/plat-s3c24xx/include/plat/pm-core.h deleted file mode 100644 index fb45dd9adca5..000000000000 --- a/arch/arm/plat-s3c24xx/include/plat/pm-core.h +++ /dev/null | |||
@@ -1,64 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s3c24xx/include/plat/pll.h | ||
2 | * | ||
3 | * Copyright 2008 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * | ||
7 | * S3C24xx - PM core support for arch/arm/plat-s3c/pm.c | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | static inline void s3c_pm_debug_init_uart(void) | ||
15 | { | ||
16 | unsigned long tmp = __raw_readl(S3C2410_CLKCON); | ||
17 | |||
18 | /* re-start uart clocks */ | ||
19 | tmp |= S3C2410_CLKCON_UART0; | ||
20 | tmp |= S3C2410_CLKCON_UART1; | ||
21 | tmp |= S3C2410_CLKCON_UART2; | ||
22 | |||
23 | __raw_writel(tmp, S3C2410_CLKCON); | ||
24 | udelay(10); | ||
25 | } | ||
26 | |||
27 | static inline void s3c_pm_arch_prepare_irqs(void) | ||
28 | { | ||
29 | __raw_writel(s3c_irqwake_intmask, S3C2410_INTMSK); | ||
30 | __raw_writel(s3c_irqwake_eintmask, S3C2410_EINTMASK); | ||
31 | |||
32 | /* ack any outstanding external interrupts before we go to sleep */ | ||
33 | |||
34 | __raw_writel(__raw_readl(S3C2410_EINTPEND), S3C2410_EINTPEND); | ||
35 | __raw_writel(__raw_readl(S3C2410_INTPND), S3C2410_INTPND); | ||
36 | __raw_writel(__raw_readl(S3C2410_SRCPND), S3C2410_SRCPND); | ||
37 | |||
38 | } | ||
39 | |||
40 | static inline void s3c_pm_arch_stop_clocks(void) | ||
41 | { | ||
42 | __raw_writel(0x00, S3C2410_CLKCON); /* turn off clocks over sleep */ | ||
43 | } | ||
44 | |||
45 | static void s3c_pm_show_resume_irqs(int start, unsigned long which, | ||
46 | unsigned long mask); | ||
47 | |||
48 | static inline void s3c_pm_arch_show_resume_irqs(void) | ||
49 | { | ||
50 | S3C_PMDBG("post sleep: IRQs 0x%08x, 0x%08x\n", | ||
51 | __raw_readl(S3C2410_SRCPND), | ||
52 | __raw_readl(S3C2410_EINTPEND)); | ||
53 | |||
54 | s3c_pm_show_resume_irqs(IRQ_EINT0, __raw_readl(S3C2410_SRCPND), | ||
55 | s3c_irqwake_intmask); | ||
56 | |||
57 | s3c_pm_show_resume_irqs(IRQ_EINT4-4, __raw_readl(S3C2410_EINTPEND), | ||
58 | s3c_irqwake_eintmask); | ||
59 | } | ||
60 | |||
61 | static inline void s3c_pm_arch_update_uart(void __iomem *regs, | ||
62 | struct pm_uart_save *save) | ||
63 | { | ||
64 | } | ||