diff options
author | Ben Dooks <ben-linux@fluff.org> | 2009-05-17 17:18:27 -0400 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2009-05-18 11:26:02 -0400 |
commit | fda7b2b097fed9f88bc93ed3de0caea87ffe778e (patch) | |
tree | d191152a80a542581451beba66619bc1016bdd3b /arch/arm/plat-s3c24xx | |
parent | 9c7099ca7519268f6ec79782bc06faa27a714d95 (diff) |
[ARM] S3C24XX: GPIO: Start removal of S3C24XX_GPIO_BASE
The S3C24XX_GPIO_BASE makes it difficult to compress the
GPIO number space, and is only used in a few places of
which everything outside arch/arm/plat-s3c24xx/gpiolib.c
will be removed as soon as possible.
Change gpiolib.c to use the S3C2410_GPxCON register addresses
as the base for each bank, thus eliminating S3C24XX_GPIO_BASE.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c24xx')
-rw-r--r-- | arch/arm/plat-s3c24xx/gpiolib.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/plat-s3c24xx/gpiolib.c b/arch/arm/plat-s3c24xx/gpiolib.c index 3cbec6d3f381..60a9f7247205 100644 --- a/arch/arm/plat-s3c24xx/gpiolib.c +++ b/arch/arm/plat-s3c24xx/gpiolib.c | |||
@@ -79,7 +79,7 @@ static int s3c24xx_gpiolib_bankg_toirq(struct gpio_chip *chip, unsigned offset) | |||
79 | 79 | ||
80 | struct s3c_gpio_chip s3c24xx_gpios[] = { | 80 | struct s3c_gpio_chip s3c24xx_gpios[] = { |
81 | [0] = { | 81 | [0] = { |
82 | .base = S3C24XX_GPIO_BASE(S3C2410_GPA0), | 82 | .base = S3C2410_GPACON, |
83 | .pm = __gpio_pm(&s3c_gpio_pm_1bit), | 83 | .pm = __gpio_pm(&s3c_gpio_pm_1bit), |
84 | .chip = { | 84 | .chip = { |
85 | .base = S3C2410_GPA0, | 85 | .base = S3C2410_GPA0, |
@@ -91,7 +91,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { | |||
91 | }, | 91 | }, |
92 | }, | 92 | }, |
93 | [1] = { | 93 | [1] = { |
94 | .base = S3C24XX_GPIO_BASE(S3C2410_GPB0), | 94 | .base = S3C2410_GPBCON, |
95 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), | 95 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), |
96 | .chip = { | 96 | .chip = { |
97 | .base = S3C2410_GPB0, | 97 | .base = S3C2410_GPB0, |
@@ -101,7 +101,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { | |||
101 | }, | 101 | }, |
102 | }, | 102 | }, |
103 | [2] = { | 103 | [2] = { |
104 | .base = S3C24XX_GPIO_BASE(S3C2410_GPC0), | 104 | .base = S3C2410_GPCCON, |
105 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), | 105 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), |
106 | .chip = { | 106 | .chip = { |
107 | .base = S3C2410_GPC0, | 107 | .base = S3C2410_GPC0, |
@@ -111,7 +111,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { | |||
111 | }, | 111 | }, |
112 | }, | 112 | }, |
113 | [3] = { | 113 | [3] = { |
114 | .base = S3C24XX_GPIO_BASE(S3C2410_GPD0), | 114 | .base = S3C2410_GPDCON, |
115 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), | 115 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), |
116 | .chip = { | 116 | .chip = { |
117 | .base = S3C2410_GPD0, | 117 | .base = S3C2410_GPD0, |
@@ -121,7 +121,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { | |||
121 | }, | 121 | }, |
122 | }, | 122 | }, |
123 | [4] = { | 123 | [4] = { |
124 | .base = S3C24XX_GPIO_BASE(S3C2410_GPE0), | 124 | .base = S3C2410_GPECON, |
125 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), | 125 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), |
126 | .chip = { | 126 | .chip = { |
127 | .base = S3C2410_GPE0, | 127 | .base = S3C2410_GPE0, |
@@ -131,7 +131,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { | |||
131 | }, | 131 | }, |
132 | }, | 132 | }, |
133 | [5] = { | 133 | [5] = { |
134 | .base = S3C24XX_GPIO_BASE(S3C2410_GPF0), | 134 | .base = S3C2410_GPFCON, |
135 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), | 135 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), |
136 | .chip = { | 136 | .chip = { |
137 | .base = S3C2410_GPF0, | 137 | .base = S3C2410_GPF0, |
@@ -142,7 +142,7 @@ struct s3c_gpio_chip s3c24xx_gpios[] = { | |||
142 | }, | 142 | }, |
143 | }, | 143 | }, |
144 | [6] = { | 144 | [6] = { |
145 | .base = S3C24XX_GPIO_BASE(S3C2410_GPG0), | 145 | .base = S3C2410_GPGCON, |
146 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), | 146 | .pm = __gpio_pm(&s3c_gpio_pm_2bit), |
147 | .chip = { | 147 | .chip = { |
148 | .base = S3C2410_GPG0, | 148 | .base = S3C2410_GPG0, |