diff options
author | Ben Dooks <ben-linux@fluff.org> | 2008-10-21 09:06:53 -0400 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2008-12-15 16:46:15 -0500 |
commit | b915a125112b2500d5c6fd752948afc170a49cef (patch) | |
tree | 7d5351abdb6c3e90297bccb56ae8fd377f056c83 /arch/arm/plat-s3c24xx | |
parent | 6af0e929e9fb60a8e2609555129713f310188f33 (diff) |
[ARM] S3C: Move time.c to arch/arm/plat-s3c
Move time.c to arch/arm/plat-s3c
to be shared with the S3C64XX implementations.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c24xx')
-rw-r--r-- | arch/arm/plat-s3c24xx/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/plat-s3c24xx/time.c | 260 |
2 files changed, 0 insertions, 261 deletions
diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile index 80cf8eb211ff..8da14beda770 100644 --- a/arch/arm/plat-s3c24xx/Makefile +++ b/arch/arm/plat-s3c24xx/Makefile | |||
@@ -17,7 +17,6 @@ obj-y += irq.o | |||
17 | obj-y += devs.o | 17 | obj-y += devs.o |
18 | obj-y += gpio.o | 18 | obj-y += gpio.o |
19 | obj-y += gpiolib.o | 19 | obj-y += gpiolib.o |
20 | obj-y += time.o | ||
21 | obj-y += clock.o | 20 | obj-y += clock.o |
22 | obj-y += pwm-clock.o | 21 | obj-y += pwm-clock.o |
23 | obj-$(CONFIG_S3C24XX_DCLK) += clock-dclk.o | 22 | obj-$(CONFIG_S3C24XX_DCLK) += clock-dclk.o |
diff --git a/arch/arm/plat-s3c24xx/time.c b/arch/arm/plat-s3c24xx/time.c deleted file mode 100644 index c51916236ac0..000000000000 --- a/arch/arm/plat-s3c24xx/time.c +++ /dev/null | |||
@@ -1,260 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-s3c24xx/time.c | ||
2 | * | ||
3 | * Copyright (C) 2003-2005 Simtec Electronics | ||
4 | * Ben Dooks, <ben@simtec.co.uk> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | |||
21 | #include <linux/kernel.h> | ||
22 | #include <linux/sched.h> | ||
23 | #include <linux/init.h> | ||
24 | #include <linux/interrupt.h> | ||
25 | #include <linux/irq.h> | ||
26 | #include <linux/err.h> | ||
27 | #include <linux/clk.h> | ||
28 | #include <linux/io.h> | ||
29 | |||
30 | #include <asm/system.h> | ||
31 | #include <asm/leds.h> | ||
32 | #include <asm/mach-types.h> | ||
33 | |||
34 | #include <asm/irq.h> | ||
35 | #include <mach/map.h> | ||
36 | #include <plat/regs-timer.h> | ||
37 | #include <mach/regs-irq.h> | ||
38 | #include <asm/mach/time.h> | ||
39 | |||
40 | #include <plat/clock.h> | ||
41 | #include <plat/cpu.h> | ||
42 | |||
43 | static unsigned long timer_startval; | ||
44 | static unsigned long timer_usec_ticks; | ||
45 | |||
46 | #define TIMER_USEC_SHIFT 16 | ||
47 | |||
48 | /* we use the shifted arithmetic to work out the ratio of timer ticks | ||
49 | * to usecs, as often the peripheral clock is not a nice even multiple | ||
50 | * of 1MHz. | ||
51 | * | ||
52 | * shift of 14 and 15 are too low for the 12MHz, 16 seems to be ok | ||
53 | * for the current HZ value of 200 without producing overflows. | ||
54 | * | ||
55 | * Original patch by Dimitry Andric, updated by Ben Dooks | ||
56 | */ | ||
57 | |||
58 | |||
59 | /* timer_mask_usec_ticks | ||
60 | * | ||
61 | * given a clock and divisor, make the value to pass into timer_ticks_to_usec | ||
62 | * to scale the ticks into usecs | ||
63 | */ | ||
64 | |||
65 | static inline unsigned long | ||
66 | timer_mask_usec_ticks(unsigned long scaler, unsigned long pclk) | ||
67 | { | ||
68 | unsigned long den = pclk / 1000; | ||
69 | |||
70 | return ((1000 << TIMER_USEC_SHIFT) * scaler + (den >> 1)) / den; | ||
71 | } | ||
72 | |||
73 | /* timer_ticks_to_usec | ||
74 | * | ||
75 | * convert timer ticks to usec. | ||
76 | */ | ||
77 | |||
78 | static inline unsigned long timer_ticks_to_usec(unsigned long ticks) | ||
79 | { | ||
80 | unsigned long res; | ||
81 | |||
82 | res = ticks * timer_usec_ticks; | ||
83 | res += 1 << (TIMER_USEC_SHIFT - 4); /* round up slightly */ | ||
84 | |||
85 | return res >> TIMER_USEC_SHIFT; | ||
86 | } | ||
87 | |||
88 | /*** | ||
89 | * Returns microsecond since last clock interrupt. Note that interrupts | ||
90 | * will have been disabled by do_gettimeoffset() | ||
91 | * IRQs are disabled before entering here from do_gettimeofday() | ||
92 | */ | ||
93 | |||
94 | #define SRCPND_TIMER4 (1<<(IRQ_TIMER4 - IRQ_EINT0)) | ||
95 | |||
96 | static unsigned long s3c2410_gettimeoffset (void) | ||
97 | { | ||
98 | unsigned long tdone; | ||
99 | unsigned long irqpend; | ||
100 | unsigned long tval; | ||
101 | |||
102 | /* work out how many ticks have gone since last timer interrupt */ | ||
103 | |||
104 | tval = __raw_readl(S3C2410_TCNTO(4)); | ||
105 | tdone = timer_startval - tval; | ||
106 | |||
107 | /* check to see if there is an interrupt pending */ | ||
108 | |||
109 | irqpend = __raw_readl(S3C2410_SRCPND); | ||
110 | if (irqpend & SRCPND_TIMER4) { | ||
111 | /* re-read the timer, and try and fix up for the missed | ||
112 | * interrupt. Note, the interrupt may go off before the | ||
113 | * timer has re-loaded from wrapping. | ||
114 | */ | ||
115 | |||
116 | tval = __raw_readl(S3C2410_TCNTO(4)); | ||
117 | tdone = timer_startval - tval; | ||
118 | |||
119 | if (tval != 0) | ||
120 | tdone += timer_startval; | ||
121 | } | ||
122 | |||
123 | return timer_ticks_to_usec(tdone); | ||
124 | } | ||
125 | |||
126 | |||
127 | /* | ||
128 | * IRQ handler for the timer | ||
129 | */ | ||
130 | static irqreturn_t | ||
131 | s3c2410_timer_interrupt(int irq, void *dev_id) | ||
132 | { | ||
133 | timer_tick(); | ||
134 | return IRQ_HANDLED; | ||
135 | } | ||
136 | |||
137 | static struct irqaction s3c2410_timer_irq = { | ||
138 | .name = "S3C2410 Timer Tick", | ||
139 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | ||
140 | .handler = s3c2410_timer_interrupt, | ||
141 | }; | ||
142 | |||
143 | #define use_tclk1_12() ( \ | ||
144 | machine_is_bast() || \ | ||
145 | machine_is_vr1000() || \ | ||
146 | machine_is_anubis() || \ | ||
147 | machine_is_osiris() ) | ||
148 | |||
149 | /* | ||
150 | * Set up timer interrupt, and return the current time in seconds. | ||
151 | * | ||
152 | * Currently we only use timer4, as it is the only timer which has no | ||
153 | * other function that can be exploited externally | ||
154 | */ | ||
155 | static void s3c2410_timer_setup (void) | ||
156 | { | ||
157 | unsigned long tcon; | ||
158 | unsigned long tcnt; | ||
159 | unsigned long tcfg1; | ||
160 | unsigned long tcfg0; | ||
161 | |||
162 | tcnt = 0xffff; /* default value for tcnt */ | ||
163 | |||
164 | /* read the current timer configuration bits */ | ||
165 | |||
166 | tcon = __raw_readl(S3C2410_TCON); | ||
167 | tcfg1 = __raw_readl(S3C2410_TCFG1); | ||
168 | tcfg0 = __raw_readl(S3C2410_TCFG0); | ||
169 | |||
170 | /* configure the system for whichever machine is in use */ | ||
171 | |||
172 | if (use_tclk1_12()) { | ||
173 | /* timer is at 12MHz, scaler is 1 */ | ||
174 | timer_usec_ticks = timer_mask_usec_ticks(1, 12000000); | ||
175 | tcnt = 12000000 / HZ; | ||
176 | |||
177 | tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK; | ||
178 | tcfg1 |= S3C2410_TCFG1_MUX4_TCLK1; | ||
179 | } else { | ||
180 | unsigned long pclk; | ||
181 | struct clk *clk; | ||
182 | |||
183 | /* for the h1940 (and others), we use the pclk from the core | ||
184 | * to generate the timer values. since values around 50 to | ||
185 | * 70MHz are not values we can directly generate the timer | ||
186 | * value from, we need to pre-scale and divide before using it. | ||
187 | * | ||
188 | * for instance, using 50.7MHz and dividing by 6 gives 8.45MHz | ||
189 | * (8.45 ticks per usec) | ||
190 | */ | ||
191 | |||
192 | /* this is used as default if no other timer can be found */ | ||
193 | |||
194 | clk = clk_get(NULL, "timers"); | ||
195 | if (IS_ERR(clk)) | ||
196 | panic("failed to get clock for system timer"); | ||
197 | |||
198 | clk_enable(clk); | ||
199 | |||
200 | pclk = clk_get_rate(clk); | ||
201 | |||
202 | /* configure clock tick */ | ||
203 | |||
204 | timer_usec_ticks = timer_mask_usec_ticks(6, pclk); | ||
205 | |||
206 | tcfg1 &= ~S3C2410_TCFG1_MUX4_MASK; | ||
207 | tcfg1 |= S3C2410_TCFG1_MUX4_DIV2; | ||
208 | |||
209 | tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK; | ||
210 | tcfg0 |= ((6 - 1) / 2) << S3C2410_TCFG_PRESCALER1_SHIFT; | ||
211 | |||
212 | tcnt = (pclk / 6) / HZ; | ||
213 | } | ||
214 | |||
215 | /* timers reload after counting zero, so reduce the count by 1 */ | ||
216 | |||
217 | tcnt--; | ||
218 | |||
219 | printk("timer tcon=%08lx, tcnt %04lx, tcfg %08lx,%08lx, usec %08lx\n", | ||
220 | tcon, tcnt, tcfg0, tcfg1, timer_usec_ticks); | ||
221 | |||
222 | /* check to see if timer is within 16bit range... */ | ||
223 | if (tcnt > 0xffff) { | ||
224 | panic("setup_timer: HZ is too small, cannot configure timer!"); | ||
225 | return; | ||
226 | } | ||
227 | |||
228 | __raw_writel(tcfg1, S3C2410_TCFG1); | ||
229 | __raw_writel(tcfg0, S3C2410_TCFG0); | ||
230 | |||
231 | timer_startval = tcnt; | ||
232 | __raw_writel(tcnt, S3C2410_TCNTB(4)); | ||
233 | |||
234 | /* ensure timer is stopped... */ | ||
235 | |||
236 | tcon &= ~(7<<20); | ||
237 | tcon |= S3C2410_TCON_T4RELOAD; | ||
238 | tcon |= S3C2410_TCON_T4MANUALUPD; | ||
239 | |||
240 | __raw_writel(tcon, S3C2410_TCON); | ||
241 | __raw_writel(tcnt, S3C2410_TCNTB(4)); | ||
242 | __raw_writel(tcnt, S3C2410_TCMPB(4)); | ||
243 | |||
244 | /* start the timer running */ | ||
245 | tcon |= S3C2410_TCON_T4START; | ||
246 | tcon &= ~S3C2410_TCON_T4MANUALUPD; | ||
247 | __raw_writel(tcon, S3C2410_TCON); | ||
248 | } | ||
249 | |||
250 | static void __init s3c2410_timer_init (void) | ||
251 | { | ||
252 | s3c2410_timer_setup(); | ||
253 | setup_irq(IRQ_TIMER4, &s3c2410_timer_irq); | ||
254 | } | ||
255 | |||
256 | struct sys_timer s3c24xx_timer = { | ||
257 | .init = s3c2410_timer_init, | ||
258 | .offset = s3c2410_gettimeoffset, | ||
259 | .resume = s3c2410_timer_setup | ||
260 | }; | ||