diff options
author | Ben Dooks <ben-linux@fluff.org> | 2008-10-21 09:06:38 -0400 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2008-12-15 16:46:08 -0500 |
commit | e425382ed90d221ef9031a1b2d97d9bfedcf90c3 (patch) | |
tree | ca36882dba4caf8a9726ed67216251360c80ef59 /arch/arm/plat-s3c24xx/s3c244x.c | |
parent | c3391e36d697c997b6afeb045071e0be95219a3e (diff) |
[ARM] S3C24XX: Update clock data on resume
Update the clock settings on resume for suspend/resume
support so that if the boot loader changes anything or
the system's PLL is reset then we return with the correct
settings.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c24xx/s3c244x.c')
-rw-r--r-- | arch/arm/plat-s3c24xx/s3c244x.c | 21 |
1 files changed, 16 insertions, 5 deletions
diff --git a/arch/arm/plat-s3c24xx/s3c244x.c b/arch/arm/plat-s3c24xx/s3c244x.c index 7f33cef20bac..494368403055 100644 --- a/arch/arm/plat-s3c24xx/s3c244x.c +++ b/arch/arm/plat-s3c24xx/s3c244x.c | |||
@@ -29,6 +29,8 @@ | |||
29 | #include <mach/hardware.h> | 29 | #include <mach/hardware.h> |
30 | #include <asm/irq.h> | 30 | #include <asm/irq.h> |
31 | 31 | ||
32 | #include <plat/cpu-freq.h> | ||
33 | |||
32 | #include <mach/regs-clock.h> | 34 | #include <mach/regs-clock.h> |
33 | #include <plat/regs-serial.h> | 35 | #include <plat/regs-serial.h> |
34 | #include <mach/regs-gpio.h> | 36 | #include <mach/regs-gpio.h> |
@@ -71,15 +73,18 @@ void __init s3c244x_map_io(void) | |||
71 | s3c_device_usbgadget.name = "s3c2440-usbgadget"; | 73 | s3c_device_usbgadget.name = "s3c2440-usbgadget"; |
72 | } | 74 | } |
73 | 75 | ||
74 | void __init s3c244x_init_clocks(int xtal) | 76 | void __init_or_cpufreq s3c244x_setup_clocks(void) |
75 | { | 77 | { |
78 | struct clk *xtal_clk; | ||
76 | unsigned long clkdiv; | 79 | unsigned long clkdiv; |
77 | unsigned long camdiv; | 80 | unsigned long camdiv; |
81 | unsigned long xtal; | ||
78 | unsigned long hclk, fclk, pclk; | 82 | unsigned long hclk, fclk, pclk; |
79 | int hdiv = 1; | 83 | int hdiv = 1; |
80 | 84 | ||
81 | /* now we've got our machine bits initialised, work out what | 85 | xtal_clk = clk_get(NULL, "xtal"); |
82 | * clocks we've got */ | 86 | xtal = clk_get_rate(xtal_clk); |
87 | clk_put(xtal_clk); | ||
83 | 88 | ||
84 | fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2; | 89 | fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2; |
85 | 90 | ||
@@ -107,18 +112,24 @@ void __init s3c244x_init_clocks(int xtal) | |||
107 | } | 112 | } |
108 | 113 | ||
109 | hclk = fclk / hdiv; | 114 | hclk = fclk / hdiv; |
110 | pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1); | 115 | pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN) ? 2 : 1); |
111 | 116 | ||
112 | /* print brief summary of clocks, etc */ | 117 | /* print brief summary of clocks, etc */ |
113 | 118 | ||
114 | printk("S3C244X: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n", | 119 | printk("S3C244X: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n", |
115 | print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); | 120 | print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); |
116 | 121 | ||
122 | s3c24xx_setup_clocks(fclk, hclk, pclk); | ||
123 | } | ||
124 | |||
125 | void __init s3c244x_init_clocks(int xtal) | ||
126 | { | ||
117 | /* initialise the clocks here, to allow other things like the | 127 | /* initialise the clocks here, to allow other things like the |
118 | * console to use them, and to add new ones after the initialisation | 128 | * console to use them, and to add new ones after the initialisation |
119 | */ | 129 | */ |
120 | 130 | ||
121 | s3c24xx_setup_clocks(xtal, fclk, hclk, pclk); | 131 | s3c24xx_register_baseclocks(xtal); |
132 | s3c244x_setup_clocks(); | ||
122 | s3c2410_baseclk_add(); | 133 | s3c2410_baseclk_add(); |
123 | } | 134 | } |
124 | 135 | ||