diff options
author | Ben Dooks <ben-linux@fluff.org> | 2010-04-27 23:58:13 -0400 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2010-05-09 22:44:38 -0400 |
commit | 4e04691bc600b53f6aab63404e58fae3bdf8e310 (patch) | |
tree | e38f054ccb1ed1eb49315a2da15851009229c163 /arch/arm/plat-s3c24xx/s3c2410-clock.c | |
parent | e561aacc70716ff59b9359ba8f010609ee757241 (diff) |
ARM: SAMSUNG: Add s3c_disable_clocks() and tidy init+disable usage
Add s3c_disable_clocks() and change the clock registration code to use
the s3c_register_clocks() followed by s3c_disable_clocks() instead of
the loops it was using.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c24xx/s3c2410-clock.c')
-rw-r--r-- | arch/arm/plat-s3c24xx/s3c2410-clock.c | 15 |
1 files changed, 3 insertions, 12 deletions
diff --git a/arch/arm/plat-s3c24xx/s3c2410-clock.c b/arch/arm/plat-s3c24xx/s3c2410-clock.c index b61bdb793734..9ecc5d913679 100644 --- a/arch/arm/plat-s3c24xx/s3c2410-clock.c +++ b/arch/arm/plat-s3c24xx/s3c2410-clock.c | |||
@@ -87,7 +87,7 @@ static int s3c2410_upll_enable(struct clk *clk, int enable) | |||
87 | 87 | ||
88 | /* standard clock definitions */ | 88 | /* standard clock definitions */ |
89 | 89 | ||
90 | static struct clk init_clocks_disable[] = { | 90 | static struct clk init_clocks_off[] = { |
91 | { | 91 | { |
92 | .name = "nand", | 92 | .name = "nand", |
93 | .id = -1, | 93 | .id = -1, |
@@ -249,17 +249,8 @@ int __init s3c2410_baseclk_add(void) | |||
249 | 249 | ||
250 | /* install (and disable) the clocks we do not need immediately */ | 250 | /* install (and disable) the clocks we do not need immediately */ |
251 | 251 | ||
252 | clkp = init_clocks_disable; | 252 | s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
253 | for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { | 253 | s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); |
254 | |||
255 | ret = s3c24xx_register_clock(clkp); | ||
256 | if (ret < 0) { | ||
257 | printk(KERN_ERR "Failed to register clock %s (%d)\n", | ||
258 | clkp->name, ret); | ||
259 | } | ||
260 | |||
261 | s3c2410_clkcon_enable(clkp, 0); | ||
262 | } | ||
263 | 254 | ||
264 | /* show the clock-slow value */ | 255 | /* show the clock-slow value */ |
265 | 256 | ||