Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (51 commits)
  [ARM] 5308/1: Fix Viper ISA IRQ handling
  [ARM] 5307/1: pxa: fix CM-X2XX PCMCIA build error
  [ARM] 5306/1: pxa: fix build error on CM-X270
  [ARM] 5302/1: ARM: OMAP: Revert omap3 WDT changes to avoid merge conflict
  [ARM] 5305/1: ARM: OMAP: Fix compile of McBSP by removing unnecessary check
  [ARM] 5301/1: ARM: OMAP: Add missing irq defines
  ARM: OMAP3: Add default kernel config for OMAP LDP
  ARM: OMAP3: Add basic board support for OMAP LDP
  ARM: OMAP3: Defconfig for the Gumstix Overo board (rev 3)
  ARM: OMAP3: Add support for the Gumstix Overo board (rev 3)
  ARM: OMAP3: Add Beagle defconfig
  ARM: OMAP3: Add minimal Beagle board support
  ARM: OMAP3: Add minimal omap3430 support
  ARM: OMAP2: Fix sparse, checkpatch warnings in OMAP2/3 IRQ code
  ARM: OMAP: Fixes to omap_mcbsp_request function
  ARM: OMAP: Add support for OMAP2430 in McBSP
  ARM: OMAP: Add support for McBSP devices 3 - 5 on 34xx
  ARM: OMAP: Allocate McBSP devices dynamically
  Fix sections for omap-mcbsp platform driver
  [ARM] S3C24XX: Additional include moves
  ...

1 files changed, 82 insertions, 0 deletions

diff --git a/arch/arm/plat-s3c24xx/include/plat/dma.h b/arch/arm/plat-s3c24xx/include/plat/dma.h
new file mode 100644
index 000000000000..c78efe316fc8
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/include/plat/dma.h
@@ -0,0 +1,82 @@
+/* linux/include/asm-arm/plat-s3c24xx/dma.h
+ *
+ * Copyright (C) 2006 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * Samsung S3C24XX DMA support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+extern struct sysdev_class dma_sysclass;
+extern struct s3c2410_dma_chan s3c2410_chans[S3C2410_DMA_CHANNELS];
+
+#define DMA_CH_VALID            (1<<31)
+#define DMA_CH_NEVER            (1<<30)
+
+struct s3c24xx_dma_addr {
+        unsigned long           from;
+        unsigned long           to;
+};
+
+/* struct s3c24xx_dma_map
+ *
+ * this holds the mapping information for the channel selected
+ * to be connected to the specified device
+*/
+
+struct s3c24xx_dma_map {
+        const char              *name;
+        struct s3c24xx_dma_addr  hw_addr;
+
+        unsigned long            channels[S3C2410_DMA_CHANNELS];
+        unsigned long            channels_rx[S3C2410_DMA_CHANNELS];
+};
+
+struct s3c24xx_dma_selection {
+        struct s3c24xx_dma_map  *map;
+        unsigned long            map_size;
+        unsigned long            dcon_mask;
+
+        void    (*select)(struct s3c2410_dma_chan *chan,
+                          struct s3c24xx_dma_map *map);
+
+        void    (*direction)(struct s3c2410_dma_chan *chan,
+                             struct s3c24xx_dma_map *map,
+                             enum s3c2410_dmasrc dir);
+};
+
+extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel);
+
+/* struct s3c24xx_dma_order_ch
+ *
+ * channel map for one of the `enum dma_ch` dma channels. the list
+ * entry contains a set of low-level channel numbers, orred with
+ * DMA_CH_VALID, which are checked in the order in the array.
+*/
+
+struct s3c24xx_dma_order_ch {
+        unsigned int    list[S3C2410_DMA_CHANNELS];     /* list of channels */
+        unsigned int    flags;                          /* flags */
+};
+
+/* struct s3c24xx_dma_order
+ *
+ * information provided by either the core or the board to give the
+ * dma system a hint on how to allocate channels
+*/
+
+struct s3c24xx_dma_order {
+        struct s3c24xx_dma_order_ch     channels[DMACH_MAX];
+};
+
+extern int s3c24xx_dma_order_set(struct s3c24xx_dma_order *map);
+
+/* DMA init code, called from the cpu support code */
+
+extern int s3c2410_dma_init(void);
+
+extern int s3c24xx_dma_init(unsigned int channels, unsigned int irq,
+                            unsigned int stride);