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authorBen Dooks <ben-linux@fluff.org>2009-11-30 20:24:37 -0500
committerBen Dooks <ben-linux@fluff.org>2010-01-15 03:10:10 -0500
commitb3bf41be06634d69959a68a2b53e1ffc92f0d103 (patch)
tree7575fc3d60e9a2f99e74b2862e1b3a43b7df1f92 /arch/arm/plat-s3c24xx/clock-dclk.c
parent13bbd88504bfa0d205fa4121322869d8d7e083d0 (diff)
ARM: SAMSUNG: Reduce size of struct clk.
Reduce the size of struct clk by 12 bytes and make defining clocks with common implementation functions easier by moving the set_rate, get_rate, round_rate and set_parent calls into a new structure called 'struct clk_ops' and using that instead. This change does make a few clocks larger as they need their own clk_ops, but this is outweighed by the number of clocks with either no ops or having a common set of ops. Update all the users of this. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c24xx/clock-dclk.c')
-rw-r--r--arch/arm/plat-s3c24xx/clock-dclk.c22
1 files changed, 14 insertions, 8 deletions
diff --git a/arch/arm/plat-s3c24xx/clock-dclk.c b/arch/arm/plat-s3c24xx/clock-dclk.c
index ac061a1bcb37..cf97caafe56b 100644
--- a/arch/arm/plat-s3c24xx/clock-dclk.c
+++ b/arch/arm/plat-s3c24xx/clock-dclk.c
@@ -161,14 +161,18 @@ static int s3c24xx_clkout_setparent(struct clk *clk, struct clk *parent)
161 161
162/* external clock definitions */ 162/* external clock definitions */
163 163
164static struct clk_ops dclk_ops = {
165 .set_parent = s3c24xx_dclk_setparent,
166 .set_rate = s3c24xx_set_dclk_rate,
167 .round_rate = s3c24xx_round_dclk_rate,
168};
169
164struct clk s3c24xx_dclk0 = { 170struct clk s3c24xx_dclk0 = {
165 .name = "dclk0", 171 .name = "dclk0",
166 .id = -1, 172 .id = -1,
167 .ctrlbit = S3C2410_DCLKCON_DCLK0EN, 173 .ctrlbit = S3C2410_DCLKCON_DCLK0EN,
168 .enable = s3c24xx_dclk_enable, 174 .enable = s3c24xx_dclk_enable,
169 .set_parent = s3c24xx_dclk_setparent, 175 .ops = &dclk_ops,
170 .set_rate = s3c24xx_set_dclk_rate,
171 .round_rate = s3c24xx_round_dclk_rate,
172}; 176};
173 177
174struct clk s3c24xx_dclk1 = { 178struct clk s3c24xx_dclk1 = {
@@ -176,19 +180,21 @@ struct clk s3c24xx_dclk1 = {
176 .id = -1, 180 .id = -1,
177 .ctrlbit = S3C2410_DCLKCON_DCLK1EN, 181 .ctrlbit = S3C2410_DCLKCON_DCLK1EN,
178 .enable = s3c24xx_dclk_enable, 182 .enable = s3c24xx_dclk_enable,
179 .set_parent = s3c24xx_dclk_setparent, 183 .ops = &dclk_ops,
180 .set_rate = s3c24xx_set_dclk_rate, 184};
181 .round_rate = s3c24xx_round_dclk_rate, 185
186static struct clk_ops clkout_ops = {
187 .set_parent = s3c24xx_clkout_setparent,
182}; 188};
183 189
184struct clk s3c24xx_clkout0 = { 190struct clk s3c24xx_clkout0 = {
185 .name = "clkout0", 191 .name = "clkout0",
186 .id = -1, 192 .id = -1,
187 .set_parent = s3c24xx_clkout_setparent, 193 .ops = &clkout_ops,
188}; 194};
189 195
190struct clk s3c24xx_clkout1 = { 196struct clk s3c24xx_clkout1 = {
191 .name = "clkout1", 197 .name = "clkout1",
192 .id = -1, 198 .id = -1,
193 .set_parent = s3c24xx_clkout_setparent, 199 .ops = &clkout_ops,
194}; 200};