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authorBen Dooks <ben-linux@fluff.org>2008-11-21 05:36:05 -0500
committerBen Dooks <ben-linux@fluff.org>2008-12-16 05:13:02 -0500
commit9d325f23416d1525401d43442bafca2bb254ab74 (patch)
tree4b8e0ef7c121c263d2cbbea136c97d81d6be0463 /arch/arm/plat-s3c/pwm-clock.c
parentb09bcdd4c2f52b54115895c4d62ad82918f71431 (diff)
[ARM] S3C: Update time initialisation to fix S3C64XX time problems
The S3C64XX timer is running at the wrong rate due to the assumptions made in the timer initialisation about the way the pwm dividers work. This means that time on the S3C64XX runs twice as fast as it should. Fix the problem by moving to using the clk framework to setup the pwm timer clock muxes, as the pwm-clock code has all the necessary knowledge of how the timer clock inputs are routed. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s3c/pwm-clock.c')
-rw-r--r--arch/arm/plat-s3c/pwm-clock.c28
1 files changed, 15 insertions, 13 deletions
diff --git a/arch/arm/plat-s3c/pwm-clock.c b/arch/arm/plat-s3c/pwm-clock.c
index 988c0cd7ade2..a318215ab535 100644
--- a/arch/arm/plat-s3c/pwm-clock.c
+++ b/arch/arm/plat-s3c/pwm-clock.c
@@ -407,7 +407,16 @@ static __init int clk_pwm_tin_register(struct clk *pwm)
407 return clk_set_parent(pwm, parent); 407 return clk_set_parent(pwm, parent);
408} 408}
409 409
410static __init int s3c24xx_pwmclk_init(void) 410/**
411 * s3c_pwmclk_init() - initialise pwm clocks
412 *
413 * Initialise and register the clocks which provide the inputs for the
414 * pwm timer blocks.
415 *
416 * Note, this call is required by the time core, so must be called after
417 * the base clocks are added and before any of the initcalls are run.
418 */
419__init void s3c_pwmclk_init(void)
411{ 420{
412 struct clk *clk_timers; 421 struct clk *clk_timers;
413 unsigned int clk; 422 unsigned int clk;
@@ -416,7 +425,7 @@ static __init int s3c24xx_pwmclk_init(void)
416 clk_timers = clk_get(NULL, "timers"); 425 clk_timers = clk_get(NULL, "timers");
417 if (IS_ERR(clk_timers)) { 426 if (IS_ERR(clk_timers)) {
418 printk(KERN_ERR "%s: no parent clock\n", __func__); 427 printk(KERN_ERR "%s: no parent clock\n", __func__);
419 return -EINVAL; 428 return;
420 } 429 }
421 430
422 for (clk = 0; clk < ARRAY_SIZE(clk_timer_scaler); clk++) { 431 for (clk = 0; clk < ARRAY_SIZE(clk_timer_scaler); clk++) {
@@ -424,7 +433,7 @@ static __init int s3c24xx_pwmclk_init(void)
424 ret = s3c24xx_register_clock(&clk_timer_scaler[clk]); 433 ret = s3c24xx_register_clock(&clk_timer_scaler[clk]);
425 if (ret < 0) { 434 if (ret < 0) {
426 printk(KERN_ERR "error adding pwm scaler%d clock\n", clk); 435 printk(KERN_ERR "error adding pwm scaler%d clock\n", clk);
427 goto err; 436 return;
428 } 437 }
429 } 438 }
430 439
@@ -432,7 +441,7 @@ static __init int s3c24xx_pwmclk_init(void)
432 ret = s3c24xx_register_clock(&clk_timer_tclk[clk]); 441 ret = s3c24xx_register_clock(&clk_timer_tclk[clk]);
433 if (ret < 0) { 442 if (ret < 0) {
434 printk(KERN_ERR "error adding pww tclk%d\n", clk); 443 printk(KERN_ERR "error adding pww tclk%d\n", clk);
435 goto err; 444 return;
436 } 445 }
437 } 446 }
438 447
@@ -440,7 +449,7 @@ static __init int s3c24xx_pwmclk_init(void)
440 ret = clk_pwm_tdiv_register(clk); 449 ret = clk_pwm_tdiv_register(clk);
441 if (ret < 0) { 450 if (ret < 0) {
442 printk(KERN_ERR "error adding pwm%d tdiv clock\n", clk); 451 printk(KERN_ERR "error adding pwm%d tdiv clock\n", clk);
443 goto err; 452 return;
444 } 453 }
445 } 454 }
446 455
@@ -448,14 +457,7 @@ static __init int s3c24xx_pwmclk_init(void)
448 ret = clk_pwm_tin_register(&clk_tin[clk]); 457 ret = clk_pwm_tin_register(&clk_tin[clk]);
449 if (ret < 0) { 458 if (ret < 0) {
450 printk(KERN_ERR "error adding pwm%d tin clock\n", clk); 459 printk(KERN_ERR "error adding pwm%d tin clock\n", clk);
451 goto err; 460 return;
452 } 461 }
453 } 462 }
454
455 return 0;
456
457 err:
458 return ret;
459} 463}
460
461arch_initcall(s3c24xx_pwmclk_init);