diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2009-03-26 18:44:43 -0400 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-03-26 18:44:43 -0400 |
commit | f5f0e17a8475dee913f362510e6a8ab987d27b9f (patch) | |
tree | ebe44e7774400730f6c15cd5a84187113c274e3d /arch/arm/plat-s3c/include | |
parent | 2f3ec501ba1e1a68ab9d413f143bdc8f46417fc1 (diff) | |
parent | fff94cd9f5527bbba13aa5ea5719d16531ca8e65 (diff) |
Merge branch 'next-s3c-pm' of git://aeryn.fluff.org.uk/bjdooks/linux into devel
Diffstat (limited to 'arch/arm/plat-s3c/include')
-rw-r--r-- | arch/arm/plat-s3c/include/plat/pm.h | 174 |
1 files changed, 174 insertions, 0 deletions
diff --git a/arch/arm/plat-s3c/include/plat/pm.h b/arch/arm/plat-s3c/include/plat/pm.h new file mode 100644 index 000000000000..3779775133a9 --- /dev/null +++ b/arch/arm/plat-s3c/include/plat/pm.h | |||
@@ -0,0 +1,174 @@ | |||
1 | /* linux/include/asm-arm/plat-s3c24xx/pm.h | ||
2 | * | ||
3 | * Copyright (c) 2004 Simtec Electronics | ||
4 | * http://armlinux.simtec.co.uk/ | ||
5 | * Written by Ben Dooks, <ben@simtec.co.uk> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | /* s3c_pm_init | ||
13 | * | ||
14 | * called from board at initialisation time to setup the power | ||
15 | * management | ||
16 | */ | ||
17 | |||
18 | #ifdef CONFIG_PM | ||
19 | |||
20 | extern __init int s3c_pm_init(void); | ||
21 | |||
22 | #else | ||
23 | |||
24 | static inline int s3c_pm_init(void) | ||
25 | { | ||
26 | return 0; | ||
27 | } | ||
28 | #endif | ||
29 | |||
30 | /* configuration for the IRQ mask over sleep */ | ||
31 | extern unsigned long s3c_irqwake_intmask; | ||
32 | extern unsigned long s3c_irqwake_eintmask; | ||
33 | |||
34 | /* IRQ masks for IRQs allowed to go to sleep (see irq.c) */ | ||
35 | extern unsigned long s3c_irqwake_intallow; | ||
36 | extern unsigned long s3c_irqwake_eintallow; | ||
37 | |||
38 | /* per-cpu sleep functions */ | ||
39 | |||
40 | extern void (*pm_cpu_prep)(void); | ||
41 | extern void (*pm_cpu_sleep)(void); | ||
42 | |||
43 | /* Flags for PM Control */ | ||
44 | |||
45 | extern unsigned long s3c_pm_flags; | ||
46 | |||
47 | /* from sleep.S */ | ||
48 | |||
49 | extern int s3c_cpu_save(unsigned long *saveblk); | ||
50 | extern void s3c_cpu_resume(void); | ||
51 | |||
52 | extern void s3c2410_cpu_suspend(void); | ||
53 | |||
54 | extern unsigned long s3c_sleep_save_phys; | ||
55 | |||
56 | /* sleep save info */ | ||
57 | |||
58 | /** | ||
59 | * struct sleep_save - save information for shared peripherals. | ||
60 | * @reg: Pointer to the register to save. | ||
61 | * @val: Holder for the value saved from reg. | ||
62 | * | ||
63 | * This describes a list of registers which is used by the pm core and | ||
64 | * other subsystem to save and restore register values over suspend. | ||
65 | */ | ||
66 | struct sleep_save { | ||
67 | void __iomem *reg; | ||
68 | unsigned long val; | ||
69 | }; | ||
70 | |||
71 | #define SAVE_ITEM(x) \ | ||
72 | { .reg = (x) } | ||
73 | |||
74 | /** | ||
75 | * struct pm_uart_save - save block for core UART | ||
76 | * @ulcon: Save value for S3C2410_ULCON | ||
77 | * @ucon: Save value for S3C2410_UCON | ||
78 | * @ufcon: Save value for S3C2410_UFCON | ||
79 | * @umcon: Save value for S3C2410_UMCON | ||
80 | * @ubrdiv: Save value for S3C2410_UBRDIV | ||
81 | * | ||
82 | * Save block for UART registers to be held over sleep and restored if they | ||
83 | * are needed (say by debug). | ||
84 | */ | ||
85 | struct pm_uart_save { | ||
86 | u32 ulcon; | ||
87 | u32 ucon; | ||
88 | u32 ufcon; | ||
89 | u32 umcon; | ||
90 | u32 ubrdiv; | ||
91 | }; | ||
92 | |||
93 | /* helper functions to save/restore lists of registers. */ | ||
94 | |||
95 | extern void s3c_pm_do_save(struct sleep_save *ptr, int count); | ||
96 | extern void s3c_pm_do_restore(struct sleep_save *ptr, int count); | ||
97 | extern void s3c_pm_do_restore_core(struct sleep_save *ptr, int count); | ||
98 | |||
99 | #ifdef CONFIG_PM | ||
100 | extern int s3c_irqext_wake(unsigned int irqno, unsigned int state); | ||
101 | extern int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state); | ||
102 | extern int s3c24xx_irq_resume(struct sys_device *dev); | ||
103 | #else | ||
104 | #define s3c_irqext_wake NULL | ||
105 | #define s3c24xx_irq_suspend NULL | ||
106 | #define s3c24xx_irq_resume NULL | ||
107 | #endif | ||
108 | |||
109 | /* PM debug functions */ | ||
110 | |||
111 | #ifdef CONFIG_S3C2410_PM_DEBUG | ||
112 | /** | ||
113 | * s3c_pm_dbg() - low level debug function for use in suspend/resume. | ||
114 | * @msg: The message to print. | ||
115 | * | ||
116 | * This function is used mainly to debug the resume process before the system | ||
117 | * can rely on printk/console output. It uses the low-level debugging output | ||
118 | * routine printascii() to do its work. | ||
119 | */ | ||
120 | extern void s3c_pm_dbg(const char *msg, ...); | ||
121 | |||
122 | #define S3C_PMDBG(fmt...) s3c_pm_dbg(fmt) | ||
123 | #else | ||
124 | #define S3C_PMDBG(fmt...) printk(KERN_DEBUG fmt) | ||
125 | #endif | ||
126 | |||
127 | /* suspend memory checking */ | ||
128 | |||
129 | #ifdef CONFIG_S3C2410_PM_CHECK | ||
130 | extern void s3c_pm_check_prepare(void); | ||
131 | extern void s3c_pm_check_restore(void); | ||
132 | extern void s3c_pm_check_cleanup(void); | ||
133 | extern void s3c_pm_check_store(void); | ||
134 | #else | ||
135 | #define s3c_pm_check_prepare() do { } while(0) | ||
136 | #define s3c_pm_check_restore() do { } while(0) | ||
137 | #define s3c_pm_check_cleanup() do { } while(0) | ||
138 | #define s3c_pm_check_store() do { } while(0) | ||
139 | #endif | ||
140 | |||
141 | /** | ||
142 | * s3c_pm_configure_extint() - ensure pins are correctly set for IRQ | ||
143 | * | ||
144 | * Setup all the necessary GPIO pins for waking the system on external | ||
145 | * interrupt. | ||
146 | */ | ||
147 | extern void s3c_pm_configure_extint(void); | ||
148 | |||
149 | /** | ||
150 | * s3c_pm_restore_gpios() - restore the state of the gpios after sleep. | ||
151 | * | ||
152 | * Restore the state of the GPIO pins after sleep, which may involve ensuring | ||
153 | * that we do not glitch the state of the pins from that the bootloader's | ||
154 | * resume code has done. | ||
155 | */ | ||
156 | extern void s3c_pm_restore_gpios(void); | ||
157 | |||
158 | /** | ||
159 | * s3c_pm_save_gpios() - save the state of the GPIOs for restoring after sleep. | ||
160 | * | ||
161 | * Save the GPIO states for resotration on resume. See s3c_pm_restore_gpios(). | ||
162 | */ | ||
163 | extern void s3c_pm_save_gpios(void); | ||
164 | |||
165 | /** | ||
166 | * s3c_pm_cb_flushcache - callback for assembly code | ||
167 | * | ||
168 | * Callback to issue flush_cache_all() as this call is | ||
169 | * not a directly callable object. | ||
170 | */ | ||
171 | extern void s3c_pm_cb_flushcache(void); | ||
172 | |||
173 | extern void s3c_pm_save_core(void); | ||
174 | extern void s3c_pm_restore_core(void); | ||