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authorHaojian Zhuang <haojian.zhuang@marvell.com>2010-11-23 22:54:19 -0500
committerEric Miao <eric.y.miao@gmail.com>2010-12-18 08:02:14 -0500
commita4553358d94b4a1f3e6f24aacfd076022ac14855 (patch)
tree7d6d7909730801a6f512aa2a7f637353ce0931bf /arch/arm/plat-pxa
parentaae8224ddd72e045bb92eaf6b73b89282c771c69 (diff)
ARM: pxa: support pxa95x
The core of PXA955 is PJ4. Add new PJ4 support. And add new macro CONFIG_PXA95x. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch/arm/plat-pxa')
-rw-r--r--arch/arm/plat-pxa/Makefile1
-rw-r--r--arch/arm/plat-pxa/include/plat/mfp.h4
2 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/plat-pxa/Makefile b/arch/arm/plat-pxa/Makefile
index 4aacdd12c9cc..3aca5ba0f876 100644
--- a/arch/arm/plat-pxa/Makefile
+++ b/arch/arm/plat-pxa/Makefile
@@ -6,6 +6,7 @@ obj-y := dma.o
6 6
7obj-$(CONFIG_GENERIC_GPIO) += gpio.o 7obj-$(CONFIG_GENERIC_GPIO) += gpio.o
8obj-$(CONFIG_PXA3xx) += mfp.o 8obj-$(CONFIG_PXA3xx) += mfp.o
9obj-$(CONFIG_PXA95x) += mfp.o
9obj-$(CONFIG_ARCH_MMP) += mfp.o 10obj-$(CONFIG_ARCH_MMP) += mfp.o
10 11
11obj-$(CONFIG_HAVE_PWM) += pwm.o 12obj-$(CONFIG_HAVE_PWM) += pwm.o
diff --git a/arch/arm/plat-pxa/include/plat/mfp.h b/arch/arm/plat-pxa/include/plat/mfp.h
index 9e604c80618f..75f656471240 100644
--- a/arch/arm/plat-pxa/include/plat/mfp.h
+++ b/arch/arm/plat-pxa/include/plat/mfp.h
@@ -423,7 +423,7 @@ typedef unsigned long mfp_cfg_t;
423 ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DS_MASK | MFP_LPM_STATE_MASK)) |\ 423 ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DS_MASK | MFP_LPM_STATE_MASK)) |\
424 (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_##drv | MFP_LPM_##lpm)) 424 (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_##drv | MFP_LPM_##lpm))
425 425
426#if defined(CONFIG_PXA3xx) || defined(CONFIG_ARCH_MMP) 426#if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x) || defined(CONFIG_ARCH_MMP)
427/* 427/*
428 * each MFP pin will have a MFPR register, since the offset of the 428 * each MFP pin will have a MFPR register, since the offset of the
429 * register varies between processors, the processor specific code 429 * register varies between processors, the processor specific code
@@ -470,6 +470,6 @@ void mfp_write(int mfp, unsigned long mfpr_val);
470void mfp_config(unsigned long *mfp_cfgs, int num); 470void mfp_config(unsigned long *mfp_cfgs, int num);
471void mfp_config_run(void); 471void mfp_config_run(void);
472void mfp_config_lpm(void); 472void mfp_config_lpm(void);
473#endif /* CONFIG_PXA3xx || CONFIG_ARCH_MMP */ 473#endif /* CONFIG_PXA3xx || CONFIG_PXA95x || CONFIG_ARCH_MMP */
474 474
475#endif /* __ASM_PLAT_MFP_H */ 475#endif /* __ASM_PLAT_MFP_H */