diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-09 17:38:51 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-09 17:38:51 -0500 |
commit | 5ede3ceb7b2c2843e153a1803edbdc8c56655950 (patch) | |
tree | 4cfa82b619f7d39b671e4a2a213f4d040b09c486 /arch/arm/plat-orion | |
parent | 6d889d03ab1417645e76e129834f76204bae37c0 (diff) | |
parent | 3e2762c8f1141ae8dc708034ea41d6827818c328 (diff) |
Merge tag 'devel' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
New feature development
This adds support for new features, and contains stuff from most
platforms. A number of these patches could have fit into other
branches, too, but were small enough not to cause too much
confusion here.
* tag 'devel' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (28 commits)
mfd/db8500-prcmu: remove support for early silicon revisions
ARM: ux500: fix the smp_twd clock calculation
ARM: ux500: remove support for early silicon revisions
ARM: ux500: update register files
ARM: ux500: register DB5500 PMU dynamically
ARM: ux500: update ASIC detection for U5500
ARM: ux500: support DB8520
ARM: picoxcell: implement watchdog restart
ARM: OMAP3+: hwmod data: Add the default clockactivity for I2C
ARM: OMAP3: hwmod data: disable multiblock reads on MMC1/2 on OMAP34xx/35xx <= ES2.1
ARM: OMAP: USB: EHCI and OHCI hwmod structures for OMAP4
ARM: OMAP: USB: EHCI and OHCI hwmod structures for OMAP3
ARM: OMAP: hwmod data: Add support for AM35xx UART4/ttyO3
ARM: Orion: Remove address map info from all platform data structures
ARM: Orion: Get address map from plat-orion instead of via platform_data
ARM: Orion: mbus_dram_info consolidation
ARM: Orion: Consolidate the address map setup
ARM: Kirkwood: Add configuration for MPP12 as GPIO
ARM: Kirkwood: Recognize A1 revision of 6282 chip
ARM: ux500: update the MOP500 GPIO assignments
...
Diffstat (limited to 'arch/arm/plat-orion')
-rw-r--r-- | arch/arm/plat-orion/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/plat-orion/addr-map.c | 174 | ||||
-rw-r--r-- | arch/arm/plat-orion/common.c | 43 | ||||
-rw-r--r-- | arch/arm/plat-orion/include/plat/addr-map.h | 53 | ||||
-rw-r--r-- | arch/arm/plat-orion/include/plat/audio.h | 3 | ||||
-rw-r--r-- | arch/arm/plat-orion/include/plat/common.h | 17 | ||||
-rw-r--r-- | arch/arm/plat-orion/include/plat/ehci-orion.h | 1 | ||||
-rw-r--r-- | arch/arm/plat-orion/include/plat/mv_xor.h | 6 | ||||
-rw-r--r-- | arch/arm/plat-orion/include/plat/mvsdio.h | 1 | ||||
-rw-r--r-- | arch/arm/plat-orion/include/plat/pcie.h | 3 | ||||
-rw-r--r-- | arch/arm/plat-orion/pcie.c | 6 |
11 files changed, 245 insertions, 64 deletions
diff --git a/arch/arm/plat-orion/Makefile b/arch/arm/plat-orion/Makefile index 95a5fc53b6db..c20ce0f5ce33 100644 --- a/arch/arm/plat-orion/Makefile +++ b/arch/arm/plat-orion/Makefile | |||
@@ -2,7 +2,7 @@ | |||
2 | # Makefile for the linux kernel. | 2 | # Makefile for the linux kernel. |
3 | # | 3 | # |
4 | 4 | ||
5 | obj-y := irq.o pcie.o time.o common.o mpp.o | 5 | obj-y := irq.o pcie.o time.o common.o mpp.o addr-map.o |
6 | obj-m := | 6 | obj-m := |
7 | obj-n := | 7 | obj-n := |
8 | obj- := | 8 | obj- := |
diff --git a/arch/arm/plat-orion/addr-map.c b/arch/arm/plat-orion/addr-map.c new file mode 100644 index 000000000000..367ca89ac403 --- /dev/null +++ b/arch/arm/plat-orion/addr-map.c | |||
@@ -0,0 +1,174 @@ | |||
1 | /* | ||
2 | * arch/arm/plat-orion/addr-map.c | ||
3 | * | ||
4 | * Address map functions for Marvell Orion based SoCs | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/module.h> | ||
13 | #include <linux/init.h> | ||
14 | #include <linux/mbus.h> | ||
15 | #include <linux/io.h> | ||
16 | #include <plat/addr-map.h> | ||
17 | |||
18 | struct mbus_dram_target_info orion_mbus_dram_info; | ||
19 | |||
20 | const struct mbus_dram_target_info *mv_mbus_dram_info(void) | ||
21 | { | ||
22 | return &orion_mbus_dram_info; | ||
23 | } | ||
24 | EXPORT_SYMBOL_GPL(mv_mbus_dram_info); | ||
25 | |||
26 | /* | ||
27 | * DDR target is the same on all Orion platforms. | ||
28 | */ | ||
29 | #define TARGET_DDR 0 | ||
30 | |||
31 | /* | ||
32 | * Helpers to get DDR bank info | ||
33 | */ | ||
34 | #define DDR_BASE_CS_OFF(n) (0x0000 + ((n) << 3)) | ||
35 | #define DDR_SIZE_CS_OFF(n) (0x0004 + ((n) << 3)) | ||
36 | |||
37 | /* | ||
38 | * CPU Address Decode Windows registers | ||
39 | */ | ||
40 | #define WIN_CTRL_OFF 0x0000 | ||
41 | #define WIN_BASE_OFF 0x0004 | ||
42 | #define WIN_REMAP_LO_OFF 0x0008 | ||
43 | #define WIN_REMAP_HI_OFF 0x000c | ||
44 | |||
45 | /* | ||
46 | * Default implementation | ||
47 | */ | ||
48 | static void __init __iomem * | ||
49 | orion_win_cfg_base(const struct orion_addr_map_cfg *cfg, int win) | ||
50 | { | ||
51 | return (void __iomem *)(cfg->bridge_virt_base + (win << 4)); | ||
52 | } | ||
53 | |||
54 | /* | ||
55 | * Default implementation | ||
56 | */ | ||
57 | static int __init orion_cpu_win_can_remap(const struct orion_addr_map_cfg *cfg, | ||
58 | const int win) | ||
59 | { | ||
60 | if (win < cfg->remappable_wins) | ||
61 | return 1; | ||
62 | |||
63 | return 0; | ||
64 | } | ||
65 | |||
66 | void __init orion_setup_cpu_win(const struct orion_addr_map_cfg *cfg, | ||
67 | const int win, const u32 base, | ||
68 | const u32 size, const u8 target, | ||
69 | const u8 attr, const int remap) | ||
70 | { | ||
71 | void __iomem *addr = cfg->win_cfg_base(cfg, win); | ||
72 | u32 ctrl, base_high, remap_addr; | ||
73 | |||
74 | if (win >= cfg->num_wins) { | ||
75 | printk(KERN_ERR "setup_cpu_win: trying to allocate window " | ||
76 | "%d when only %d allowed\n", win, cfg->num_wins); | ||
77 | } | ||
78 | |||
79 | base_high = base & 0xffff0000; | ||
80 | ctrl = ((size - 1) & 0xffff0000) | (attr << 8) | (target << 4) | 1; | ||
81 | |||
82 | writel(base_high, addr + WIN_BASE_OFF); | ||
83 | writel(ctrl, addr + WIN_CTRL_OFF); | ||
84 | if (cfg->cpu_win_can_remap(cfg, win)) { | ||
85 | if (remap < 0) | ||
86 | remap_addr = base; | ||
87 | else | ||
88 | remap_addr = remap; | ||
89 | writel(remap_addr & 0xffff0000, addr + WIN_REMAP_LO_OFF); | ||
90 | writel(0, addr + WIN_REMAP_HI_OFF); | ||
91 | } | ||
92 | } | ||
93 | |||
94 | /* | ||
95 | * Configure a number of windows. | ||
96 | */ | ||
97 | static void __init orion_setup_cpu_wins(const struct orion_addr_map_cfg * cfg, | ||
98 | const struct orion_addr_map_info *info) | ||
99 | { | ||
100 | while (info->win != -1) { | ||
101 | orion_setup_cpu_win(cfg, info->win, info->base, info->size, | ||
102 | info->target, info->attr, info->remap); | ||
103 | info++; | ||
104 | } | ||
105 | } | ||
106 | |||
107 | static void __init orion_disable_wins(const struct orion_addr_map_cfg * cfg) | ||
108 | { | ||
109 | void __iomem *addr; | ||
110 | int i; | ||
111 | |||
112 | for (i = 0; i < cfg->num_wins; i++) { | ||
113 | addr = cfg->win_cfg_base(cfg, i); | ||
114 | |||
115 | writel(0, addr + WIN_BASE_OFF); | ||
116 | writel(0, addr + WIN_CTRL_OFF); | ||
117 | if (cfg->cpu_win_can_remap(cfg, i)) { | ||
118 | writel(0, addr + WIN_REMAP_LO_OFF); | ||
119 | writel(0, addr + WIN_REMAP_HI_OFF); | ||
120 | } | ||
121 | } | ||
122 | } | ||
123 | |||
124 | /* | ||
125 | * Disable, clear and configure windows. | ||
126 | */ | ||
127 | void __init orion_config_wins(struct orion_addr_map_cfg * cfg, | ||
128 | const struct orion_addr_map_info *info) | ||
129 | { | ||
130 | if (!cfg->cpu_win_can_remap) | ||
131 | cfg->cpu_win_can_remap = orion_cpu_win_can_remap; | ||
132 | |||
133 | if (!cfg->win_cfg_base) | ||
134 | cfg->win_cfg_base = orion_win_cfg_base; | ||
135 | |||
136 | orion_disable_wins(cfg); | ||
137 | |||
138 | if (info) | ||
139 | orion_setup_cpu_wins(cfg, info); | ||
140 | } | ||
141 | |||
142 | /* | ||
143 | * Setup MBUS dram target info. | ||
144 | */ | ||
145 | void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg, | ||
146 | const u32 ddr_window_cpu_base) | ||
147 | { | ||
148 | void __iomem *addr; | ||
149 | int i; | ||
150 | int cs; | ||
151 | |||
152 | orion_mbus_dram_info.mbus_dram_target_id = TARGET_DDR; | ||
153 | |||
154 | addr = (void __iomem *)ddr_window_cpu_base; | ||
155 | |||
156 | for (i = 0, cs = 0; i < 4; i++) { | ||
157 | u32 base = readl(addr + DDR_BASE_CS_OFF(i)); | ||
158 | u32 size = readl(addr + DDR_SIZE_CS_OFF(i)); | ||
159 | |||
160 | /* | ||
161 | * Chip select enabled? | ||
162 | */ | ||
163 | if (size & 1) { | ||
164 | struct mbus_dram_window *w; | ||
165 | |||
166 | w = &orion_mbus_dram_info.cs[cs++]; | ||
167 | w->cs_index = i; | ||
168 | w->mbus_attr = 0xf & ~(1 << i); | ||
169 | w->base = base & 0xffff0000; | ||
170 | w->size = (size | 0x0000ffff) + 1; | ||
171 | } | ||
172 | } | ||
173 | orion_mbus_dram_info.num_cs = cs; | ||
174 | } | ||
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c index 9e5451b3c8e3..e5a2fde29b19 100644 --- a/arch/arm/plat-orion/common.c +++ b/arch/arm/plat-orion/common.c | |||
@@ -13,7 +13,6 @@ | |||
13 | #include <linux/platform_device.h> | 13 | #include <linux/platform_device.h> |
14 | #include <linux/dma-mapping.h> | 14 | #include <linux/dma-mapping.h> |
15 | #include <linux/serial_8250.h> | 15 | #include <linux/serial_8250.h> |
16 | #include <linux/mbus.h> | ||
17 | #include <linux/ata_platform.h> | 16 | #include <linux/ata_platform.h> |
18 | #include <linux/mv643xx_eth.h> | 17 | #include <linux/mv643xx_eth.h> |
19 | #include <linux/mv643xx_i2c.h> | 18 | #include <linux/mv643xx_i2c.h> |
@@ -203,13 +202,12 @@ void __init orion_rtc_init(unsigned long mapbase, | |||
203 | ****************************************************************************/ | 202 | ****************************************************************************/ |
204 | static __init void ge_complete( | 203 | static __init void ge_complete( |
205 | struct mv643xx_eth_shared_platform_data *orion_ge_shared_data, | 204 | struct mv643xx_eth_shared_platform_data *orion_ge_shared_data, |
206 | struct mbus_dram_target_info *mbus_dram_info, int tclk, | 205 | int tclk, |
207 | struct resource *orion_ge_resource, unsigned long irq, | 206 | struct resource *orion_ge_resource, unsigned long irq, |
208 | struct platform_device *orion_ge_shared, | 207 | struct platform_device *orion_ge_shared, |
209 | struct mv643xx_eth_platform_data *eth_data, | 208 | struct mv643xx_eth_platform_data *eth_data, |
210 | struct platform_device *orion_ge) | 209 | struct platform_device *orion_ge) |
211 | { | 210 | { |
212 | orion_ge_shared_data->dram = mbus_dram_info; | ||
213 | orion_ge_shared_data->t_clk = tclk; | 211 | orion_ge_shared_data->t_clk = tclk; |
214 | orion_ge_resource->start = irq; | 212 | orion_ge_resource->start = irq; |
215 | orion_ge_resource->end = irq; | 213 | orion_ge_resource->end = irq; |
@@ -259,7 +257,6 @@ static struct platform_device orion_ge00 = { | |||
259 | }; | 257 | }; |
260 | 258 | ||
261 | void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data, | 259 | void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data, |
262 | struct mbus_dram_target_info *mbus_dram_info, | ||
263 | unsigned long mapbase, | 260 | unsigned long mapbase, |
264 | unsigned long irq, | 261 | unsigned long irq, |
265 | unsigned long irq_err, | 262 | unsigned long irq_err, |
@@ -267,7 +264,7 @@ void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data, | |||
267 | { | 264 | { |
268 | fill_resources(&orion_ge00_shared, orion_ge00_shared_resources, | 265 | fill_resources(&orion_ge00_shared, orion_ge00_shared_resources, |
269 | mapbase + 0x2000, SZ_16K - 1, irq_err); | 266 | mapbase + 0x2000, SZ_16K - 1, irq_err); |
270 | ge_complete(&orion_ge00_shared_data, mbus_dram_info, tclk, | 267 | ge_complete(&orion_ge00_shared_data, tclk, |
271 | orion_ge00_resources, irq, &orion_ge00_shared, | 268 | orion_ge00_resources, irq, &orion_ge00_shared, |
272 | eth_data, &orion_ge00); | 269 | eth_data, &orion_ge00); |
273 | } | 270 | } |
@@ -313,7 +310,6 @@ static struct platform_device orion_ge01 = { | |||
313 | }; | 310 | }; |
314 | 311 | ||
315 | void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data, | 312 | void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data, |
316 | struct mbus_dram_target_info *mbus_dram_info, | ||
317 | unsigned long mapbase, | 313 | unsigned long mapbase, |
318 | unsigned long irq, | 314 | unsigned long irq, |
319 | unsigned long irq_err, | 315 | unsigned long irq_err, |
@@ -321,7 +317,7 @@ void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data, | |||
321 | { | 317 | { |
322 | fill_resources(&orion_ge01_shared, orion_ge01_shared_resources, | 318 | fill_resources(&orion_ge01_shared, orion_ge01_shared_resources, |
323 | mapbase + 0x2000, SZ_16K - 1, irq_err); | 319 | mapbase + 0x2000, SZ_16K - 1, irq_err); |
324 | ge_complete(&orion_ge01_shared_data, mbus_dram_info, tclk, | 320 | ge_complete(&orion_ge01_shared_data, tclk, |
325 | orion_ge01_resources, irq, &orion_ge01_shared, | 321 | orion_ge01_resources, irq, &orion_ge01_shared, |
326 | eth_data, &orion_ge01); | 322 | eth_data, &orion_ge01); |
327 | } | 323 | } |
@@ -367,7 +363,6 @@ static struct platform_device orion_ge10 = { | |||
367 | }; | 363 | }; |
368 | 364 | ||
369 | void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data, | 365 | void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data, |
370 | struct mbus_dram_target_info *mbus_dram_info, | ||
371 | unsigned long mapbase, | 366 | unsigned long mapbase, |
372 | unsigned long irq, | 367 | unsigned long irq, |
373 | unsigned long irq_err, | 368 | unsigned long irq_err, |
@@ -375,7 +370,7 @@ void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data, | |||
375 | { | 370 | { |
376 | fill_resources(&orion_ge10_shared, orion_ge10_shared_resources, | 371 | fill_resources(&orion_ge10_shared, orion_ge10_shared_resources, |
377 | mapbase + 0x2000, SZ_16K - 1, irq_err); | 372 | mapbase + 0x2000, SZ_16K - 1, irq_err); |
378 | ge_complete(&orion_ge10_shared_data, mbus_dram_info, tclk, | 373 | ge_complete(&orion_ge10_shared_data, tclk, |
379 | orion_ge10_resources, irq, &orion_ge10_shared, | 374 | orion_ge10_resources, irq, &orion_ge10_shared, |
380 | eth_data, &orion_ge10); | 375 | eth_data, &orion_ge10); |
381 | } | 376 | } |
@@ -421,7 +416,6 @@ static struct platform_device orion_ge11 = { | |||
421 | }; | 416 | }; |
422 | 417 | ||
423 | void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data, | 418 | void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data, |
424 | struct mbus_dram_target_info *mbus_dram_info, | ||
425 | unsigned long mapbase, | 419 | unsigned long mapbase, |
426 | unsigned long irq, | 420 | unsigned long irq, |
427 | unsigned long irq_err, | 421 | unsigned long irq_err, |
@@ -429,7 +423,7 @@ void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data, | |||
429 | { | 423 | { |
430 | fill_resources(&orion_ge11_shared, orion_ge11_shared_resources, | 424 | fill_resources(&orion_ge11_shared, orion_ge11_shared_resources, |
431 | mapbase + 0x2000, SZ_16K - 1, irq_err); | 425 | mapbase + 0x2000, SZ_16K - 1, irq_err); |
432 | ge_complete(&orion_ge11_shared_data, mbus_dram_info, tclk, | 426 | ge_complete(&orion_ge11_shared_data, tclk, |
433 | orion_ge11_resources, irq, &orion_ge11_shared, | 427 | orion_ge11_resources, irq, &orion_ge11_shared, |
434 | eth_data, &orion_ge11); | 428 | eth_data, &orion_ge11); |
435 | } | 429 | } |
@@ -592,8 +586,6 @@ void __init orion_wdt_init(unsigned long tclk) | |||
592 | /***************************************************************************** | 586 | /***************************************************************************** |
593 | * XOR | 587 | * XOR |
594 | ****************************************************************************/ | 588 | ****************************************************************************/ |
595 | static struct mv_xor_platform_shared_data orion_xor_shared_data; | ||
596 | |||
597 | static u64 orion_xor_dmamask = DMA_BIT_MASK(32); | 589 | static u64 orion_xor_dmamask = DMA_BIT_MASK(32); |
598 | 590 | ||
599 | void __init orion_xor_init_channels( | 591 | void __init orion_xor_init_channels( |
@@ -632,9 +624,6 @@ static struct resource orion_xor0_shared_resources[] = { | |||
632 | static struct platform_device orion_xor0_shared = { | 624 | static struct platform_device orion_xor0_shared = { |
633 | .name = MV_XOR_SHARED_NAME, | 625 | .name = MV_XOR_SHARED_NAME, |
634 | .id = 0, | 626 | .id = 0, |
635 | .dev = { | ||
636 | .platform_data = &orion_xor_shared_data, | ||
637 | }, | ||
638 | .num_resources = ARRAY_SIZE(orion_xor0_shared_resources), | 627 | .num_resources = ARRAY_SIZE(orion_xor0_shared_resources), |
639 | .resource = orion_xor0_shared_resources, | 628 | .resource = orion_xor0_shared_resources, |
640 | }; | 629 | }; |
@@ -687,14 +676,11 @@ static struct platform_device orion_xor01_channel = { | |||
687 | }, | 676 | }, |
688 | }; | 677 | }; |
689 | 678 | ||
690 | void __init orion_xor0_init(struct mbus_dram_target_info *mbus_dram_info, | 679 | void __init orion_xor0_init(unsigned long mapbase_low, |
691 | unsigned long mapbase_low, | ||
692 | unsigned long mapbase_high, | 680 | unsigned long mapbase_high, |
693 | unsigned long irq_0, | 681 | unsigned long irq_0, |
694 | unsigned long irq_1) | 682 | unsigned long irq_1) |
695 | { | 683 | { |
696 | orion_xor_shared_data.dram = mbus_dram_info; | ||
697 | |||
698 | orion_xor0_shared_resources[0].start = mapbase_low; | 684 | orion_xor0_shared_resources[0].start = mapbase_low; |
699 | orion_xor0_shared_resources[0].end = mapbase_low + 0xff; | 685 | orion_xor0_shared_resources[0].end = mapbase_low + 0xff; |
700 | orion_xor0_shared_resources[1].start = mapbase_high; | 686 | orion_xor0_shared_resources[1].start = mapbase_high; |
@@ -727,9 +713,6 @@ static struct resource orion_xor1_shared_resources[] = { | |||
727 | static struct platform_device orion_xor1_shared = { | 713 | static struct platform_device orion_xor1_shared = { |
728 | .name = MV_XOR_SHARED_NAME, | 714 | .name = MV_XOR_SHARED_NAME, |
729 | .id = 1, | 715 | .id = 1, |
730 | .dev = { | ||
731 | .platform_data = &orion_xor_shared_data, | ||
732 | }, | ||
733 | .num_resources = ARRAY_SIZE(orion_xor1_shared_resources), | 716 | .num_resources = ARRAY_SIZE(orion_xor1_shared_resources), |
734 | .resource = orion_xor1_shared_resources, | 717 | .resource = orion_xor1_shared_resources, |
735 | }; | 718 | }; |
@@ -828,11 +811,9 @@ static struct platform_device orion_ehci = { | |||
828 | }, | 811 | }, |
829 | }; | 812 | }; |
830 | 813 | ||
831 | void __init orion_ehci_init(struct mbus_dram_target_info *mbus_dram_info, | 814 | void __init orion_ehci_init(unsigned long mapbase, |
832 | unsigned long mapbase, | ||
833 | unsigned long irq) | 815 | unsigned long irq) |
834 | { | 816 | { |
835 | orion_ehci_data.dram = mbus_dram_info; | ||
836 | fill_resources(&orion_ehci, orion_ehci_resources, mapbase, SZ_4K - 1, | 817 | fill_resources(&orion_ehci, orion_ehci_resources, mapbase, SZ_4K - 1, |
837 | irq); | 818 | irq); |
838 | 819 | ||
@@ -854,11 +835,9 @@ static struct platform_device orion_ehci_1 = { | |||
854 | }, | 835 | }, |
855 | }; | 836 | }; |
856 | 837 | ||
857 | void __init orion_ehci_1_init(struct mbus_dram_target_info *mbus_dram_info, | 838 | void __init orion_ehci_1_init(unsigned long mapbase, |
858 | unsigned long mapbase, | ||
859 | unsigned long irq) | 839 | unsigned long irq) |
860 | { | 840 | { |
861 | orion_ehci_data.dram = mbus_dram_info; | ||
862 | fill_resources(&orion_ehci_1, orion_ehci_1_resources, | 841 | fill_resources(&orion_ehci_1, orion_ehci_1_resources, |
863 | mapbase, SZ_4K - 1, irq); | 842 | mapbase, SZ_4K - 1, irq); |
864 | 843 | ||
@@ -880,11 +859,9 @@ static struct platform_device orion_ehci_2 = { | |||
880 | }, | 859 | }, |
881 | }; | 860 | }; |
882 | 861 | ||
883 | void __init orion_ehci_2_init(struct mbus_dram_target_info *mbus_dram_info, | 862 | void __init orion_ehci_2_init(unsigned long mapbase, |
884 | unsigned long mapbase, | ||
885 | unsigned long irq) | 863 | unsigned long irq) |
886 | { | 864 | { |
887 | orion_ehci_data.dram = mbus_dram_info; | ||
888 | fill_resources(&orion_ehci_2, orion_ehci_2_resources, | 865 | fill_resources(&orion_ehci_2, orion_ehci_2_resources, |
889 | mapbase, SZ_4K - 1, irq); | 866 | mapbase, SZ_4K - 1, irq); |
890 | 867 | ||
@@ -911,11 +888,9 @@ static struct platform_device orion_sata = { | |||
911 | }; | 888 | }; |
912 | 889 | ||
913 | void __init orion_sata_init(struct mv_sata_platform_data *sata_data, | 890 | void __init orion_sata_init(struct mv_sata_platform_data *sata_data, |
914 | struct mbus_dram_target_info *mbus_dram_info, | ||
915 | unsigned long mapbase, | 891 | unsigned long mapbase, |
916 | unsigned long irq) | 892 | unsigned long irq) |
917 | { | 893 | { |
918 | sata_data->dram = mbus_dram_info; | ||
919 | orion_sata.dev.platform_data = sata_data; | 894 | orion_sata.dev.platform_data = sata_data; |
920 | fill_resources(&orion_sata, orion_sata_resources, | 895 | fill_resources(&orion_sata, orion_sata_resources, |
921 | mapbase, 0x5000 - 1, irq); | 896 | mapbase, 0x5000 - 1, irq); |
diff --git a/arch/arm/plat-orion/include/plat/addr-map.h b/arch/arm/plat-orion/include/plat/addr-map.h new file mode 100644 index 000000000000..fd556f77562c --- /dev/null +++ b/arch/arm/plat-orion/include/plat/addr-map.h | |||
@@ -0,0 +1,53 @@ | |||
1 | /* | ||
2 | * arch/arm/plat-orion/include/plat/addr-map.h | ||
3 | * | ||
4 | * Marvell Orion SoC address map handling. | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | #ifndef __PLAT_ADDR_MAP_H | ||
12 | #define __PLAT_ADDR_MAP_H | ||
13 | |||
14 | extern struct mbus_dram_target_info orion_mbus_dram_info; | ||
15 | |||
16 | struct orion_addr_map_cfg { | ||
17 | const int num_wins; /* Total number of windows */ | ||
18 | const int remappable_wins; | ||
19 | const u32 bridge_virt_base; | ||
20 | |||
21 | /* If NULL, the default cpu_win_can_remap will be used, using | ||
22 | the value in remappable_wins */ | ||
23 | int (*cpu_win_can_remap) (const struct orion_addr_map_cfg *cfg, | ||
24 | const int win); | ||
25 | /* If NULL, the default win_cfg_base will be used, using the | ||
26 | value in bridge_virt_base */ | ||
27 | void __iomem *(*win_cfg_base) (const struct orion_addr_map_cfg *cfg, | ||
28 | const int win); | ||
29 | }; | ||
30 | |||
31 | /* | ||
32 | * Information needed to setup one address mapping. | ||
33 | */ | ||
34 | struct orion_addr_map_info { | ||
35 | const int win; | ||
36 | const u32 base; | ||
37 | const u32 size; | ||
38 | const u8 target; | ||
39 | const u8 attr; | ||
40 | const int remap; | ||
41 | }; | ||
42 | |||
43 | void __init orion_config_wins(struct orion_addr_map_cfg *cfg, | ||
44 | const struct orion_addr_map_info *info); | ||
45 | |||
46 | void __init orion_setup_cpu_win(const struct orion_addr_map_cfg *cfg, | ||
47 | const int win, const u32 base, | ||
48 | const u32 size, const u8 target, | ||
49 | const u8 attr, const int remap); | ||
50 | |||
51 | void __init orion_setup_cpu_mbus_target(const struct orion_addr_map_cfg *cfg, | ||
52 | const u32 ddr_window_cpu_base); | ||
53 | #endif | ||
diff --git a/arch/arm/plat-orion/include/plat/audio.h b/arch/arm/plat-orion/include/plat/audio.h index 9cf1f781329b..885f8abd927b 100644 --- a/arch/arm/plat-orion/include/plat/audio.h +++ b/arch/arm/plat-orion/include/plat/audio.h | |||
@@ -1,11 +1,8 @@ | |||
1 | #ifndef __PLAT_AUDIO_H | 1 | #ifndef __PLAT_AUDIO_H |
2 | #define __PLAT_AUDIO_H | 2 | #define __PLAT_AUDIO_H |
3 | 3 | ||
4 | #include <linux/mbus.h> | ||
5 | |||
6 | struct kirkwood_asoc_platform_data { | 4 | struct kirkwood_asoc_platform_data { |
7 | u32 tclk; | 5 | u32 tclk; |
8 | struct mbus_dram_target_info *dram; | ||
9 | int burst; | 6 | int burst; |
10 | }; | 7 | }; |
11 | #endif | 8 | #endif |
diff --git a/arch/arm/plat-orion/include/plat/common.h b/arch/arm/plat-orion/include/plat/common.h index a63c357e2ab1..0fe08d77e835 100644 --- a/arch/arm/plat-orion/include/plat/common.h +++ b/arch/arm/plat-orion/include/plat/common.h | |||
@@ -37,28 +37,24 @@ void __init orion_rtc_init(unsigned long mapbase, | |||
37 | unsigned long irq); | 37 | unsigned long irq); |
38 | 38 | ||
39 | void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data, | 39 | void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data, |
40 | struct mbus_dram_target_info *mbus_dram_info, | ||
41 | unsigned long mapbase, | 40 | unsigned long mapbase, |
42 | unsigned long irq, | 41 | unsigned long irq, |
43 | unsigned long irq_err, | 42 | unsigned long irq_err, |
44 | int tclk); | 43 | int tclk); |
45 | 44 | ||
46 | void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data, | 45 | void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data, |
47 | struct mbus_dram_target_info *mbus_dram_info, | ||
48 | unsigned long mapbase, | 46 | unsigned long mapbase, |
49 | unsigned long irq, | 47 | unsigned long irq, |
50 | unsigned long irq_err, | 48 | unsigned long irq_err, |
51 | int tclk); | 49 | int tclk); |
52 | 50 | ||
53 | void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data, | 51 | void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data, |
54 | struct mbus_dram_target_info *mbus_dram_info, | ||
55 | unsigned long mapbase, | 52 | unsigned long mapbase, |
56 | unsigned long irq, | 53 | unsigned long irq, |
57 | unsigned long irq_err, | 54 | unsigned long irq_err, |
58 | int tclk); | 55 | int tclk); |
59 | 56 | ||
60 | void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data, | 57 | void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data, |
61 | struct mbus_dram_target_info *mbus_dram_info, | ||
62 | unsigned long mapbase, | 58 | unsigned long mapbase, |
63 | unsigned long irq, | 59 | unsigned long irq, |
64 | unsigned long irq_err, | 60 | unsigned long irq_err, |
@@ -82,8 +78,7 @@ void __init orion_spi_1_init(unsigned long mapbase, | |||
82 | 78 | ||
83 | void __init orion_wdt_init(unsigned long tclk); | 79 | void __init orion_wdt_init(unsigned long tclk); |
84 | 80 | ||
85 | void __init orion_xor0_init(struct mbus_dram_target_info *mbus_dram_info, | 81 | void __init orion_xor0_init(unsigned long mapbase_low, |
86 | unsigned long mapbase_low, | ||
87 | unsigned long mapbase_high, | 82 | unsigned long mapbase_high, |
88 | unsigned long irq_0, | 83 | unsigned long irq_0, |
89 | unsigned long irq_1); | 84 | unsigned long irq_1); |
@@ -93,20 +88,16 @@ void __init orion_xor1_init(unsigned long mapbase_low, | |||
93 | unsigned long irq_0, | 88 | unsigned long irq_0, |
94 | unsigned long irq_1); | 89 | unsigned long irq_1); |
95 | 90 | ||
96 | void __init orion_ehci_init(struct mbus_dram_target_info *mbus_dram_info, | 91 | void __init orion_ehci_init(unsigned long mapbase, |
97 | unsigned long mapbase, | ||
98 | unsigned long irq); | 92 | unsigned long irq); |
99 | 93 | ||
100 | void __init orion_ehci_1_init(struct mbus_dram_target_info *mbus_dram_info, | 94 | void __init orion_ehci_1_init(unsigned long mapbase, |
101 | unsigned long mapbase, | ||
102 | unsigned long irq); | 95 | unsigned long irq); |
103 | 96 | ||
104 | void __init orion_ehci_2_init(struct mbus_dram_target_info *mbus_dram_info, | 97 | void __init orion_ehci_2_init(unsigned long mapbase, |
105 | unsigned long mapbase, | ||
106 | unsigned long irq); | 98 | unsigned long irq); |
107 | 99 | ||
108 | void __init orion_sata_init(struct mv_sata_platform_data *sata_data, | 100 | void __init orion_sata_init(struct mv_sata_platform_data *sata_data, |
109 | struct mbus_dram_target_info *mbus_dram_info, | ||
110 | unsigned long mapbase, | 101 | unsigned long mapbase, |
111 | unsigned long irq); | 102 | unsigned long irq); |
112 | 103 | ||
diff --git a/arch/arm/plat-orion/include/plat/ehci-orion.h b/arch/arm/plat-orion/include/plat/ehci-orion.h index 4ec668e77460..6fc78e430420 100644 --- a/arch/arm/plat-orion/include/plat/ehci-orion.h +++ b/arch/arm/plat-orion/include/plat/ehci-orion.h | |||
@@ -19,7 +19,6 @@ enum orion_ehci_phy_ver { | |||
19 | }; | 19 | }; |
20 | 20 | ||
21 | struct orion_ehci_data { | 21 | struct orion_ehci_data { |
22 | struct mbus_dram_target_info *dram; | ||
23 | enum orion_ehci_phy_ver phy_version; | 22 | enum orion_ehci_phy_ver phy_version; |
24 | }; | 23 | }; |
25 | 24 | ||
diff --git a/arch/arm/plat-orion/include/plat/mv_xor.h b/arch/arm/plat-orion/include/plat/mv_xor.h index bd5f3bdb4ae3..2ba1f7d76eef 100644 --- a/arch/arm/plat-orion/include/plat/mv_xor.h +++ b/arch/arm/plat-orion/include/plat/mv_xor.h | |||
@@ -13,12 +13,6 @@ | |||
13 | #define MV_XOR_SHARED_NAME "mv_xor_shared" | 13 | #define MV_XOR_SHARED_NAME "mv_xor_shared" |
14 | #define MV_XOR_NAME "mv_xor" | 14 | #define MV_XOR_NAME "mv_xor" |
15 | 15 | ||
16 | struct mbus_dram_target_info; | ||
17 | |||
18 | struct mv_xor_platform_shared_data { | ||
19 | struct mbus_dram_target_info *dram; | ||
20 | }; | ||
21 | |||
22 | struct mv_xor_platform_data { | 16 | struct mv_xor_platform_data { |
23 | struct platform_device *shared; | 17 | struct platform_device *shared; |
24 | int hw_id; | 18 | int hw_id; |
diff --git a/arch/arm/plat-orion/include/plat/mvsdio.h b/arch/arm/plat-orion/include/plat/mvsdio.h index 14ca88676002..1190efedcb94 100644 --- a/arch/arm/plat-orion/include/plat/mvsdio.h +++ b/arch/arm/plat-orion/include/plat/mvsdio.h | |||
@@ -12,7 +12,6 @@ | |||
12 | #include <linux/mbus.h> | 12 | #include <linux/mbus.h> |
13 | 13 | ||
14 | struct mvsdio_platform_data { | 14 | struct mvsdio_platform_data { |
15 | struct mbus_dram_target_info *dram; | ||
16 | unsigned int clock; | 15 | unsigned int clock; |
17 | int gpio_card_detect; | 16 | int gpio_card_detect; |
18 | int gpio_write_protect; | 17 | int gpio_write_protect; |
diff --git a/arch/arm/plat-orion/include/plat/pcie.h b/arch/arm/plat-orion/include/plat/pcie.h index cc99163e73fd..fe5b9e862747 100644 --- a/arch/arm/plat-orion/include/plat/pcie.h +++ b/arch/arm/plat-orion/include/plat/pcie.h | |||
@@ -20,8 +20,7 @@ int orion_pcie_x4_mode(void __iomem *base); | |||
20 | int orion_pcie_get_local_bus_nr(void __iomem *base); | 20 | int orion_pcie_get_local_bus_nr(void __iomem *base); |
21 | void orion_pcie_set_local_bus_nr(void __iomem *base, int nr); | 21 | void orion_pcie_set_local_bus_nr(void __iomem *base, int nr); |
22 | void orion_pcie_reset(void __iomem *base); | 22 | void orion_pcie_reset(void __iomem *base); |
23 | void orion_pcie_setup(void __iomem *base, | 23 | void orion_pcie_setup(void __iomem *base); |
24 | struct mbus_dram_target_info *dram); | ||
25 | int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus, | 24 | int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus, |
26 | u32 devfn, int where, int size, u32 *val); | 25 | u32 devfn, int where, int size, u32 *val); |
27 | int orion_pcie_rd_conf_tlp(void __iomem *base, struct pci_bus *bus, | 26 | int orion_pcie_rd_conf_tlp(void __iomem *base, struct pci_bus *bus, |
diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c index af2d733c50b5..86dbb5bdb172 100644 --- a/arch/arm/plat-orion/pcie.c +++ b/arch/arm/plat-orion/pcie.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/mbus.h> | 13 | #include <linux/mbus.h> |
14 | #include <asm/mach/pci.h> | 14 | #include <asm/mach/pci.h> |
15 | #include <plat/pcie.h> | 15 | #include <plat/pcie.h> |
16 | #include <plat/addr-map.h> | ||
16 | #include <linux/delay.h> | 17 | #include <linux/delay.h> |
17 | 18 | ||
18 | /* | 19 | /* |
@@ -175,8 +176,7 @@ static void __init orion_pcie_setup_wins(void __iomem *base, | |||
175 | writel(((size - 1) & 0xffff0000) | 1, base + PCIE_BAR_CTRL_OFF(1)); | 176 | writel(((size - 1) & 0xffff0000) | 1, base + PCIE_BAR_CTRL_OFF(1)); |
176 | } | 177 | } |
177 | 178 | ||
178 | void __init orion_pcie_setup(void __iomem *base, | 179 | void __init orion_pcie_setup(void __iomem *base) |
179 | struct mbus_dram_target_info *dram) | ||
180 | { | 180 | { |
181 | u16 cmd; | 181 | u16 cmd; |
182 | u32 mask; | 182 | u32 mask; |
@@ -184,7 +184,7 @@ void __init orion_pcie_setup(void __iomem *base, | |||
184 | /* | 184 | /* |
185 | * Point PCIe unit MBUS decode windows to DRAM space. | 185 | * Point PCIe unit MBUS decode windows to DRAM space. |
186 | */ | 186 | */ |
187 | orion_pcie_setup_wins(base, dram); | 187 | orion_pcie_setup_wins(base, &orion_mbus_dram_info); |
188 | 188 | ||
189 | /* | 189 | /* |
190 | * Master + slave enable. | 190 | * Master + slave enable. |