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author | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2012-10-30 06:11:36 -0400 |
---|---|---|
committer | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2012-11-20 09:58:56 -0500 |
commit | dd2c57b822bc0fc999f95c57933e4c597e765b0a (patch) | |
tree | 18f31208c0b12e3bfdbbbd4d7262ebcf2a756a82 /arch/arm/plat-orion | |
parent | af19e148be5e2d7acf2d6322cce74e85be87d603 (diff) |
arm: plat-orion: convert the registration of the xor1 engine to the single driver
Instead of registering one 'mv_xor_shared' device for the XOR engine,
and then two 'mv_xor' devices for the XOR channels, pass the channels
properties as platform_data for the main 'mv_xor_shared' device.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Diffstat (limited to 'arch/arm/plat-orion')
-rw-r--r-- | arch/arm/plat-orion/common.c | 94 |
1 files changed, 42 insertions, 52 deletions
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c index 800af19c51c5..afbbb97937ea 100644 --- a/arch/arm/plat-orion/common.c +++ b/arch/arm/plat-orion/common.c | |||
@@ -715,61 +715,43 @@ static struct resource orion_xor1_shared_resources[] = { | |||
715 | }, { | 715 | }, { |
716 | .name = "xor 1 high", | 716 | .name = "xor 1 high", |
717 | .flags = IORESOURCE_MEM, | 717 | .flags = IORESOURCE_MEM, |
718 | }, { | ||
719 | .name = "irq channel 0", | ||
720 | .flags = IORESOURCE_IRQ, | ||
721 | }, { | ||
722 | .name = "irq channel 1", | ||
723 | .flags = IORESOURCE_IRQ, | ||
718 | }, | 724 | }, |
719 | }; | 725 | }; |
720 | 726 | ||
721 | static struct platform_device orion_xor1_shared = { | 727 | static struct platform_device orion_xor1_shared; |
722 | .name = MV_XOR_SHARED_NAME, | ||
723 | .id = 1, | ||
724 | .num_resources = ARRAY_SIZE(orion_xor1_shared_resources), | ||
725 | .resource = orion_xor1_shared_resources, | ||
726 | }; | ||
727 | |||
728 | static struct resource orion_xor10_resources[] = { | ||
729 | [0] = { | ||
730 | .flags = IORESOURCE_IRQ, | ||
731 | }, | ||
732 | }; | ||
733 | |||
734 | static struct mv_xor_platform_data orion_xor10_data = { | ||
735 | .shared = &orion_xor1_shared, | ||
736 | .hw_id = 0, | ||
737 | .pool_size = PAGE_SIZE, | ||
738 | }; | ||
739 | 728 | ||
740 | static struct platform_device orion_xor10_channel = { | 729 | static struct mv_xor_platform_data orion_xor1_channels_pdata[2] = { |
741 | .name = MV_XOR_NAME, | 730 | { |
742 | .id = 2, | 731 | .shared = &orion_xor1_shared, |
743 | .num_resources = ARRAY_SIZE(orion_xor10_resources), | 732 | .hw_id = 0, |
744 | .resource = orion_xor10_resources, | 733 | .pool_size = PAGE_SIZE, |
745 | .dev = { | ||
746 | .dma_mask = &orion_xor_dmamask, | ||
747 | .coherent_dma_mask = DMA_BIT_MASK(64), | ||
748 | .platform_data = &orion_xor10_data, | ||
749 | }, | 734 | }, |
750 | }; | 735 | { |
751 | 736 | .shared = &orion_xor1_shared, | |
752 | static struct resource orion_xor11_resources[] = { | 737 | .hw_id = 1, |
753 | [0] = { | 738 | .pool_size = PAGE_SIZE, |
754 | .flags = IORESOURCE_IRQ, | ||
755 | }, | 739 | }, |
756 | }; | 740 | }; |
757 | 741 | ||
758 | static struct mv_xor_platform_data orion_xor11_data = { | 742 | static struct mv_xor_shared_platform_data orion_xor1_pdata = { |
759 | .shared = &orion_xor1_shared, | 743 | .channels = orion_xor1_channels_pdata, |
760 | .hw_id = 1, | ||
761 | .pool_size = PAGE_SIZE, | ||
762 | }; | 744 | }; |
763 | 745 | ||
764 | static struct platform_device orion_xor11_channel = { | 746 | static struct platform_device orion_xor1_shared = { |
765 | .name = MV_XOR_NAME, | 747 | .name = MV_XOR_SHARED_NAME, |
766 | .id = 3, | 748 | .id = 1, |
767 | .num_resources = ARRAY_SIZE(orion_xor11_resources), | 749 | .num_resources = ARRAY_SIZE(orion_xor1_shared_resources), |
768 | .resource = orion_xor11_resources, | 750 | .resource = orion_xor1_shared_resources, |
769 | .dev = { | 751 | .dev = { |
770 | .dma_mask = &orion_xor_dmamask, | 752 | .dma_mask = &orion_xor_dmamask, |
771 | .coherent_dma_mask = DMA_BIT_MASK(64), | 753 | .coherent_dma_mask = DMA_BIT_MASK(64), |
772 | .platform_data = &orion_xor11_data, | 754 | .platform_data = &orion_xor1_pdata, |
773 | }, | 755 | }, |
774 | }; | 756 | }; |
775 | 757 | ||
@@ -783,15 +765,23 @@ void __init orion_xor1_init(unsigned long mapbase_low, | |||
783 | orion_xor1_shared_resources[1].start = mapbase_high; | 765 | orion_xor1_shared_resources[1].start = mapbase_high; |
784 | orion_xor1_shared_resources[1].end = mapbase_high + 0xff; | 766 | orion_xor1_shared_resources[1].end = mapbase_high + 0xff; |
785 | 767 | ||
786 | orion_xor10_resources[0].start = irq_0; | 768 | orion_xor1_shared_resources[2].start = irq_0; |
787 | orion_xor10_resources[0].end = irq_0; | 769 | orion_xor1_shared_resources[2].end = irq_0; |
788 | orion_xor11_resources[0].start = irq_1; | 770 | orion_xor1_shared_resources[3].start = irq_1; |
789 | orion_xor11_resources[0].end = irq_1; | 771 | orion_xor1_shared_resources[3].end = irq_1; |
790 | 772 | ||
791 | platform_device_register(&orion_xor1_shared); | 773 | /* |
774 | * two engines can't do memset simultaneously, this limitation | ||
775 | * satisfied by removing memset support from one of the engines. | ||
776 | */ | ||
777 | dma_cap_set(DMA_MEMCPY, orion_xor1_channels_pdata[0].cap_mask); | ||
778 | dma_cap_set(DMA_XOR, orion_xor1_channels_pdata[0].cap_mask); | ||
792 | 779 | ||
793 | orion_xor_init_channels(&orion_xor10_data, &orion_xor10_channel, | 780 | dma_cap_set(DMA_MEMSET, orion_xor1_channels_pdata[1].cap_mask); |
794 | &orion_xor11_data, &orion_xor11_channel); | 781 | dma_cap_set(DMA_MEMCPY, orion_xor1_channels_pdata[1].cap_mask); |
782 | dma_cap_set(DMA_XOR, orion_xor1_channels_pdata[1].cap_mask); | ||
783 | |||
784 | platform_device_register(&orion_xor1_shared); | ||
795 | } | 785 | } |
796 | 786 | ||
797 | /***************************************************************************** | 787 | /***************************************************************************** |