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authorLinus Torvalds <torvalds@linux-foundation.org>2013-05-02 12:03:55 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2013-05-02 12:03:55 -0400
commita7726350e06401929eac0aa0677a5467106565fc (patch)
treee189513e5014bdfccd73a3af731a6b57733743fa /arch/arm/plat-orion
parent4d26aa305414dbb33b3c32fb205b68004cda8ffc (diff)
parentafcf7924ecab726dab0227188783c4a40d9f0eec (diff)
Merge tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanup from Olof Johansson: "Here is a collection of cleanup patches. Among the pieces that stand out are: - The deletion of h720x platforms - Split of at91 non-dt platforms to their own Kconfig file to keep them separate - General cleanups and refactoring of i.MX and MXS platforms - Some restructuring of clock tables for OMAP - Convertion of PMC driver for Tegra to dt-only - Some renames of sunxi -> sun4i (Allwinner A10) - ... plus a bunch of other stuff that I haven't mentioned" * tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (119 commits) ARM: i.MX: remove unused ARCH_* configs ARM i.MX53: remove platform ahci support ARM: sunxi: Rework the restart code irqchip: sunxi: Rename sunxi to sun4i irqchip: sunxi: Make use of the IRQCHIP_DECLARE macro clocksource: sunxi: Rename sunxi to sun4i clocksource: sunxi: make use of CLKSRC_OF clocksource: sunxi: Cleanup the timer code ARM: at91: remove trailing semicolon from macros ARM: at91/setup: fix trivial typos ARM: EXYNOS: remove "config EXYNOS_DEV_DRM" ARM: EXYNOS: change the name of USB ohci header ARM: SAMSUNG: Remove unnecessary code for dma ARM: S3C24XX: Remove unused GPIO drive strength register definitions ARM: OMAP4+: PM: Restore CPU power state to ON with clockdomain force wakeup method ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2412 ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2410 ARM: S3C24XX: Removed unneeded dependency on ARCH_S3C24XX for boards ARM: SAMSUNG: Fix typo "CONFIG_SAMSUNG_DEV_RTC" ARM: S5P64X0: Fix typo "CONFIG_S5P64X0_SETUP_SDHCI" ...
Diffstat (limited to 'arch/arm/plat-orion')
-rw-r--r--arch/arm/plat-orion/Makefile6
-rw-r--r--arch/arm/plat-orion/pcie.c10
2 files changed, 11 insertions, 5 deletions
diff --git a/arch/arm/plat-orion/Makefile b/arch/arm/plat-orion/Makefile
index a82cecb84948..ad97400ba3ad 100644
--- a/arch/arm/plat-orion/Makefile
+++ b/arch/arm/plat-orion/Makefile
@@ -3,7 +3,11 @@
3# 3#
4ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include 4ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include
5 5
6obj-y += addr-map.o 6obj-$(CONFIG_ARCH_MVEBU) += addr-map.o
7obj-$(CONFIG_ARCH_KIRKWOOD) += addr-map.o
8obj-$(CONFIG_ARCH_DOVE) += addr-map.o
9obj-$(CONFIG_ARCH_ORION5X) += addr-map.o
10obj-$(CONFIG_ARCH_MV78XX0) += addr-map.o
7 11
8orion-gpio-$(CONFIG_GENERIC_GPIO) += gpio.o 12orion-gpio-$(CONFIG_GENERIC_GPIO) += gpio.o
9obj-$(CONFIG_PLAT_ORION_LEGACY) += irq.o pcie.o time.o common.o mpp.o 13obj-$(CONFIG_PLAT_ORION_LEGACY) += irq.o pcie.o time.o common.o mpp.o
diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c
index f20a321088a2..8b8c06d2e9c4 100644
--- a/arch/arm/plat-orion/pcie.c
+++ b/arch/arm/plat-orion/pcie.c
@@ -120,12 +120,14 @@ void __init orion_pcie_reset(void __iomem *base)
120 * BAR[0,2] -> disabled, BAR[1] -> covers all DRAM banks 120 * BAR[0,2] -> disabled, BAR[1] -> covers all DRAM banks
121 * WIN[0-3] -> DRAM bank[0-3] 121 * WIN[0-3] -> DRAM bank[0-3]
122 */ 122 */
123static void __init orion_pcie_setup_wins(void __iomem *base, 123static void __init orion_pcie_setup_wins(void __iomem *base)
124 struct mbus_dram_target_info *dram)
125{ 124{
125 const struct mbus_dram_target_info *dram;
126 u32 size; 126 u32 size;
127 int i; 127 int i;
128 128
129 dram = mv_mbus_dram_info();
130
129 /* 131 /*
130 * First, disable and clear BARs and windows. 132 * First, disable and clear BARs and windows.
131 */ 133 */
@@ -150,7 +152,7 @@ static void __init orion_pcie_setup_wins(void __iomem *base,
150 */ 152 */
151 size = 0; 153 size = 0;
152 for (i = 0; i < dram->num_cs; i++) { 154 for (i = 0; i < dram->num_cs; i++) {
153 struct mbus_dram_window *cs = dram->cs + i; 155 const struct mbus_dram_window *cs = dram->cs + i;
154 156
155 writel(cs->base & 0xffff0000, base + PCIE_WIN04_BASE_OFF(i)); 157 writel(cs->base & 0xffff0000, base + PCIE_WIN04_BASE_OFF(i));
156 writel(0, base + PCIE_WIN04_REMAP_OFF(i)); 158 writel(0, base + PCIE_WIN04_REMAP_OFF(i));
@@ -184,7 +186,7 @@ void __init orion_pcie_setup(void __iomem *base)
184 /* 186 /*
185 * Point PCIe unit MBUS decode windows to DRAM space. 187 * Point PCIe unit MBUS decode windows to DRAM space.
186 */ 188 */
187 orion_pcie_setup_wins(base, &orion_mbus_dram_info); 189 orion_pcie_setup_wins(base);
188 190
189 /* 191 /*
190 * Master + slave enable. 192 * Master + slave enable.