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author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-07-14 19:06:58 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-07-14 19:06:58 -0400 |
commit | 85082fd7cbe3173198aac0eb5e85ab1edcc6352c (patch) | |
tree | edbc09b7945994f78668d218fa02e991c3b3b365 /arch/arm/plat-orion/pcie.c | |
parent | 666484f0250db2e016948d63b3ef33e202e3b8d0 (diff) | |
parent | 53ffe3b440aa85af6fc4eda09b2d44bcdd312d4d (diff) |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (241 commits)
[ARM] 5171/1: ep93xx: fix compilation of modules using clocks
[ARM] 5133/2: at91sam9g20 defconfig file
[ARM] 5130/4: Support for the at91sam9g20
[ARM] 5160/1: IOP3XX: gpio/gpiolib support
[ARM] at91: Fix NAND FLASH timings for at91sam9x evaluation kits.
[ARM] 5084/1: zylonite: Register AC97 device
[ARM] 5085/2: PXA: Move AC97 over to the new central device declaration model
[ARM] 5120/1: pxa: correct platform driver names for PXA25x and PXA27x UDC drivers
[ARM] 5147/1: pxaficp_ir: drop pxa_gpio_mode calls, as pin setting
[ARM] 5145/1: PXA2xx: provide api to control IrDA pins state
[ARM] 5144/1: pxaficp_ir: cleanup includes
[ARM] pxa: remove pxa_set_cken()
[ARM] pxa: allow clk aliases
[ARM] Feroceon: don't disable BPU on boot
[ARM] Orion: LED support for HP mv2120
[ARM] Orion: add RD88F5181L-FXO support
[ARM] Orion: add RD88F5181L-GE support
[ARM] Orion: add Netgear WNR854T support
[ARM] s3c2410_defconfig: update for current build
[ARM] Acer n30: Minor style and indentation fixes.
...
Diffstat (limited to 'arch/arm/plat-orion/pcie.c')
-rw-r--r-- | arch/arm/plat-orion/pcie.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c index abfda53f1800..ca32c60e14d7 100644 --- a/arch/arm/plat-orion/pcie.c +++ b/arch/arm/plat-orion/pcie.c | |||
@@ -39,6 +39,7 @@ | |||
39 | #define PCIE_CONF_DATA_OFF 0x18fc | 39 | #define PCIE_CONF_DATA_OFF 0x18fc |
40 | #define PCIE_MASK_OFF 0x1910 | 40 | #define PCIE_MASK_OFF 0x1910 |
41 | #define PCIE_CTRL_OFF 0x1a00 | 41 | #define PCIE_CTRL_OFF 0x1a00 |
42 | #define PCIE_CTRL_X1_MODE 0x0001 | ||
42 | #define PCIE_STAT_OFF 0x1a04 | 43 | #define PCIE_STAT_OFF 0x1a04 |
43 | #define PCIE_STAT_DEV_OFFS 20 | 44 | #define PCIE_STAT_DEV_OFFS 20 |
44 | #define PCIE_STAT_DEV_MASK 0x1f | 45 | #define PCIE_STAT_DEV_MASK 0x1f |
@@ -62,6 +63,11 @@ int orion_pcie_link_up(void __iomem *base) | |||
62 | return !(readl(base + PCIE_STAT_OFF) & PCIE_STAT_LINK_DOWN); | 63 | return !(readl(base + PCIE_STAT_OFF) & PCIE_STAT_LINK_DOWN); |
63 | } | 64 | } |
64 | 65 | ||
66 | int __init orion_pcie_x4_mode(void __iomem *base) | ||
67 | { | ||
68 | return !(readl(base + PCIE_CTRL_OFF) & PCIE_CTRL_X1_MODE); | ||
69 | } | ||
70 | |||
65 | int orion_pcie_get_local_bus_nr(void __iomem *base) | 71 | int orion_pcie_get_local_bus_nr(void __iomem *base) |
66 | { | 72 | { |
67 | u32 stat = readl(base + PCIE_STAT_OFF); | 73 | u32 stat = readl(base + PCIE_STAT_OFF); |