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author | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2012-10-29 12:45:21 -0400 |
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committer | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2012-11-20 09:58:56 -0500 |
commit | af19e148be5e2d7acf2d6322cce74e85be87d603 (patch) | |
tree | 34efad3da3a4f10b3194b849fbbd88bf073bcfd3 /arch/arm/plat-orion/common.c | |
parent | 60d151f38799d5e15845ee04b73cbf3839f1b06c (diff) |
arm: plat-orion: convert the registration of the xor0 engine to the single driver
Instead of registering one 'mv_xor_shared' device for the XOR engine,
and then two 'mv_xor' devices for the XOR channels, pass the channels
properties as platform_data for the main 'mv_xor_shared' device.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Diffstat (limited to 'arch/arm/plat-orion/common.c')
-rw-r--r-- | arch/arm/plat-orion/common.c | 94 |
1 files changed, 42 insertions, 52 deletions
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c index b8a688cad4c2..800af19c51c5 100644 --- a/arch/arm/plat-orion/common.c +++ b/arch/arm/plat-orion/common.c | |||
@@ -636,61 +636,43 @@ static struct resource orion_xor0_shared_resources[] = { | |||
636 | }, { | 636 | }, { |
637 | .name = "xor 0 high", | 637 | .name = "xor 0 high", |
638 | .flags = IORESOURCE_MEM, | 638 | .flags = IORESOURCE_MEM, |
639 | }, { | ||
640 | .name = "irq channel 0", | ||
641 | .flags = IORESOURCE_IRQ, | ||
642 | }, { | ||
643 | .name = "irq channel 1", | ||
644 | .flags = IORESOURCE_IRQ, | ||
639 | }, | 645 | }, |
640 | }; | 646 | }; |
641 | 647 | ||
642 | static struct platform_device orion_xor0_shared = { | 648 | static struct platform_device orion_xor0_shared; |
643 | .name = MV_XOR_SHARED_NAME, | ||
644 | .id = 0, | ||
645 | .num_resources = ARRAY_SIZE(orion_xor0_shared_resources), | ||
646 | .resource = orion_xor0_shared_resources, | ||
647 | }; | ||
648 | |||
649 | static struct resource orion_xor00_resources[] = { | ||
650 | [0] = { | ||
651 | .flags = IORESOURCE_IRQ, | ||
652 | }, | ||
653 | }; | ||
654 | |||
655 | static struct mv_xor_platform_data orion_xor00_data = { | ||
656 | .shared = &orion_xor0_shared, | ||
657 | .hw_id = 0, | ||
658 | .pool_size = PAGE_SIZE, | ||
659 | }; | ||
660 | 649 | ||
661 | static struct platform_device orion_xor00_channel = { | 650 | static struct mv_xor_platform_data orion_xor0_channels_pdata[2] = { |
662 | .name = MV_XOR_NAME, | 651 | { |
663 | .id = 0, | 652 | .shared = &orion_xor0_shared, |
664 | .num_resources = ARRAY_SIZE(orion_xor00_resources), | 653 | .hw_id = 0, |
665 | .resource = orion_xor00_resources, | 654 | .pool_size = PAGE_SIZE, |
666 | .dev = { | ||
667 | .dma_mask = &orion_xor_dmamask, | ||
668 | .coherent_dma_mask = DMA_BIT_MASK(64), | ||
669 | .platform_data = &orion_xor00_data, | ||
670 | }, | 655 | }, |
671 | }; | 656 | { |
672 | 657 | .shared = &orion_xor0_shared, | |
673 | static struct resource orion_xor01_resources[] = { | 658 | .hw_id = 1, |
674 | [0] = { | 659 | .pool_size = PAGE_SIZE, |
675 | .flags = IORESOURCE_IRQ, | ||
676 | }, | 660 | }, |
677 | }; | 661 | }; |
678 | 662 | ||
679 | static struct mv_xor_platform_data orion_xor01_data = { | 663 | static struct mv_xor_shared_platform_data orion_xor0_pdata = { |
680 | .shared = &orion_xor0_shared, | 664 | .channels = orion_xor0_channels_pdata, |
681 | .hw_id = 1, | ||
682 | .pool_size = PAGE_SIZE, | ||
683 | }; | 665 | }; |
684 | 666 | ||
685 | static struct platform_device orion_xor01_channel = { | 667 | static struct platform_device orion_xor0_shared = { |
686 | .name = MV_XOR_NAME, | 668 | .name = MV_XOR_SHARED_NAME, |
687 | .id = 1, | 669 | .id = 0, |
688 | .num_resources = ARRAY_SIZE(orion_xor01_resources), | 670 | .num_resources = ARRAY_SIZE(orion_xor0_shared_resources), |
689 | .resource = orion_xor01_resources, | 671 | .resource = orion_xor0_shared_resources, |
690 | .dev = { | 672 | .dev = { |
691 | .dma_mask = &orion_xor_dmamask, | 673 | .dma_mask = &orion_xor_dmamask, |
692 | .coherent_dma_mask = DMA_BIT_MASK(64), | 674 | .coherent_dma_mask = DMA_BIT_MASK(64), |
693 | .platform_data = &orion_xor01_data, | 675 | .platform_data = &orion_xor0_pdata, |
694 | }, | 676 | }, |
695 | }; | 677 | }; |
696 | 678 | ||
@@ -704,15 +686,23 @@ void __init orion_xor0_init(unsigned long mapbase_low, | |||
704 | orion_xor0_shared_resources[1].start = mapbase_high; | 686 | orion_xor0_shared_resources[1].start = mapbase_high; |
705 | orion_xor0_shared_resources[1].end = mapbase_high + 0xff; | 687 | orion_xor0_shared_resources[1].end = mapbase_high + 0xff; |
706 | 688 | ||
707 | orion_xor00_resources[0].start = irq_0; | 689 | orion_xor0_shared_resources[2].start = irq_0; |
708 | orion_xor00_resources[0].end = irq_0; | 690 | orion_xor0_shared_resources[2].end = irq_0; |
709 | orion_xor01_resources[0].start = irq_1; | 691 | orion_xor0_shared_resources[3].start = irq_1; |
710 | orion_xor01_resources[0].end = irq_1; | 692 | orion_xor0_shared_resources[3].end = irq_1; |
711 | 693 | ||
712 | platform_device_register(&orion_xor0_shared); | 694 | /* |
695 | * two engines can't do memset simultaneously, this limitation | ||
696 | * satisfied by removing memset support from one of the engines. | ||
697 | */ | ||
698 | dma_cap_set(DMA_MEMCPY, orion_xor0_channels_pdata[0].cap_mask); | ||
699 | dma_cap_set(DMA_XOR, orion_xor0_channels_pdata[0].cap_mask); | ||
713 | 700 | ||
714 | orion_xor_init_channels(&orion_xor00_data, &orion_xor00_channel, | 701 | dma_cap_set(DMA_MEMSET, orion_xor0_channels_pdata[1].cap_mask); |
715 | &orion_xor01_data, &orion_xor01_channel); | 702 | dma_cap_set(DMA_MEMCPY, orion_xor0_channels_pdata[1].cap_mask); |
703 | dma_cap_set(DMA_XOR, orion_xor0_channels_pdata[1].cap_mask); | ||
704 | |||
705 | platform_device_register(&orion_xor0_shared); | ||
716 | } | 706 | } |
717 | 707 | ||
718 | /***************************************************************************** | 708 | /***************************************************************************** |