Merge 'staging-next' to Linus's tree

This merges the staging-next tree to Linus's tree and resolves
some conflicts that were present due to changes in other trees that were
affected by files here.

Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

3 files changed, 103 insertions, 0 deletions

diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 221a675ebbae..f04731820301 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -19,6 +19,7 @@
 #include <plat/common.h>
 #include <plat/board.h>
 #include <plat/vram.h>
+#include <plat/dsp.h>
 
 
 #define NO_LENGTH_CHECK 0xffffffff
@@ -64,4 +65,5 @@ void __init omap_reserve(void)
 {
         omapfb_reserve_sdram_memblock();
         omap_vram_reserve_sdram_memblock();
+        omap_dsp_reserve_sdram_memblock();
 }
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 1e2383eae638..6f42a18b8aa4 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -15,6 +15,7 @@
 #include <linux/platform_device.h>
 #include <linux/io.h>
 #include <linux/slab.h>
+#include <linux/memblock.h>
 
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
@@ -231,6 +232,75 @@ static void omap_init_uwire(void)
 static inline void omap_init_uwire(void) {}
 #endif
 
+/*-------------------------------------------------------------------------*/
+
+#if     defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
+
+static struct resource wdt_resources[] = {
+        {
+                .flags          = IORESOURCE_MEM,
+        },
+};
+
+static struct platform_device omap_wdt_device = {
+        .name      = "omap_wdt",
+        .id          = -1,
+        .num_resources  = ARRAY_SIZE(wdt_resources),
+        .resource       = wdt_resources,
+};
+
+static void omap_init_wdt(void)
+{
+        if (cpu_is_omap16xx())
+                wdt_resources[0].start = 0xfffeb000;
+        else if (cpu_is_omap2420())
+                wdt_resources[0].start = 0x48022000; /* WDT2 */
+        else if (cpu_is_omap2430())
+                wdt_resources[0].start = 0x49016000; /* WDT2 */
+        else if (cpu_is_omap343x())
+                wdt_resources[0].start = 0x48314000; /* WDT2 */
+        else if (cpu_is_omap44xx())
+                wdt_resources[0].start = 0x4a314000;
+        else
+                return;
+
+        wdt_resources[0].end = wdt_resources[0].start + 0x4f;
+
+        (void) platform_device_register(&omap_wdt_device);
+}
+#else
+static inline void omap_init_wdt(void) {}
+#endif
+
+#if defined(CONFIG_TIDSPBRIDGE) || defined(CONFIG_TIDSPBRIDGE_MODULE)
+
+static phys_addr_t omap_dsp_phys_mempool_base;
+
+void __init omap_dsp_reserve_sdram_memblock(void)
+{
+        phys_addr_t size = CONFIG_TIDSPBRIDGE_MEMPOOL_SIZE;
+        phys_addr_t paddr;
+
+        if (!size)
+                return;
+
+        paddr = __memblock_alloc_base(size, SZ_1M, MEMBLOCK_REAL_LIMIT);
+        if (!paddr) {
+                pr_err("%s: failed to reserve %x bytes\n",
+                                __func__, size);
+                return;
+        }
+
+        omap_dsp_phys_mempool_base = paddr;
+}
+
+phys_addr_t omap_dsp_get_mempool_base(void)
+{
+        return omap_dsp_phys_mempool_base;
+}
+EXPORT_SYMBOL(omap_dsp_get_mempool_base);
+#endif
+
 /*
  * This gets called after board-specific INIT_MACHINE, and initializes most
  * on-chip peripherals accessible on this board (except for few like USB):
diff --git a/arch/arm/plat-omap/include/plat/dsp.h b/arch/arm/plat-omap/include/plat/dsp.h
new file mode 100644
index 000000000000..9c604b390f9f
--- /dev/null
+++ b/arch/arm/plat-omap/include/plat/dsp.h
@@ -0,0 +1,31 @@
+#ifndef __OMAP_DSP_H__
+#define __OMAP_DSP_H__
+
+#include <linux/types.h>
+
+struct omap_dsp_platform_data {
+        void (*dsp_set_min_opp) (u8 opp_id);
+        u8 (*dsp_get_opp) (void);
+        void (*cpu_set_freq) (unsigned long f);
+        unsigned long (*cpu_get_freq) (void);
+        unsigned long mpu_speed[6];
+
+        /* functions to write and read PRCM registers */
+        void (*dsp_prm_write)(u32, s16 , u16);
+        u32 (*dsp_prm_read)(s16 , u16);
+        u32 (*dsp_prm_rmw_bits)(u32, u32, s16, s16);
+        void (*dsp_cm_write)(u32, s16 , u16);
+        u32 (*dsp_cm_read)(s16 , u16);
+        u32 (*dsp_cm_rmw_bits)(u32, u32, s16, s16);
+
+        phys_addr_t phys_mempool_base;
+        phys_addr_t phys_mempool_size;
+};
+
+#if defined(CONFIG_TIDSPBRIDGE) || defined(CONFIG_TIDSPBRIDGE_MODULE)
+extern void omap_dsp_reserve_sdram_memblock(void);
+#else
+static inline void omap_dsp_reserve_sdram_memblock(void) { }
+#endif
+
+#endif