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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2009-03-25 14:31:35 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-03-25 14:31:35 -0400
commit8937b7349ca9e25a02b2a72ccb7fba404ddedc5b (patch)
tree434ffe23d318f8af55850a26c3431ce8b82ab6f4 /arch/arm/plat-omap
parent997302259f386bca8fe1db67c50296ca426c438f (diff)
parentffe7f95bb1a4d1e9ca5d252445dc38476e1a208e (diff)
Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 into devel
Diffstat (limited to 'arch/arm/plat-omap')
-rw-r--r--arch/arm/plat-omap/Kconfig8
-rw-r--r--arch/arm/plat-omap/devices.c3
-rw-r--r--arch/arm/plat-omap/dma.c28
-rw-r--r--arch/arm/plat-omap/dmtimer.c26
-rw-r--r--arch/arm/plat-omap/gpio.c111
-rw-r--r--arch/arm/plat-omap/i2c.c104
-rw-r--r--arch/arm/plat-omap/include/mach/board-2430sdp.h41
-rw-r--r--arch/arm/plat-omap/include/mach/board-apollon.h46
-rw-r--r--arch/arm/plat-omap/include/mach/board-fsample.h51
-rw-r--r--arch/arm/plat-omap/include/mach/board-h2.h41
-rw-r--r--arch/arm/plat-omap/include/mach/board-h3.h38
-rw-r--r--arch/arm/plat-omap/include/mach/board-h4.h38
-rw-r--r--arch/arm/plat-omap/include/mach/board-innovator.h52
-rw-r--r--arch/arm/plat-omap/include/mach/board-ldp.h39
-rw-r--r--arch/arm/plat-omap/include/mach/board-nokia.h54
-rw-r--r--arch/arm/plat-omap/include/mach/board-omap3beagle.h33
-rw-r--r--arch/arm/plat-omap/include/mach/board-osk.h47
-rw-r--r--arch/arm/plat-omap/include/mach/board-overo.h26
-rw-r--r--arch/arm/plat-omap/include/mach/board-palmte.h32
-rw-r--r--arch/arm/plat-omap/include/mach/board-palmtt.h23
-rw-r--r--arch/arm/plat-omap/include/mach/board-palmz71.h26
-rw-r--r--arch/arm/plat-omap/include/mach/board-perseus2.h39
-rw-r--r--arch/arm/plat-omap/include/mach/board-voiceblue.h1
-rw-r--r--arch/arm/plat-omap/include/mach/board.h4
-rw-r--r--arch/arm/plat-omap/include/mach/cpu.h35
-rw-r--r--arch/arm/plat-omap/include/mach/gpio.h3
-rw-r--r--arch/arm/plat-omap/include/mach/hardware.h74
-rw-r--r--arch/arm/plat-omap/include/mach/irqs.h83
-rw-r--r--arch/arm/plat-omap/include/mach/mailbox.h27
-rw-r--r--arch/arm/plat-omap/include/mach/mmc.h2
-rw-r--r--arch/arm/plat-omap/include/mach/mux.h65
-rw-r--r--arch/arm/plat-omap/include/mach/omap34xx.h28
-rw-r--r--arch/arm/plat-omap/include/mach/omap850.h102
-rw-r--r--arch/arm/plat-omap/include/mach/system.h2
-rw-r--r--arch/arm/plat-omap/include/mach/usb.h10
-rw-r--r--arch/arm/plat-omap/mailbox.c152
-rw-r--r--arch/arm/plat-omap/mailbox.h100
-rw-r--r--arch/arm/plat-omap/sram.c2
-rw-r--r--arch/arm/plat-omap/usb.c25
39 files changed, 722 insertions, 899 deletions
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index e25e1ac64fc1..9dd68fafb374 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -107,6 +107,14 @@ config OMAP_MCBSP
107 Say Y here if you want support for the OMAP Multichannel 107 Say Y here if you want support for the OMAP Multichannel
108 Buffered Serial Port. 108 Buffered Serial Port.
109 109
110config OMAP_MBOX_FWK
111 tristate "Mailbox framework support"
112 depends on ARCH_OMAP
113 default n
114 help
115 Say Y here if you want to use OMAP Mailbox framework support for
116 DSP, IVA1.0 and IVA2 in OMAP1/2/3.
117
110choice 118choice
111 prompt "System timer" 119 prompt "System timer"
112 default OMAP_MPU_TIMER 120 default OMAP_MPU_TIMER
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c
index 208dbb121f47..87fb7ff41794 100644
--- a/arch/arm/plat-omap/devices.c
+++ b/arch/arm/plat-omap/devices.c
@@ -228,6 +228,9 @@ int __init omap_mmc_add(const char *name, int id, unsigned long base,
228 ret = platform_device_add(pdev); 228 ret = platform_device_add(pdev);
229 if (ret) 229 if (ret)
230 goto fail; 230 goto fail;
231
232 /* return device handle to board setup code */
233 data->dev = &pdev->dev;
231 return 0; 234 return 0;
232 235
233fail: 236fail:
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 47ec77af4ccb..21cc0142b97a 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -123,6 +123,7 @@ static struct dma_link_info *dma_linked_lch;
123 123
124static int dma_lch_count; 124static int dma_lch_count;
125static int dma_chan_count; 125static int dma_chan_count;
126static int omap_dma_reserve_channels;
126 127
127static spinlock_t dma_chan_lock; 128static spinlock_t dma_chan_lock;
128static struct omap_dma_lch *dma_chan; 129static struct omap_dma_lch *dma_chan;
@@ -737,7 +738,7 @@ int omap_request_dma(int dev_id, const char *dev_name,
737 * id. 738 * id.
738 */ 739 */
739 dma_write(dev_id | (1 << 10), CCR(free_ch)); 740 dma_write(dev_id | (1 << 10), CCR(free_ch));
740 } else if (cpu_is_omap730() || cpu_is_omap15xx()) { 741 } else if (cpu_is_omap7xx() || cpu_is_omap15xx()) {
741 dma_write(dev_id, CCR(free_ch)); 742 dma_write(dev_id, CCR(free_ch));
742 } 743 }
743 744
@@ -1900,7 +1901,7 @@ static int omap2_dma_handle_ch(int ch)
1900/* STATUS register count is from 1-32 while our is 0-31 */ 1901/* STATUS register count is from 1-32 while our is 0-31 */
1901static irqreturn_t omap2_dma_irq_handler(int irq, void *dev_id) 1902static irqreturn_t omap2_dma_irq_handler(int irq, void *dev_id)
1902{ 1903{
1903 u32 val; 1904 u32 val, enable_reg;
1904 int i; 1905 int i;
1905 1906
1906 val = dma_read(IRQSTATUS_L0); 1907 val = dma_read(IRQSTATUS_L0);
@@ -1909,6 +1910,8 @@ static irqreturn_t omap2_dma_irq_handler(int irq, void *dev_id)
1909 printk(KERN_WARNING "Spurious DMA IRQ\n"); 1910 printk(KERN_WARNING "Spurious DMA IRQ\n");
1910 return IRQ_HANDLED; 1911 return IRQ_HANDLED;
1911 } 1912 }
1913 enable_reg = dma_read(IRQENABLE_L0);
1914 val &= enable_reg; /* Dispatch only relevant interrupts */
1912 for (i = 0; i < dma_lch_count && val != 0; i++) { 1915 for (i = 0; i < dma_lch_count && val != 0; i++) {
1913 if (val & 1) 1916 if (val & 1)
1914 omap2_dma_handle_ch(i); 1917 omap2_dma_handle_ch(i);
@@ -2321,6 +2324,10 @@ static int __init omap_init_dma(void)
2321 return -ENODEV; 2324 return -ENODEV;
2322 } 2325 }
2323 2326
2327 if (cpu_class_is_omap2() && omap_dma_reserve_channels
2328 && (omap_dma_reserve_channels <= dma_lch_count))
2329 dma_lch_count = omap_dma_reserve_channels;
2330
2324 dma_chan = kzalloc(sizeof(struct omap_dma_lch) * dma_lch_count, 2331 dma_chan = kzalloc(sizeof(struct omap_dma_lch) * dma_lch_count,
2325 GFP_KERNEL); 2332 GFP_KERNEL);
2326 if (!dma_chan) 2333 if (!dma_chan)
@@ -2339,7 +2346,7 @@ static int __init omap_init_dma(void)
2339 printk(KERN_INFO "DMA support for OMAP15xx initialized\n"); 2346 printk(KERN_INFO "DMA support for OMAP15xx initialized\n");
2340 dma_chan_count = 9; 2347 dma_chan_count = 9;
2341 enable_1510_mode = 1; 2348 enable_1510_mode = 1;
2342 } else if (cpu_is_omap16xx() || cpu_is_omap730()) { 2349 } else if (cpu_is_omap16xx() || cpu_is_omap7xx()) {
2343 printk(KERN_INFO "OMAP DMA hardware version %d\n", 2350 printk(KERN_INFO "OMAP DMA hardware version %d\n",
2344 dma_read(HW_ID)); 2351 dma_read(HW_ID));
2345 printk(KERN_INFO "DMA capabilities: %08x:%08x:%04x:%04x:%04x\n", 2352 printk(KERN_INFO "DMA capabilities: %08x:%08x:%04x:%04x:%04x\n",
@@ -2371,7 +2378,7 @@ static int __init omap_init_dma(void)
2371 u8 revision = dma_read(REVISION) & 0xff; 2378 u8 revision = dma_read(REVISION) & 0xff;
2372 printk(KERN_INFO "OMAP DMA hardware revision %d.%d\n", 2379 printk(KERN_INFO "OMAP DMA hardware revision %d.%d\n",
2373 revision >> 4, revision & 0xf); 2380 revision >> 4, revision & 0xf);
2374 dma_chan_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT; 2381 dma_chan_count = dma_lch_count;
2375 } else { 2382 } else {
2376 dma_chan_count = 0; 2383 dma_chan_count = 0;
2377 return 0; 2384 return 0;
@@ -2437,4 +2444,17 @@ static int __init omap_init_dma(void)
2437 2444
2438arch_initcall(omap_init_dma); 2445arch_initcall(omap_init_dma);
2439 2446
2447/*
2448 * Reserve the omap SDMA channels using cmdline bootarg
2449 * "omap_dma_reserve_ch=". The valid range is 1 to 32
2450 */
2451static int __init omap_dma_cmdline_reserve_ch(char *str)
2452{
2453 if (get_option(&str, &omap_dma_reserve_channels) != 1)
2454 omap_dma_reserve_channels = 0;
2455 return 1;
2456}
2457
2458__setup("omap_dma_reserve_ch=", omap_dma_cmdline_reserve_ch);
2459
2440 2460
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index e4f0ce04ba92..bfd47570cc91 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -33,6 +33,7 @@
33#include <linux/clk.h> 33#include <linux/clk.h>
34#include <linux/delay.h> 34#include <linux/delay.h>
35#include <linux/io.h> 35#include <linux/io.h>
36#include <linux/module.h>
36#include <mach/hardware.h> 37#include <mach/hardware.h>
37#include <mach/dmtimer.h> 38#include <mach/dmtimer.h>
38#include <mach/irqs.h> 39#include <mach/irqs.h>
@@ -362,6 +363,7 @@ struct omap_dm_timer *omap_dm_timer_request(void)
362 363
363 return timer; 364 return timer;
364} 365}
366EXPORT_SYMBOL_GPL(omap_dm_timer_request);
365 367
366struct omap_dm_timer *omap_dm_timer_request_specific(int id) 368struct omap_dm_timer *omap_dm_timer_request_specific(int id)
367{ 369{
@@ -385,6 +387,7 @@ struct omap_dm_timer *omap_dm_timer_request_specific(int id)
385 387
386 return timer; 388 return timer;
387} 389}
390EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific);
388 391
389void omap_dm_timer_free(struct omap_dm_timer *timer) 392void omap_dm_timer_free(struct omap_dm_timer *timer)
390{ 393{
@@ -395,6 +398,7 @@ void omap_dm_timer_free(struct omap_dm_timer *timer)
395 WARN_ON(!timer->reserved); 398 WARN_ON(!timer->reserved);
396 timer->reserved = 0; 399 timer->reserved = 0;
397} 400}
401EXPORT_SYMBOL_GPL(omap_dm_timer_free);
398 402
399void omap_dm_timer_enable(struct omap_dm_timer *timer) 403void omap_dm_timer_enable(struct omap_dm_timer *timer)
400{ 404{
@@ -406,6 +410,7 @@ void omap_dm_timer_enable(struct omap_dm_timer *timer)
406 410
407 timer->enabled = 1; 411 timer->enabled = 1;
408} 412}
413EXPORT_SYMBOL_GPL(omap_dm_timer_enable);
409 414
410void omap_dm_timer_disable(struct omap_dm_timer *timer) 415void omap_dm_timer_disable(struct omap_dm_timer *timer)
411{ 416{
@@ -417,11 +422,13 @@ void omap_dm_timer_disable(struct omap_dm_timer *timer)
417 422
418 timer->enabled = 0; 423 timer->enabled = 0;
419} 424}
425EXPORT_SYMBOL_GPL(omap_dm_timer_disable);
420 426
421int omap_dm_timer_get_irq(struct omap_dm_timer *timer) 427int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
422{ 428{
423 return timer->irq; 429 return timer->irq;
424} 430}
431EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq);
425 432
426#if defined(CONFIG_ARCH_OMAP1) 433#if defined(CONFIG_ARCH_OMAP1)
427 434
@@ -452,6 +459,7 @@ __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
452 459
453 return inputmask; 460 return inputmask;
454} 461}
462EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
455 463
456#elif defined(CONFIG_ARCH_OMAP2) || defined (CONFIG_ARCH_OMAP3) 464#elif defined(CONFIG_ARCH_OMAP2) || defined (CONFIG_ARCH_OMAP3)
457 465
@@ -459,6 +467,7 @@ struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
459{ 467{
460 return timer->fclk; 468 return timer->fclk;
461} 469}
470EXPORT_SYMBOL_GPL(omap_dm_timer_get_fclk);
462 471
463__u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask) 472__u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
464{ 473{
@@ -466,6 +475,7 @@ __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
466 475
467 return 0; 476 return 0;
468} 477}
478EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
469 479
470#endif 480#endif
471 481
@@ -473,6 +483,7 @@ void omap_dm_timer_trigger(struct omap_dm_timer *timer)
473{ 483{
474 omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0); 484 omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
475} 485}
486EXPORT_SYMBOL_GPL(omap_dm_timer_trigger);
476 487
477void omap_dm_timer_start(struct omap_dm_timer *timer) 488void omap_dm_timer_start(struct omap_dm_timer *timer)
478{ 489{
@@ -484,6 +495,7 @@ void omap_dm_timer_start(struct omap_dm_timer *timer)
484 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); 495 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
485 } 496 }
486} 497}
498EXPORT_SYMBOL_GPL(omap_dm_timer_start);
487 499
488void omap_dm_timer_stop(struct omap_dm_timer *timer) 500void omap_dm_timer_stop(struct omap_dm_timer *timer)
489{ 501{
@@ -495,6 +507,7 @@ void omap_dm_timer_stop(struct omap_dm_timer *timer)
495 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); 507 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
496 } 508 }
497} 509}
510EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
498 511
499#ifdef CONFIG_ARCH_OMAP1 512#ifdef CONFIG_ARCH_OMAP1
500 513
@@ -507,6 +520,7 @@ void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
507 l |= source << n; 520 l |= source << n;
508 omap_writel(l, MOD_CONF_CTRL_1); 521 omap_writel(l, MOD_CONF_CTRL_1);
509} 522}
523EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
510 524
511#else 525#else
512 526
@@ -523,6 +537,7 @@ void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
523 * cause an abort. */ 537 * cause an abort. */
524 __delay(150000); 538 __delay(150000);
525} 539}
540EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
526 541
527#endif 542#endif
528 543
@@ -541,6 +556,7 @@ void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
541 556
542 omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0); 557 omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
543} 558}
559EXPORT_SYMBOL_GPL(omap_dm_timer_set_load);
544 560
545/* Optimized set_load which removes costly spin wait in timer_start */ 561/* Optimized set_load which removes costly spin wait in timer_start */
546void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, 562void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
@@ -560,6 +576,7 @@ void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
560 omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, load); 576 omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, load);
561 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); 577 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
562} 578}
579EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start);
563 580
564void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, 581void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
565 unsigned int match) 582 unsigned int match)
@@ -574,6 +591,7 @@ void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
574 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); 591 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
575 omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match); 592 omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match);
576} 593}
594EXPORT_SYMBOL_GPL(omap_dm_timer_set_match);
577 595
578void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, 596void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
579 int toggle, int trigger) 597 int toggle, int trigger)
@@ -590,6 +608,7 @@ void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
590 l |= trigger << 10; 608 l |= trigger << 10;
591 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); 609 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
592} 610}
611EXPORT_SYMBOL_GPL(omap_dm_timer_set_pwm);
593 612
594void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler) 613void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
595{ 614{
@@ -603,6 +622,7 @@ void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
603 } 622 }
604 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); 623 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
605} 624}
625EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler);
606 626
607void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, 627void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
608 unsigned int value) 628 unsigned int value)
@@ -610,6 +630,7 @@ void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
610 omap_dm_timer_write_reg(timer, OMAP_TIMER_INT_EN_REG, value); 630 omap_dm_timer_write_reg(timer, OMAP_TIMER_INT_EN_REG, value);
611 omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, value); 631 omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, value);
612} 632}
633EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable);
613 634
614unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer) 635unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
615{ 636{
@@ -619,11 +640,13 @@ unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
619 640
620 return l; 641 return l;
621} 642}
643EXPORT_SYMBOL_GPL(omap_dm_timer_read_status);
622 644
623void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value) 645void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
624{ 646{
625 omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG, value); 647 omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG, value);
626} 648}
649EXPORT_SYMBOL_GPL(omap_dm_timer_write_status);
627 650
628unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer) 651unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
629{ 652{
@@ -633,11 +656,13 @@ unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
633 656
634 return l; 657 return l;
635} 658}
659EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter);
636 660
637void omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value) 661void omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value)
638{ 662{
639 omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, value); 663 omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, value);
640} 664}
665EXPORT_SYMBOL_GPL(omap_dm_timer_write_counter);
641 666
642int omap_dm_timers_active(void) 667int omap_dm_timers_active(void)
643{ 668{
@@ -658,6 +683,7 @@ int omap_dm_timers_active(void)
658 } 683 }
659 return 0; 684 return 0;
660} 685}
686EXPORT_SYMBOL_GPL(omap_dm_timers_active);
661 687
662int __init omap_dm_timer_init(void) 688int __init omap_dm_timer_init(void)
663{ 689{
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index f856a90b264e..d3fa41e3d8c5 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -81,6 +81,22 @@
81#define OMAP730_GPIO_INT_STATUS 0x14 81#define OMAP730_GPIO_INT_STATUS 0x14
82 82
83/* 83/*
84 * OMAP850 specific GPIO registers
85 */
86#define OMAP850_GPIO1_BASE IO_ADDRESS(0xfffbc000)
87#define OMAP850_GPIO2_BASE IO_ADDRESS(0xfffbc800)
88#define OMAP850_GPIO3_BASE IO_ADDRESS(0xfffbd000)
89#define OMAP850_GPIO4_BASE IO_ADDRESS(0xfffbd800)
90#define OMAP850_GPIO5_BASE IO_ADDRESS(0xfffbe000)
91#define OMAP850_GPIO6_BASE IO_ADDRESS(0xfffbe800)
92#define OMAP850_GPIO_DATA_INPUT 0x00
93#define OMAP850_GPIO_DATA_OUTPUT 0x04
94#define OMAP850_GPIO_DIR_CONTROL 0x08
95#define OMAP850_GPIO_INT_CONTROL 0x0c
96#define OMAP850_GPIO_INT_MASK 0x10
97#define OMAP850_GPIO_INT_STATUS 0x14
98
99/*
84 * omap24xx specific GPIO registers 100 * omap24xx specific GPIO registers
85 */ 101 */
86#define OMAP242X_GPIO1_BASE IO_ADDRESS(0x48018000) 102#define OMAP242X_GPIO1_BASE IO_ADDRESS(0x48018000)
@@ -159,7 +175,8 @@ struct gpio_bank {
159#define METHOD_GPIO_1510 1 175#define METHOD_GPIO_1510 1
160#define METHOD_GPIO_1610 2 176#define METHOD_GPIO_1610 2
161#define METHOD_GPIO_730 3 177#define METHOD_GPIO_730 3
162#define METHOD_GPIO_24XX 4 178#define METHOD_GPIO_850 4
179#define METHOD_GPIO_24XX 5
163 180
164#ifdef CONFIG_ARCH_OMAP16XX 181#ifdef CONFIG_ARCH_OMAP16XX
165static struct gpio_bank gpio_bank_1610[5] = { 182static struct gpio_bank gpio_bank_1610[5] = {
@@ -190,6 +207,19 @@ static struct gpio_bank gpio_bank_730[7] = {
190}; 207};
191#endif 208#endif
192 209
210#ifdef CONFIG_ARCH_OMAP850
211static struct gpio_bank gpio_bank_850[7] = {
212 { OMAP_MPUIO_BASE, INT_850_MPUIO, IH_MPUIO_BASE, METHOD_MPUIO },
213 { OMAP850_GPIO1_BASE, INT_850_GPIO_BANK1, IH_GPIO_BASE, METHOD_GPIO_850 },
214 { OMAP850_GPIO2_BASE, INT_850_GPIO_BANK2, IH_GPIO_BASE + 32, METHOD_GPIO_850 },
215 { OMAP850_GPIO3_BASE, INT_850_GPIO_BANK3, IH_GPIO_BASE + 64, METHOD_GPIO_850 },
216 { OMAP850_GPIO4_BASE, INT_850_GPIO_BANK4, IH_GPIO_BASE + 96, METHOD_GPIO_850 },
217 { OMAP850_GPIO5_BASE, INT_850_GPIO_BANK5, IH_GPIO_BASE + 128, METHOD_GPIO_850 },
218 { OMAP850_GPIO6_BASE, INT_850_GPIO_BANK6, IH_GPIO_BASE + 160, METHOD_GPIO_850 },
219};
220#endif
221
222
193#ifdef CONFIG_ARCH_OMAP24XX 223#ifdef CONFIG_ARCH_OMAP24XX
194 224
195static struct gpio_bank gpio_bank_242x[4] = { 225static struct gpio_bank gpio_bank_242x[4] = {
@@ -236,7 +266,7 @@ static inline struct gpio_bank *get_gpio_bank(int gpio)
236 return &gpio_bank[0]; 266 return &gpio_bank[0];
237 return &gpio_bank[1 + (gpio >> 4)]; 267 return &gpio_bank[1 + (gpio >> 4)];
238 } 268 }
239 if (cpu_is_omap730()) { 269 if (cpu_is_omap7xx()) {
240 if (OMAP_GPIO_IS_MPUIO(gpio)) 270 if (OMAP_GPIO_IS_MPUIO(gpio))
241 return &gpio_bank[0]; 271 return &gpio_bank[0];
242 return &gpio_bank[1 + (gpio >> 5)]; 272 return &gpio_bank[1 + (gpio >> 5)];
@@ -251,7 +281,7 @@ static inline struct gpio_bank *get_gpio_bank(int gpio)
251 281
252static inline int get_gpio_index(int gpio) 282static inline int get_gpio_index(int gpio)
253{ 283{
254 if (cpu_is_omap730()) 284 if (cpu_is_omap7xx())
255 return gpio & 0x1f; 285 return gpio & 0x1f;
256 if (cpu_is_omap24xx()) 286 if (cpu_is_omap24xx())
257 return gpio & 0x1f; 287 return gpio & 0x1f;
@@ -273,7 +303,7 @@ static inline int gpio_valid(int gpio)
273 return 0; 303 return 0;
274 if ((cpu_is_omap16xx()) && gpio < 64) 304 if ((cpu_is_omap16xx()) && gpio < 64)
275 return 0; 305 return 0;
276 if (cpu_is_omap730() && gpio < 192) 306 if (cpu_is_omap7xx() && gpio < 192)
277 return 0; 307 return 0;
278 if (cpu_is_omap24xx() && gpio < 128) 308 if (cpu_is_omap24xx() && gpio < 128)
279 return 0; 309 return 0;
@@ -318,6 +348,11 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input)
318 reg += OMAP730_GPIO_DIR_CONTROL; 348 reg += OMAP730_GPIO_DIR_CONTROL;
319 break; 349 break;
320#endif 350#endif
351#ifdef CONFIG_ARCH_OMAP850
352 case METHOD_GPIO_850:
353 reg += OMAP850_GPIO_DIR_CONTROL;
354 break;
355#endif
321#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 356#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
322 case METHOD_GPIO_24XX: 357 case METHOD_GPIO_24XX:
323 reg += OMAP24XX_GPIO_OE; 358 reg += OMAP24XX_GPIO_OE;
@@ -380,6 +415,16 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable)
380 l &= ~(1 << gpio); 415 l &= ~(1 << gpio);
381 break; 416 break;
382#endif 417#endif
418#ifdef CONFIG_ARCH_OMAP850
419 case METHOD_GPIO_850:
420 reg += OMAP850_GPIO_DATA_OUTPUT;
421 l = __raw_readl(reg);
422 if (enable)
423 l |= 1 << gpio;
424 else
425 l &= ~(1 << gpio);
426 break;
427#endif
383#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 428#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
384 case METHOD_GPIO_24XX: 429 case METHOD_GPIO_24XX:
385 if (enable) 430 if (enable)
@@ -426,6 +471,11 @@ static int __omap_get_gpio_datain(int gpio)
426 reg += OMAP730_GPIO_DATA_INPUT; 471 reg += OMAP730_GPIO_DATA_INPUT;
427 break; 472 break;
428#endif 473#endif
474#ifdef CONFIG_ARCH_OMAP850
475 case METHOD_GPIO_850:
476 reg += OMAP850_GPIO_DATA_INPUT;
477 break;
478#endif
429#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 479#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
430 case METHOD_GPIO_24XX: 480 case METHOD_GPIO_24XX:
431 reg += OMAP24XX_GPIO_DATAIN; 481 reg += OMAP24XX_GPIO_DATAIN;
@@ -598,6 +648,18 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
598 goto bad; 648 goto bad;
599 break; 649 break;
600#endif 650#endif
651#ifdef CONFIG_ARCH_OMAP850
652 case METHOD_GPIO_850:
653 reg += OMAP850_GPIO_INT_CONTROL;
654 l = __raw_readl(reg);
655 if (trigger & IRQ_TYPE_EDGE_RISING)
656 l |= 1 << gpio;
657 else if (trigger & IRQ_TYPE_EDGE_FALLING)
658 l &= ~(1 << gpio);
659 else
660 goto bad;
661 break;
662#endif
601#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 663#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
602 case METHOD_GPIO_24XX: 664 case METHOD_GPIO_24XX:
603 set_24xx_gpio_triggering(bank, gpio, trigger); 665 set_24xx_gpio_triggering(bank, gpio, trigger);
@@ -678,6 +740,11 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask)
678 reg += OMAP730_GPIO_INT_STATUS; 740 reg += OMAP730_GPIO_INT_STATUS;
679 break; 741 break;
680#endif 742#endif
743#ifdef CONFIG_ARCH_OMAP850
744 case METHOD_GPIO_850:
745 reg += OMAP850_GPIO_INT_STATUS;
746 break;
747#endif
681#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 748#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
682 case METHOD_GPIO_24XX: 749 case METHOD_GPIO_24XX:
683 reg += OMAP24XX_GPIO_IRQSTATUS1; 750 reg += OMAP24XX_GPIO_IRQSTATUS1;
@@ -736,6 +803,13 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank)
736 inv = 1; 803 inv = 1;
737 break; 804 break;
738#endif 805#endif
806#ifdef CONFIG_ARCH_OMAP850
807 case METHOD_GPIO_850:
808 reg += OMAP850_GPIO_INT_MASK;
809 mask = 0xffffffff;
810 inv = 1;
811 break;
812#endif
739#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 813#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
740 case METHOD_GPIO_24XX: 814 case METHOD_GPIO_24XX:
741 reg += OMAP24XX_GPIO_IRQENABLE1; 815 reg += OMAP24XX_GPIO_IRQENABLE1;
@@ -799,6 +873,16 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab
799 l |= gpio_mask; 873 l |= gpio_mask;
800 break; 874 break;
801#endif 875#endif
876#ifdef CONFIG_ARCH_OMAP850
877 case METHOD_GPIO_850:
878 reg += OMAP850_GPIO_INT_MASK;
879 l = __raw_readl(reg);
880 if (enable)
881 l &= ~(gpio_mask);
882 else
883 l |= gpio_mask;
884 break;
885#endif
802#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 886#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
803 case METHOD_GPIO_24XX: 887 case METHOD_GPIO_24XX:
804 if (enable) 888 if (enable)
@@ -983,6 +1067,10 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
983 if (bank->method == METHOD_GPIO_730) 1067 if (bank->method == METHOD_GPIO_730)
984 isr_reg = bank->base + OMAP730_GPIO_INT_STATUS; 1068 isr_reg = bank->base + OMAP730_GPIO_INT_STATUS;
985#endif 1069#endif
1070#ifdef CONFIG_ARCH_OMAP850
1071 if (bank->method == METHOD_GPIO_850)
1072 isr_reg = bank->base + OMAP850_GPIO_INT_STATUS;
1073#endif
986#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 1074#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
987 if (bank->method == METHOD_GPIO_24XX) 1075 if (bank->method == METHOD_GPIO_24XX)
988 isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1; 1076 isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1;
@@ -1372,6 +1460,13 @@ static int __init _omap_gpio_init(void)
1372 gpio_bank = gpio_bank_730; 1460 gpio_bank = gpio_bank_730;
1373 } 1461 }
1374#endif 1462#endif
1463#ifdef CONFIG_ARCH_OMAP850
1464 if (cpu_is_omap850()) {
1465 printk(KERN_INFO "OMAP850 GPIO hardware\n");
1466 gpio_bank_count = 7;
1467 gpio_bank = gpio_bank_850;
1468 }
1469#endif
1375 1470
1376#ifdef CONFIG_ARCH_OMAP24XX 1471#ifdef CONFIG_ARCH_OMAP24XX
1377 if (cpu_is_omap242x()) { 1472 if (cpu_is_omap242x()) {
@@ -1420,7 +1515,7 @@ static int __init _omap_gpio_init(void)
1420 __raw_writew(0xffff, bank->base + OMAP1610_GPIO_IRQSTATUS1); 1515 __raw_writew(0xffff, bank->base + OMAP1610_GPIO_IRQSTATUS1);
1421 __raw_writew(0x0014, bank->base + OMAP1610_GPIO_SYSCONFIG); 1516 __raw_writew(0x0014, bank->base + OMAP1610_GPIO_SYSCONFIG);
1422 } 1517 }
1423 if (cpu_is_omap730() && bank->method == METHOD_GPIO_730) { 1518 if (cpu_is_omap7xx() && bank->method == METHOD_GPIO_730) {
1424 __raw_writel(0xffffffff, bank->base + OMAP730_GPIO_INT_MASK); 1519 __raw_writel(0xffffffff, bank->base + OMAP730_GPIO_INT_MASK);
1425 __raw_writel(0x00000000, bank->base + OMAP730_GPIO_INT_STATUS); 1520 __raw_writel(0x00000000, bank->base + OMAP730_GPIO_INT_STATUS);
1426 1521
@@ -1743,6 +1838,9 @@ static int gpio_is_input(struct gpio_bank *bank, int mask)
1743 case METHOD_GPIO_730: 1838 case METHOD_GPIO_730:
1744 reg += OMAP730_GPIO_DIR_CONTROL; 1839 reg += OMAP730_GPIO_DIR_CONTROL;
1745 break; 1840 break;
1841 case METHOD_GPIO_850:
1842 reg += OMAP850_GPIO_DIR_CONTROL;
1843 break;
1746 case METHOD_GPIO_24XX: 1844 case METHOD_GPIO_24XX:
1747 reg += OMAP24XX_GPIO_OE; 1845 reg += OMAP24XX_GPIO_OE;
1748 break; 1846 break;
@@ -1762,7 +1860,8 @@ static int dbg_gpio_show(struct seq_file *s, void *unused)
1762 1860
1763 if (bank_is_mpuio(bank)) 1861 if (bank_is_mpuio(bank))
1764 gpio = OMAP_MPUIO(0); 1862 gpio = OMAP_MPUIO(0);
1765 else if (cpu_class_is_omap2() || cpu_is_omap730()) 1863 else if (cpu_class_is_omap2() || cpu_is_omap730() ||
1864 cpu_is_omap850())
1766 bankwidth = 32; 1865 bankwidth = 32;
1767 1866
1768 for (j = 0; j < bankwidth; j++, gpio++, mask <<= 1) { 1867 for (j = 0; j < bankwidth; j++, gpio++, mask <<= 1) {
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index 467531edefd3..a303071d5e36 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -98,6 +98,8 @@ static const int omap34xx_pins[][2] = {
98static const int omap34xx_pins[][2] = {}; 98static const int omap34xx_pins[][2] = {};
99#endif 99#endif
100 100
101#define OMAP_I2C_CMDLINE_SETUP (BIT(31))
102
101static void __init omap_i2c_mux_pins(int bus) 103static void __init omap_i2c_mux_pins(int bus)
102{ 104{
103 int scl, sda; 105 int scl, sda;
@@ -119,14 +121,9 @@ static void __init omap_i2c_mux_pins(int bus)
119 omap_cfg_reg(scl); 121 omap_cfg_reg(scl);
120} 122}
121 123
122int __init omap_register_i2c_bus(int bus_id, u32 clkrate, 124static int __init omap_i2c_nr_ports(void)
123 struct i2c_board_info const *info,
124 unsigned len)
125{ 125{
126 int ports, err; 126 int ports = 0;
127 struct platform_device *pdev;
128 struct resource *res;
129 resource_size_t base, irq;
130 127
131 if (cpu_class_is_omap1()) 128 if (cpu_class_is_omap1())
132 ports = 1; 129 ports = 1;
@@ -135,17 +132,16 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
135 else if (cpu_is_omap34xx()) 132 else if (cpu_is_omap34xx())
136 ports = 3; 133 ports = 3;
137 134
138 BUG_ON(bus_id < 1 || bus_id > ports); 135 return ports;
136}
139 137
140 if (info) { 138static int __init omap_i2c_add_bus(int bus_id)
141 err = i2c_register_board_info(bus_id, info, len); 139{
142 if (err) 140 struct platform_device *pdev;
143 return err; 141 struct resource *res;
144 } 142 resource_size_t base, irq;
145 143
146 pdev = &omap_i2c_devices[bus_id - 1]; 144 pdev = &omap_i2c_devices[bus_id - 1];
147 *(u32 *)pdev->dev.platform_data = clkrate;
148
149 if (bus_id == 1) { 145 if (bus_id == 1) {
150 res = pdev->resource; 146 res = pdev->resource;
151 if (cpu_class_is_omap1()) { 147 if (cpu_class_is_omap1()) {
@@ -163,3 +159,81 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
163 omap_i2c_mux_pins(bus_id - 1); 159 omap_i2c_mux_pins(bus_id - 1);
164 return platform_device_register(pdev); 160 return platform_device_register(pdev);
165} 161}
162
163/**
164 * omap_i2c_bus_setup - Process command line options for the I2C bus speed
165 * @str: String of options
166 *
167 * This function allow to override the default I2C bus speed for given I2C
168 * bus with a command line option.
169 *
170 * Format: i2c_bus=bus_id,clkrate (in kHz)
171 *
172 * Returns 1 on success, 0 otherwise.
173 */
174static int __init omap_i2c_bus_setup(char *str)
175{
176 int ports;
177 int ints[3];
178
179 ports = omap_i2c_nr_ports();
180 get_options(str, 3, ints);
181 if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
182 return 0;
183 i2c_rate[ints[1] - 1] = ints[2];
184 i2c_rate[ints[1] - 1] |= OMAP_I2C_CMDLINE_SETUP;
185
186 return 1;
187}
188__setup("i2c_bus=", omap_i2c_bus_setup);
189
190/*
191 * Register busses defined in command line but that are not registered with
192 * omap_register_i2c_bus from board initialization code.
193 */
194static int __init omap_register_i2c_bus_cmdline(void)
195{
196 int i, err = 0;
197
198 for (i = 0; i < ARRAY_SIZE(i2c_rate); i++)
199 if (i2c_rate[i] & OMAP_I2C_CMDLINE_SETUP) {
200 i2c_rate[i] &= ~OMAP_I2C_CMDLINE_SETUP;
201 err = omap_i2c_add_bus(i + 1);
202 if (err)
203 goto out;
204 }
205
206out:
207 return err;
208}
209subsys_initcall(omap_register_i2c_bus_cmdline);
210
211/**
212 * omap_register_i2c_bus - register I2C bus with device descriptors
213 * @bus_id: bus id counting from number 1
214 * @clkrate: clock rate of the bus in kHz
215 * @info: pointer into I2C device descriptor table or NULL
216 * @len: number of descriptors in the table
217 *
218 * Returns 0 on success or an error code.
219 */
220int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
221 struct i2c_board_info const *info,
222 unsigned len)
223{
224 int err;
225
226 BUG_ON(bus_id < 1 || bus_id > omap_i2c_nr_ports());
227
228 if (info) {
229 err = i2c_register_board_info(bus_id, info, len);
230 if (err)
231 return err;
232 }
233
234 if (!i2c_rate[bus_id - 1])
235 i2c_rate[bus_id - 1] = clkrate;
236 i2c_rate[bus_id - 1] &= ~OMAP_I2C_CMDLINE_SETUP;
237
238 return omap_i2c_add_bus(bus_id);
239}
diff --git a/arch/arm/plat-omap/include/mach/board-2430sdp.h b/arch/arm/plat-omap/include/mach/board-2430sdp.h
deleted file mode 100644
index 10d449ea7ed0..000000000000
--- a/arch/arm/plat-omap/include/mach/board-2430sdp.h
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-2430sdp.h
3 *
4 * Hardware definitions for TI OMAP2430 SDP board.
5 *
6 * Based on board-h4.h by Dirk Behme <dirk.behme@de.bosch.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#ifndef __ASM_ARCH_OMAP_2430SDP_H
30#define __ASM_ARCH_OMAP_2430SDP_H
31
32/* Placeholder for 2430SDP specific defines */
33#define OMAP24XX_ETHR_START 0x08000300
34#define OMAP24XX_ETHR_GPIO_IRQ 149
35#define SDP2430_CS0_BASE 0x04000000
36
37/* Function prototypes */
38extern void sdp2430_flash_init(void);
39extern void sdp2430_usb_init(void);
40
41#endif /* __ASM_ARCH_OMAP_2430SDP_H */
diff --git a/arch/arm/plat-omap/include/mach/board-apollon.h b/arch/arm/plat-omap/include/mach/board-apollon.h
deleted file mode 100644
index 61bd5e8f09b1..000000000000
--- a/arch/arm/plat-omap/include/mach/board-apollon.h
+++ /dev/null
@@ -1,46 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-apollon.h
3 *
4 * Hardware definitions for Samsung OMAP24XX Apollon board.
5 *
6 * Initial creation by Kyungmin Park <kyungmin.park@samsung.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#ifndef __ASM_ARCH_OMAP_APOLLON_H
30#define __ASM_ARCH_OMAP_APOLLON_H
31
32#include <mach/cpu.h>
33
34extern void apollon_mmc_init(void);
35
36static inline int apollon_plus(void)
37{
38 /* The apollon plus has IDCODE revision 5 */
39 return omap_rev() & 0xc0;
40}
41
42/* Placeholder for APOLLON specific defines */
43#define APOLLON_ETHR_GPIO_IRQ 74
44
45#endif /* __ASM_ARCH_OMAP_APOLLON_H */
46
diff --git a/arch/arm/plat-omap/include/mach/board-fsample.h b/arch/arm/plat-omap/include/mach/board-fsample.h
deleted file mode 100644
index cb3c5ae12776..000000000000
--- a/arch/arm/plat-omap/include/mach/board-fsample.h
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-fsample.h
3 *
4 * Board-specific goodies for TI F-Sample.
5 *
6 * Copyright (C) 2006 Google, Inc.
7 * Author: Brian Swetland <swetland@google.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#ifndef __ASM_ARCH_OMAP_FSAMPLE_H
15#define __ASM_ARCH_OMAP_FSAMPLE_H
16
17/* fsample is pretty close to p2-sample */
18#include <mach/board-perseus2.h>
19
20#define fsample_cpld_read(reg) __raw_readb(reg)
21#define fsample_cpld_write(val, reg) __raw_writeb(val, reg)
22
23#define FSAMPLE_CPLD_BASE 0xE8100000
24#define FSAMPLE_CPLD_SIZE SZ_4K
25#define FSAMPLE_CPLD_START 0x05080000
26
27#define FSAMPLE_CPLD_REG_A (FSAMPLE_CPLD_BASE + 0x00)
28#define FSAMPLE_CPLD_SWITCH (FSAMPLE_CPLD_BASE + 0x02)
29#define FSAMPLE_CPLD_UART (FSAMPLE_CPLD_BASE + 0x02)
30#define FSAMPLE_CPLD_REG_B (FSAMPLE_CPLD_BASE + 0x04)
31#define FSAMPLE_CPLD_VERSION (FSAMPLE_CPLD_BASE + 0x06)
32#define FSAMPLE_CPLD_SET_CLR (FSAMPLE_CPLD_BASE + 0x06)
33
34#define FSAMPLE_CPLD_BIT_BT_RESET 0
35#define FSAMPLE_CPLD_BIT_LCD_RESET 1
36#define FSAMPLE_CPLD_BIT_CAM_PWDN 2
37#define FSAMPLE_CPLD_BIT_CHARGER_ENABLE 3
38#define FSAMPLE_CPLD_BIT_SD_MMC_EN 4
39#define FSAMPLE_CPLD_BIT_aGPS_PWREN 5
40#define FSAMPLE_CPLD_BIT_BACKLIGHT 6
41#define FSAMPLE_CPLD_BIT_aGPS_EN_RESET 7
42#define FSAMPLE_CPLD_BIT_aGPS_SLEEPx_N 8
43#define FSAMPLE_CPLD_BIT_OTG_RESET 9
44
45#define fsample_cpld_set(bit) \
46 fsample_cpld_write((((bit) & 15) << 4) | 0x0f, FSAMPLE_CPLD_SET_CLR)
47
48#define fsample_cpld_clear(bit) \
49 fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR)
50
51#endif
diff --git a/arch/arm/plat-omap/include/mach/board-h2.h b/arch/arm/plat-omap/include/mach/board-h2.h
deleted file mode 100644
index 15531c8dc0e6..000000000000
--- a/arch/arm/plat-omap/include/mach/board-h2.h
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-h2.h
3 *
4 * Hardware definitions for TI OMAP1610 H2 board.
5 *
6 * Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#ifndef __ASM_ARCH_OMAP_H2_H
30#define __ASM_ARCH_OMAP_H2_H
31
32/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
33#define OMAP1610_ETHR_START 0x04000300
34
35#define H2_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */)
36# define H2_TPS_GPIO_MMC_PWR_EN (H2_TPS_GPIO_BASE + 3)
37
38extern void h2_mmc_init(void);
39
40#endif /* __ASM_ARCH_OMAP_H2_H */
41
diff --git a/arch/arm/plat-omap/include/mach/board-h3.h b/arch/arm/plat-omap/include/mach/board-h3.h
deleted file mode 100644
index 1888326da7ea..000000000000
--- a/arch/arm/plat-omap/include/mach/board-h3.h
+++ /dev/null
@@ -1,38 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-h3.h
3 *
4 * Copyright (C) 2001 RidgeRun, Inc.
5 * Copyright (C) 2004 Texas Instruments, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
15 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
17 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
18 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
19 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
20 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
21 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 *
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27#ifndef __ASM_ARCH_OMAP_H3_H
28#define __ASM_ARCH_OMAP_H3_H
29
30/* In OMAP1710 H3 the Ethernet is directly connected to CS1 */
31#define OMAP1710_ETHR_START 0x04000300
32
33#define H3_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */)
34# define H3_TPS_GPIO_MMC_PWR_EN (H3_TPS_GPIO_BASE + 4)
35
36extern void h3_mmc_init(void);
37
38#endif /* __ASM_ARCH_OMAP_H3_H */
diff --git a/arch/arm/plat-omap/include/mach/board-h4.h b/arch/arm/plat-omap/include/mach/board-h4.h
deleted file mode 100644
index 7c3fa0f0a65e..000000000000
--- a/arch/arm/plat-omap/include/mach/board-h4.h
+++ /dev/null
@@ -1,38 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-h4.h
3 *
4 * Hardware definitions for TI OMAP2420 H4 board.
5 *
6 * Initial creation by Dirk Behme <dirk.behme@de.bosch.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#ifndef __ASM_ARCH_OMAP_H4_H
30#define __ASM_ARCH_OMAP_H4_H
31
32/* MMC Prototypes */
33extern void h4_mmc_init(void);
34
35/* Placeholder for H4 specific defines */
36#define OMAP24XX_ETHR_GPIO_IRQ 92
37#endif /* __ASM_ARCH_OMAP_H4_H */
38
diff --git a/arch/arm/plat-omap/include/mach/board-innovator.h b/arch/arm/plat-omap/include/mach/board-innovator.h
deleted file mode 100644
index 5ae3e79b9f9c..000000000000
--- a/arch/arm/plat-omap/include/mach/board-innovator.h
+++ /dev/null
@@ -1,52 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-innovator.h
3 *
4 * Copyright (C) 2001 RidgeRun, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
12 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
14 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
15 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
16 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
17 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
18 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
19 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
20 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
21 *
22 * You should have received a copy of the GNU General Public License along
23 * with this program; if not, write to the Free Software Foundation, Inc.,
24 * 675 Mass Ave, Cambridge, MA 02139, USA.
25 */
26#ifndef __ASM_ARCH_OMAP_INNOVATOR_H
27#define __ASM_ARCH_OMAP_INNOVATOR_H
28
29#if defined (CONFIG_ARCH_OMAP15XX)
30
31#ifndef OMAP_SDRAM_DEVICE
32#define OMAP_SDRAM_DEVICE D256M_1X16_4B
33#endif
34
35#define OMAP1510P1_IMIF_PRI_VALUE 0x00
36#define OMAP1510P1_EMIFS_PRI_VALUE 0x00
37#define OMAP1510P1_EMIFF_PRI_VALUE 0x00
38
39#ifndef __ASSEMBLY__
40void fpga_write(unsigned char val, int reg);
41unsigned char fpga_read(int reg);
42#endif
43
44#endif /* CONFIG_ARCH_OMAP15XX */
45
46#if defined (CONFIG_ARCH_OMAP16XX)
47
48/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
49#define INNOVATOR1610_ETHR_START 0x04000300
50
51#endif /* CONFIG_ARCH_OMAP1610 */
52#endif /* __ASM_ARCH_OMAP_INNOVATOR_H */
diff --git a/arch/arm/plat-omap/include/mach/board-ldp.h b/arch/arm/plat-omap/include/mach/board-ldp.h
deleted file mode 100644
index f23399665212..000000000000
--- a/arch/arm/plat-omap/include/mach/board-ldp.h
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-ldp.h
3 *
4 * Hardware definitions for TI OMAP3 LDP.
5 *
6 * Copyright (C) 2008 Texas Instruments Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#ifndef __ASM_ARCH_OMAP_LDP_H
30#define __ASM_ARCH_OMAP_LDP_H
31
32extern void twl4030_bci_battery_init(void);
33
34#define TWL4030_IRQNUM INT_34XX_SYS_NIRQ
35#define LDP_SMC911X_CS 1
36#define LDP_SMC911X_GPIO 152
37#define DEBUG_BASE 0x08000000
38#define OMAP34XX_ETHR_START DEBUG_BASE
39#endif /* __ASM_ARCH_OMAP_LDP_H */
diff --git a/arch/arm/plat-omap/include/mach/board-nokia.h b/arch/arm/plat-omap/include/mach/board-nokia.h
deleted file mode 100644
index 2abbe001af8c..000000000000
--- a/arch/arm/plat-omap/include/mach/board-nokia.h
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-nokia.h
3 *
4 * Information structures for Nokia-specific board config data
5 *
6 * Copyright (C) 2005 Nokia Corporation
7 */
8
9#ifndef _OMAP_BOARD_NOKIA_H
10#define _OMAP_BOARD_NOKIA_H
11
12#include <linux/types.h>
13
14#define OMAP_TAG_NOKIA_BT 0x4e01
15#define OMAP_TAG_WLAN_CX3110X 0x4e02
16#define OMAP_TAG_CBUS 0x4e03
17#define OMAP_TAG_EM_ASIC_BB5 0x4e04
18
19
20#define BT_CHIP_CSR 1
21#define BT_CHIP_TI 2
22
23#define BT_SYSCLK_12 1
24#define BT_SYSCLK_38_4 2
25
26struct omap_bluetooth_config {
27 u8 chip_type;
28 u8 bt_wakeup_gpio;
29 u8 host_wakeup_gpio;
30 u8 reset_gpio;
31 u8 bt_uart;
32 u8 bd_addr[6];
33 u8 bt_sysclk;
34};
35
36struct omap_wlan_cx3110x_config {
37 u8 chip_type;
38 s16 power_gpio;
39 s16 irq_gpio;
40 s16 spi_cs_gpio;
41};
42
43struct omap_cbus_config {
44 s16 clk_gpio;
45 s16 dat_gpio;
46 s16 sel_gpio;
47};
48
49struct omap_em_asic_bb5_config {
50 s16 retu_irq_gpio;
51 s16 tahvo_irq_gpio;
52};
53
54#endif
diff --git a/arch/arm/plat-omap/include/mach/board-omap3beagle.h b/arch/arm/plat-omap/include/mach/board-omap3beagle.h
deleted file mode 100644
index 3080d52d877a..000000000000
--- a/arch/arm/plat-omap/include/mach/board-omap3beagle.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-omap3beagle.h
3 *
4 * Hardware definitions for TI OMAP3 BEAGLE.
5 *
6 * Initial creation by Syed Mohammed Khasim <khasim@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#ifndef __ASM_ARCH_OMAP3_BEAGLE_H
30#define __ASM_ARCH_OMAP3_BEAGLE_H
31
32#endif /* __ASM_ARCH_OMAP3_BEAGLE_H */
33
diff --git a/arch/arm/plat-omap/include/mach/board-osk.h b/arch/arm/plat-omap/include/mach/board-osk.h
deleted file mode 100644
index 3850cb1f220a..000000000000
--- a/arch/arm/plat-omap/include/mach/board-osk.h
+++ /dev/null
@@ -1,47 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-osk.h
3 *
4 * Hardware definitions for TI OMAP5912 OSK board.
5 *
6 * Written by Dirk Behme <dirk.behme@de.bosch.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
27 */
28
29#ifndef __ASM_ARCH_OMAP_OSK_H
30#define __ASM_ARCH_OMAP_OSK_H
31
32/* At OMAP5912 OSK the Ethernet is directly connected to CS1 */
33#define OMAP_OSK_ETHR_START 0x04800300
34
35/* TPS65010 has four GPIOs. nPG and LED2 can be treated like GPIOs with
36 * alternate pin configurations for hardware-controlled blinking.
37 */
38#define OSK_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */)
39# define OSK_TPS_GPIO_USB_PWR_EN (OSK_TPS_GPIO_BASE + 0)
40# define OSK_TPS_GPIO_LED_D3 (OSK_TPS_GPIO_BASE + 1)
41# define OSK_TPS_GPIO_LAN_RESET (OSK_TPS_GPIO_BASE + 2)
42# define OSK_TPS_GPIO_DSP_PWR_EN (OSK_TPS_GPIO_BASE + 3)
43# define OSK_TPS_GPIO_LED_D9 (OSK_TPS_GPIO_BASE + 4)
44# define OSK_TPS_GPIO_LED_D2 (OSK_TPS_GPIO_BASE + 5)
45
46#endif /* __ASM_ARCH_OMAP_OSK_H */
47
diff --git a/arch/arm/plat-omap/include/mach/board-overo.h b/arch/arm/plat-omap/include/mach/board-overo.h
deleted file mode 100644
index 7ecae66966d1..000000000000
--- a/arch/arm/plat-omap/include/mach/board-overo.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * board-overo.h (Gumstix Overo)
3 *
4 * Initial code: Steve Sakoman <steve@sakoman.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * You should have received a copy of the GNU General Public License along
12 * with this program; if not, write to the Free Software Foundation, Inc.,
13 * 675 Mass Ave, Cambridge, MA 02139, USA.
14 */
15
16#ifndef __ASM_ARCH_OVERO_H
17#define __ASM_ARCH_OVERO_H
18
19#define OVERO_GPIO_BT_XGATE 15
20#define OVERO_GPIO_W2W_NRESET 16
21#define OVERO_GPIO_BT_NRESET 164
22#define OVERO_GPIO_USBH_CPEN 168
23#define OVERO_GPIO_USBH_NRESET 183
24
25#endif /* ____ASM_ARCH_OVERO_H */
26
diff --git a/arch/arm/plat-omap/include/mach/board-palmte.h b/arch/arm/plat-omap/include/mach/board-palmte.h
deleted file mode 100644
index 6906cdebbcfb..000000000000
--- a/arch/arm/plat-omap/include/mach/board-palmte.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-palmte.h
3 *
4 * Hardware definitions for the Palm Tungsten E device.
5 *
6 * Maintainters : http://palmtelinux.sf.net
7 * palmtelinux-developpers@lists.sf.net
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#ifndef __OMAP_BOARD_PALMTE_H
15#define __OMAP_BOARD_PALMTE_H
16
17#define PALMTE_USBDETECT_GPIO 0
18#define PALMTE_USB_OR_DC_GPIO 1
19#define PALMTE_TSC_GPIO 4
20#define PALMTE_PINTDAV_GPIO 6
21#define PALMTE_MMC_WP_GPIO 8
22#define PALMTE_MMC_POWER_GPIO 9
23#define PALMTE_HDQ_GPIO 11
24#define PALMTE_HEADPHONES_GPIO 14
25#define PALMTE_SPEAKER_GPIO 15
26#define PALMTE_DC_GPIO OMAP_MPUIO(2)
27#define PALMTE_MMC_SWITCH_GPIO OMAP_MPUIO(4)
28#define PALMTE_MMC1_GPIO OMAP_MPUIO(6)
29#define PALMTE_MMC2_GPIO OMAP_MPUIO(7)
30#define PALMTE_MMC3_GPIO OMAP_MPUIO(11)
31
32#endif /* __OMAP_BOARD_PALMTE_H */
diff --git a/arch/arm/plat-omap/include/mach/board-palmtt.h b/arch/arm/plat-omap/include/mach/board-palmtt.h
deleted file mode 100644
index e79f382b5931..000000000000
--- a/arch/arm/plat-omap/include/mach/board-palmtt.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-palmte.h
3 *
4 * Hardware definitions for the Palm Tungsten|T device.
5 *
6 * Maintainters : Marek Vasut <marek.vasut@gmail.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __OMAP_BOARD_PALMTT_H
14#define __OMAP_BOARD_PALMTT_H
15
16#define PALMTT_USBDETECT_GPIO 0
17#define PALMTT_CABLE_GPIO 1
18#define PALMTT_LED_GPIO 3
19#define PALMTT_PENIRQ_GPIO 6
20#define PALMTT_MMC_WP_GPIO 8
21#define PALMTT_HDQ_GPIO 11
22
23#endif /* __OMAP_BOARD_PALMTT_H */
diff --git a/arch/arm/plat-omap/include/mach/board-palmz71.h b/arch/arm/plat-omap/include/mach/board-palmz71.h
deleted file mode 100644
index b1d7d579b313..000000000000
--- a/arch/arm/plat-omap/include/mach/board-palmz71.h
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-palmz71.h
3 *
4 * Hardware definitions for the Palm Zire71 device.
5 *
6 * Maintainters : Marek Vasut <marek.vasut@gmail.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __OMAP_BOARD_PALMZ71_H
14#define __OMAP_BOARD_PALMZ71_H
15
16#define PALMZ71_USBDETECT_GPIO 0
17#define PALMZ71_PENIRQ_GPIO 6
18#define PALMZ71_MMC_WP_GPIO 8
19#define PALMZ71_HDQ_GPIO 11
20
21#define PALMZ71_HOTSYNC_GPIO OMAP_MPUIO(1)
22#define PALMZ71_CABLE_GPIO OMAP_MPUIO(2)
23#define PALMZ71_SLIDER_GPIO OMAP_MPUIO(3)
24#define PALMZ71_MMC_IN_GPIO OMAP_MPUIO(4)
25
26#endif /* __OMAP_BOARD_PALMZ71_H */
diff --git a/arch/arm/plat-omap/include/mach/board-perseus2.h b/arch/arm/plat-omap/include/mach/board-perseus2.h
deleted file mode 100644
index c06c3d717d57..000000000000
--- a/arch/arm/plat-omap/include/mach/board-perseus2.h
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * arch/arm/plat-omap/include/mach/board-perseus2.h
3 *
4 * Copyright 2003 by Texas Instruments Incorporated
5 * OMAP730 / Perseus2 support by Jean Pihet
6 *
7 * Copyright (C) 2001 RidgeRun, Inc. (http://www.ridgerun.com)
8 * Author: RidgeRun, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
18 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
21 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
22 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 *
26 * You should have received a copy of the GNU General Public License along
27 * with this program; if not, write to the Free Software Foundation, Inc.,
28 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 */
30#ifndef __ASM_ARCH_OMAP_PERSEUS2_H
31#define __ASM_ARCH_OMAP_PERSEUS2_H
32
33#include <mach/fpga.h>
34
35#ifndef OMAP_SDRAM_DEVICE
36#define OMAP_SDRAM_DEVICE D256M_1X16_4B
37#endif
38
39#endif
diff --git a/arch/arm/plat-omap/include/mach/board-voiceblue.h b/arch/arm/plat-omap/include/mach/board-voiceblue.h
index ed6d346ee123..27916b210f57 100644
--- a/arch/arm/plat-omap/include/mach/board-voiceblue.h
+++ b/arch/arm/plat-omap/include/mach/board-voiceblue.h
@@ -14,7 +14,6 @@
14extern void voiceblue_wdt_enable(void); 14extern void voiceblue_wdt_enable(void);
15extern void voiceblue_wdt_disable(void); 15extern void voiceblue_wdt_disable(void);
16extern void voiceblue_wdt_ping(void); 16extern void voiceblue_wdt_ping(void);
17extern void voiceblue_reset(void);
18 17
19#endif /* __ASM_ARCH_VOICEBLUE_H */ 18#endif /* __ASM_ARCH_VOICEBLUE_H */
20 19
diff --git a/arch/arm/plat-omap/include/mach/board.h b/arch/arm/plat-omap/include/mach/board.h
index 9466772fc7c8..50ea79a0efa2 100644
--- a/arch/arm/plat-omap/include/mach/board.h
+++ b/arch/arm/plat-omap/include/mach/board.h
@@ -17,7 +17,6 @@
17/* Different peripheral ids */ 17/* Different peripheral ids */
18#define OMAP_TAG_CLOCK 0x4f01 18#define OMAP_TAG_CLOCK 0x4f01
19#define OMAP_TAG_SERIAL_CONSOLE 0x4f03 19#define OMAP_TAG_SERIAL_CONSOLE 0x4f03
20#define OMAP_TAG_USB 0x4f04
21#define OMAP_TAG_LCD 0x4f05 20#define OMAP_TAG_LCD 0x4f05
22#define OMAP_TAG_GPIO_SWITCH 0x4f06 21#define OMAP_TAG_GPIO_SWITCH 0x4f06
23#define OMAP_TAG_UART 0x4f07 22#define OMAP_TAG_UART 0x4f07
@@ -133,9 +132,6 @@ struct omap_version_config {
133 char version[12]; 132 char version[12];
134}; 133};
135 134
136
137#include <mach/board-nokia.h>
138
139struct omap_board_config_entry { 135struct omap_board_config_entry {
140 u16 tag; 136 u16 tag;
141 u16 len; 137 u16 len;
diff --git a/arch/arm/plat-omap/include/mach/cpu.h b/arch/arm/plat-omap/include/mach/cpu.h
index 4166a970daa4..98b144252364 100644
--- a/arch/arm/plat-omap/include/mach/cpu.h
+++ b/arch/arm/plat-omap/include/mach/cpu.h
@@ -56,6 +56,14 @@ unsigned int omap_rev(void);
56# define OMAP_NAME omap730 56# define OMAP_NAME omap730
57# endif 57# endif
58#endif 58#endif
59#ifdef CONFIG_ARCH_OMAP850
60# ifdef OMAP_NAME
61# undef MULTI_OMAP1
62# define MULTI_OMAP1
63# else
64# define OMAP_NAME omap850
65# endif
66#endif
59#ifdef CONFIG_ARCH_OMAP15XX 67#ifdef CONFIG_ARCH_OMAP15XX
60# ifdef OMAP_NAME 68# ifdef OMAP_NAME
61# undef MULTI_OMAP1 69# undef MULTI_OMAP1
@@ -105,7 +113,7 @@ unsigned int omap_rev(void);
105/* 113/*
106 * Macros to group OMAP into cpu classes. 114 * Macros to group OMAP into cpu classes.
107 * These can be used in most places. 115 * These can be used in most places.
108 * cpu_is_omap7xx(): True for OMAP730 116 * cpu_is_omap7xx(): True for OMAP730, OMAP850
109 * cpu_is_omap15xx(): True for OMAP1510, OMAP5910 and OMAP310 117 * cpu_is_omap15xx(): True for OMAP1510, OMAP5910 and OMAP310
110 * cpu_is_omap16xx(): True for OMAP1610, OMAP5912 and OMAP1710 118 * cpu_is_omap16xx(): True for OMAP1610, OMAP5912 and OMAP1710
111 * cpu_is_omap24xx(): True for OMAP2420, OMAP2422, OMAP2423, OMAP2430 119 * cpu_is_omap24xx(): True for OMAP2420, OMAP2422, OMAP2423, OMAP2430
@@ -153,6 +161,10 @@ IS_OMAP_SUBCLASS(343x, 0x343)
153# undef cpu_is_omap7xx 161# undef cpu_is_omap7xx
154# define cpu_is_omap7xx() is_omap7xx() 162# define cpu_is_omap7xx() is_omap7xx()
155# endif 163# endif
164# if defined(CONFIG_ARCH_OMAP850)
165# undef cpu_is_omap7xx
166# define cpu_is_omap7xx() is_omap7xx()
167# endif
156# if defined(CONFIG_ARCH_OMAP15XX) 168# if defined(CONFIG_ARCH_OMAP15XX)
157# undef cpu_is_omap15xx 169# undef cpu_is_omap15xx
158# define cpu_is_omap15xx() is_omap15xx() 170# define cpu_is_omap15xx() is_omap15xx()
@@ -166,6 +178,10 @@ IS_OMAP_SUBCLASS(343x, 0x343)
166# undef cpu_is_omap7xx 178# undef cpu_is_omap7xx
167# define cpu_is_omap7xx() 1 179# define cpu_is_omap7xx() 1
168# endif 180# endif
181# if defined(CONFIG_ARCH_OMAP850)
182# undef cpu_is_omap7xx
183# define cpu_is_omap7xx() 1
184# endif
169# if defined(CONFIG_ARCH_OMAP15XX) 185# if defined(CONFIG_ARCH_OMAP15XX)
170# undef cpu_is_omap15xx 186# undef cpu_is_omap15xx
171# define cpu_is_omap15xx() 1 187# define cpu_is_omap15xx() 1
@@ -219,6 +235,7 @@ IS_OMAP_SUBCLASS(343x, 0x343)
219 * These are only rarely needed. 235 * These are only rarely needed.
220 * cpu_is_omap330(): True for OMAP330 236 * cpu_is_omap330(): True for OMAP330
221 * cpu_is_omap730(): True for OMAP730 237 * cpu_is_omap730(): True for OMAP730
238 * cpu_is_omap850(): True for OMAP850
222 * cpu_is_omap1510(): True for OMAP1510 239 * cpu_is_omap1510(): True for OMAP1510
223 * cpu_is_omap1610(): True for OMAP1610 240 * cpu_is_omap1610(): True for OMAP1610
224 * cpu_is_omap1611(): True for OMAP1611 241 * cpu_is_omap1611(): True for OMAP1611
@@ -241,6 +258,7 @@ static inline int is_omap ##type (void) \
241 258
242IS_OMAP_TYPE(310, 0x0310) 259IS_OMAP_TYPE(310, 0x0310)
243IS_OMAP_TYPE(730, 0x0730) 260IS_OMAP_TYPE(730, 0x0730)
261IS_OMAP_TYPE(850, 0x0850)
244IS_OMAP_TYPE(1510, 0x1510) 262IS_OMAP_TYPE(1510, 0x1510)
245IS_OMAP_TYPE(1610, 0x1610) 263IS_OMAP_TYPE(1610, 0x1610)
246IS_OMAP_TYPE(1611, 0x1611) 264IS_OMAP_TYPE(1611, 0x1611)
@@ -255,6 +273,7 @@ IS_OMAP_TYPE(3430, 0x3430)
255 273
256#define cpu_is_omap310() 0 274#define cpu_is_omap310() 0
257#define cpu_is_omap730() 0 275#define cpu_is_omap730() 0
276#define cpu_is_omap850() 0
258#define cpu_is_omap1510() 0 277#define cpu_is_omap1510() 0
259#define cpu_is_omap1610() 0 278#define cpu_is_omap1610() 0
260#define cpu_is_omap5912() 0 279#define cpu_is_omap5912() 0
@@ -272,12 +291,22 @@ IS_OMAP_TYPE(3430, 0x3430)
272# undef cpu_is_omap730 291# undef cpu_is_omap730
273# define cpu_is_omap730() is_omap730() 292# define cpu_is_omap730() is_omap730()
274# endif 293# endif
294# if defined(CONFIG_ARCH_OMAP850)
295# undef cpu_is_omap850
296# define cpu_is_omap850() is_omap850()
297# endif
275#else 298#else
276# if defined(CONFIG_ARCH_OMAP730) 299# if defined(CONFIG_ARCH_OMAP730)
277# undef cpu_is_omap730 300# undef cpu_is_omap730
278# define cpu_is_omap730() 1 301# define cpu_is_omap730() 1
279# endif 302# endif
280#endif 303#endif
304#else
305# if defined(CONFIG_ARCH_OMAP850)
306# undef cpu_is_omap850
307# define cpu_is_omap850() 1
308# endif
309#endif
281 310
282/* 311/*
283 * Whether we have MULTI_OMAP1 or not, we still need to distinguish 312 * Whether we have MULTI_OMAP1 or not, we still need to distinguish
@@ -320,7 +349,7 @@ IS_OMAP_TYPE(3430, 0x3430)
320#endif 349#endif
321 350
322/* Macros to detect if we have OMAP1 or OMAP2 */ 351/* Macros to detect if we have OMAP1 or OMAP2 */
323#define cpu_class_is_omap1() (cpu_is_omap730() || cpu_is_omap15xx() || \ 352#define cpu_class_is_omap1() (cpu_is_omap7xx() || cpu_is_omap15xx() || \
324 cpu_is_omap16xx()) 353 cpu_is_omap16xx())
325#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx()) 354#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx())
326 355
@@ -392,5 +421,3 @@ int omap_type(void);
392void omap2_check_revision(void); 421void omap2_check_revision(void);
393 422
394#endif /* defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) */ 423#endif /* defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) */
395
396#endif
diff --git a/arch/arm/plat-omap/include/mach/gpio.h b/arch/arm/plat-omap/include/mach/gpio.h
index 8d9dfe314387..2b22a8799bc6 100644
--- a/arch/arm/plat-omap/include/mach/gpio.h
+++ b/arch/arm/plat-omap/include/mach/gpio.h
@@ -31,7 +31,8 @@
31 31
32#define OMAP_MPUIO_BASE 0xfffb5000 32#define OMAP_MPUIO_BASE 0xfffb5000
33 33
34#ifdef CONFIG_ARCH_OMAP730 34#if (defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850))
35
35#define OMAP_MPUIO_INPUT_LATCH 0x00 36#define OMAP_MPUIO_INPUT_LATCH 0x00
36#define OMAP_MPUIO_OUTPUT 0x02 37#define OMAP_MPUIO_OUTPUT 0x02
37#define OMAP_MPUIO_IO_CNTL 0x04 38#define OMAP_MPUIO_IO_CNTL 0x04
diff --git a/arch/arm/plat-omap/include/mach/hardware.h b/arch/arm/plat-omap/include/mach/hardware.h
index 6589ddbb63b2..3dc423ed3e80 100644
--- a/arch/arm/plat-omap/include/mach/hardware.h
+++ b/arch/arm/plat-omap/include/mach/hardware.h
@@ -286,78 +286,4 @@
286#include "omap24xx.h" 286#include "omap24xx.h"
287#include "omap34xx.h" 287#include "omap34xx.h"
288 288
289#ifndef __ASSEMBLER__
290
291/*
292 * ---------------------------------------------------------------------------
293 * Board specific defines
294 * ---------------------------------------------------------------------------
295 */
296
297#ifdef CONFIG_MACH_OMAP_INNOVATOR
298#include "board-innovator.h"
299#endif
300
301#ifdef CONFIG_MACH_OMAP_H2
302#include "board-h2.h"
303#endif
304
305#ifdef CONFIG_MACH_OMAP_PERSEUS2
306#include "board-perseus2.h"
307#endif
308
309#ifdef CONFIG_MACH_OMAP_FSAMPLE
310#include "board-fsample.h"
311#endif
312
313#ifdef CONFIG_MACH_OMAP_H3
314#include "board-h3.h"
315#endif
316
317#ifdef CONFIG_MACH_OMAP_H4
318#include "board-h4.h"
319#endif
320
321#ifdef CONFIG_MACH_OMAP_2430SDP
322#include "board-2430sdp.h"
323#endif
324
325#ifdef CONFIG_MACH_OMAP3_BEAGLE
326#include "board-omap3beagle.h"
327#endif
328
329#ifdef CONFIG_MACH_OMAP_LDP
330#include "board-ldp.h"
331#endif
332
333#ifdef CONFIG_MACH_OMAP_APOLLON
334#include "board-apollon.h"
335#endif
336
337#ifdef CONFIG_MACH_OMAP_OSK
338#include "board-osk.h"
339#endif
340
341#ifdef CONFIG_MACH_VOICEBLUE
342#include "board-voiceblue.h"
343#endif
344
345#ifdef CONFIG_MACH_OMAP_PALMTE
346#include "board-palmte.h"
347#endif
348
349#ifdef CONFIG_MACH_OMAP_PALMZ71
350#include "board-palmz71.h"
351#endif
352
353#ifdef CONFIG_MACH_OMAP_PALMTT
354#include "board-palmtt.h"
355#endif
356
357#ifdef CONFIG_MACH_SX1
358#include "board-sx1.h"
359#endif
360
361#endif /* !__ASSEMBLER__ */
362
363#endif /* __ASM_ARCH_OMAP_HARDWARE_H */ 289#endif /* __ASM_ARCH_OMAP_HARDWARE_H */
diff --git a/arch/arm/plat-omap/include/mach/irqs.h b/arch/arm/plat-omap/include/mach/irqs.h
index bed5274c910a..7f57ee66f364 100644
--- a/arch/arm/plat-omap/include/mach/irqs.h
+++ b/arch/arm/plat-omap/include/mach/irqs.h
@@ -105,6 +105,29 @@
105#define INT_730_SPGIO_WR 29 105#define INT_730_SPGIO_WR 29
106 106
107/* 107/*
108 * OMAP-850 specific IRQ numbers for interrupt handler 1
109 */
110#define INT_850_IH2_FIQ 0
111#define INT_850_IH2_IRQ 1
112#define INT_850_USB_NON_ISO 2
113#define INT_850_USB_ISO 3
114#define INT_850_ICR 4
115#define INT_850_EAC 5
116#define INT_850_GPIO_BANK1 6
117#define INT_850_GPIO_BANK2 7
118#define INT_850_GPIO_BANK3 8
119#define INT_850_McBSP2TX 10
120#define INT_850_McBSP2RX 11
121#define INT_850_McBSP2RX_OVF 12
122#define INT_850_LCD_LINE 14
123#define INT_850_GSM_PROTECT 15
124#define INT_850_TIMER3 16
125#define INT_850_GPIO_BANK5 17
126#define INT_850_GPIO_BANK6 18
127#define INT_850_SPGIO_WR 29
128
129
130/*
108 * IRQ numbers for interrupt handler 2 131 * IRQ numbers for interrupt handler 2
109 * 132 *
110 * NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below 133 * NOTE: See also the OMAP-1510 and 1610 specific IRQ numbers below
@@ -237,6 +260,64 @@
237#define INT_730_DMA_CH15 (62 + IH2_BASE) 260#define INT_730_DMA_CH15 (62 + IH2_BASE)
238#define INT_730_NAND (63 + IH2_BASE) 261#define INT_730_NAND (63 + IH2_BASE)
239 262
263/*
264 * OMAP-850 specific IRQ numbers for interrupt handler 2
265 */
266#define INT_850_HW_ERRORS (0 + IH2_BASE)
267#define INT_850_NFIQ_PWR_FAIL (1 + IH2_BASE)
268#define INT_850_CFCD (2 + IH2_BASE)
269#define INT_850_CFIREQ (3 + IH2_BASE)
270#define INT_850_I2C (4 + IH2_BASE)
271#define INT_850_PCC (5 + IH2_BASE)
272#define INT_850_MPU_EXT_NIRQ (6 + IH2_BASE)
273#define INT_850_SPI_100K_1 (7 + IH2_BASE)
274#define INT_850_SYREN_SPI (8 + IH2_BASE)
275#define INT_850_VLYNQ (9 + IH2_BASE)
276#define INT_850_GPIO_BANK4 (10 + IH2_BASE)
277#define INT_850_McBSP1TX (11 + IH2_BASE)
278#define INT_850_McBSP1RX (12 + IH2_BASE)
279#define INT_850_McBSP1RX_OF (13 + IH2_BASE)
280#define INT_850_UART_MODEM_IRDA_2 (14 + IH2_BASE)
281#define INT_850_UART_MODEM_1 (15 + IH2_BASE)
282#define INT_850_MCSI (16 + IH2_BASE)
283#define INT_850_uWireTX (17 + IH2_BASE)
284#define INT_850_uWireRX (18 + IH2_BASE)
285#define INT_850_SMC_CD (19 + IH2_BASE)
286#define INT_850_SMC_IREQ (20 + IH2_BASE)
287#define INT_850_HDQ_1WIRE (21 + IH2_BASE)
288#define INT_850_TIMER32K (22 + IH2_BASE)
289#define INT_850_MMC_SDIO (23 + IH2_BASE)
290#define INT_850_UPLD (24 + IH2_BASE)
291#define INT_850_USB_HHC_1 (27 + IH2_BASE)
292#define INT_850_USB_HHC_2 (28 + IH2_BASE)
293#define INT_850_USB_GENI (29 + IH2_BASE)
294#define INT_850_USB_OTG (30 + IH2_BASE)
295#define INT_850_CAMERA_IF (31 + IH2_BASE)
296#define INT_850_RNG (32 + IH2_BASE)
297#define INT_850_DUAL_MODE_TIMER (33 + IH2_BASE)
298#define INT_850_DBB_RF_EN (34 + IH2_BASE)
299#define INT_850_MPUIO_KEYPAD (35 + IH2_BASE)
300#define INT_850_SHA1_MD5 (36 + IH2_BASE)
301#define INT_850_SPI_100K_2 (37 + IH2_BASE)
302#define INT_850_RNG_IDLE (38 + IH2_BASE)
303#define INT_850_MPUIO (39 + IH2_BASE)
304#define INT_850_LLPC_LCD_CTRL_CAN_BE_OFF (40 + IH2_BASE)
305#define INT_850_LLPC_OE_FALLING (41 + IH2_BASE)
306#define INT_850_LLPC_OE_RISING (42 + IH2_BASE)
307#define INT_850_LLPC_VSYNC (43 + IH2_BASE)
308#define INT_850_WAKE_UP_REQ (46 + IH2_BASE)
309#define INT_850_DMA_CH6 (53 + IH2_BASE)
310#define INT_850_DMA_CH7 (54 + IH2_BASE)
311#define INT_850_DMA_CH8 (55 + IH2_BASE)
312#define INT_850_DMA_CH9 (56 + IH2_BASE)
313#define INT_850_DMA_CH10 (57 + IH2_BASE)
314#define INT_850_DMA_CH11 (58 + IH2_BASE)
315#define INT_850_DMA_CH12 (59 + IH2_BASE)
316#define INT_850_DMA_CH13 (60 + IH2_BASE)
317#define INT_850_DMA_CH14 (61 + IH2_BASE)
318#define INT_850_DMA_CH15 (62 + IH2_BASE)
319#define INT_850_NAND (63 + IH2_BASE)
320
240#define INT_24XX_SYS_NIRQ 7 321#define INT_24XX_SYS_NIRQ 7
241#define INT_24XX_SDMA_IRQ0 12 322#define INT_24XX_SDMA_IRQ0 12
242#define INT_24XX_SDMA_IRQ1 13 323#define INT_24XX_SDMA_IRQ1 13
@@ -341,7 +422,7 @@
341 422
342#define INT_34XX_BENCH_MPU_EMUL 3 423#define INT_34XX_BENCH_MPU_EMUL 3
343 424
344/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and 425/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730/850) and
345 * 16 MPUIO lines */ 426 * 16 MPUIO lines */
346#define OMAP_MAX_GPIO_LINES 192 427#define OMAP_MAX_GPIO_LINES 192
347#define IH_GPIO_BASE (128 + IH2_BASE) 428#define IH_GPIO_BASE (128 + IH2_BASE)
diff --git a/arch/arm/plat-omap/include/mach/mailbox.h b/arch/arm/plat-omap/include/mach/mailbox.h
index 7cbed9332e16..b7a6991814ec 100644
--- a/arch/arm/plat-omap/include/mach/mailbox.h
+++ b/arch/arm/plat-omap/include/mach/mailbox.h
@@ -33,6 +33,9 @@ struct omap_mbox_ops {
33 void (*disable_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq); 33 void (*disable_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq);
34 void (*ack_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq); 34 void (*ack_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq);
35 int (*is_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq); 35 int (*is_irq)(struct omap_mbox *mbox, omap_mbox_irq_t irq);
36 /* ctx */
37 void (*save_ctx)(struct omap_mbox *mbox);
38 void (*restore_ctx)(struct omap_mbox *mbox);
36}; 39};
37 40
38struct omap_mbox_queue { 41struct omap_mbox_queue {
@@ -53,7 +56,7 @@ struct omap_mbox {
53 56
54 mbox_msg_t seq_snd, seq_rcv; 57 mbox_msg_t seq_snd, seq_rcv;
55 58
56 struct device dev; 59 struct device *dev;
57 60
58 struct omap_mbox *next; 61 struct omap_mbox *next;
59 void *priv; 62 void *priv;
@@ -67,7 +70,27 @@ void omap_mbox_init_seq(struct omap_mbox *);
67struct omap_mbox *omap_mbox_get(const char *); 70struct omap_mbox *omap_mbox_get(const char *);
68void omap_mbox_put(struct omap_mbox *); 71void omap_mbox_put(struct omap_mbox *);
69 72
70int omap_mbox_register(struct omap_mbox *); 73int omap_mbox_register(struct device *parent, struct omap_mbox *);
71int omap_mbox_unregister(struct omap_mbox *); 74int omap_mbox_unregister(struct omap_mbox *);
72 75
76static inline void omap_mbox_save_ctx(struct omap_mbox *mbox)
77{
78 if (!mbox->ops->save_ctx) {
79 dev_err(mbox->dev, "%s:\tno save\n", __func__);
80 return;
81 }
82
83 mbox->ops->save_ctx(mbox);
84}
85
86static inline void omap_mbox_restore_ctx(struct omap_mbox *mbox)
87{
88 if (!mbox->ops->restore_ctx) {
89 dev_err(mbox->dev, "%s:\tno restore\n", __func__);
90 return;
91 }
92
93 mbox->ops->restore_ctx(mbox);
94}
95
73#endif /* MAILBOX_H */ 96#endif /* MAILBOX_H */
diff --git a/arch/arm/plat-omap/include/mach/mmc.h b/arch/arm/plat-omap/include/mach/mmc.h
index 73a9e15031b1..4435bd434e17 100644
--- a/arch/arm/plat-omap/include/mach/mmc.h
+++ b/arch/arm/plat-omap/include/mach/mmc.h
@@ -37,6 +37,8 @@
37#define OMAP_MMC_MAX_SLOTS 2 37#define OMAP_MMC_MAX_SLOTS 2
38 38
39struct omap_mmc_platform_data { 39struct omap_mmc_platform_data {
40 /* back-link to device */
41 struct device *dev;
40 42
41 /* number of slots per controller */ 43 /* number of slots per controller */
42 unsigned nr_slots:2; 44 unsigned nr_slots:2;
diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h
index f4362b8682c7..85a621705766 100644
--- a/arch/arm/plat-omap/include/mach/mux.h
+++ b/arch/arm/plat-omap/include/mach/mux.h
@@ -61,6 +61,16 @@
61 .pull_bit = bit, \ 61 .pull_bit = bit, \
62 .pull_val = status, 62 .pull_val = status,
63 63
64#define MUX_REG_850(reg, mode_offset, mode) .mux_reg_name = "OMAP850_IO_CONF_"#reg, \
65 .mux_reg = OMAP850_IO_CONF_##reg, \
66 .mask_offset = mode_offset, \
67 .mask = mode,
68
69#define PULL_REG_850(reg, bit, status) .pull_name = "OMAP850_IO_CONF_"#reg, \
70 .pull_reg = OMAP850_IO_CONF_##reg, \
71 .pull_bit = bit, \
72 .pull_val = status,
73
64#else 74#else
65 75
66#define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \ 76#define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \
@@ -83,6 +93,15 @@
83 .pull_bit = bit, \ 93 .pull_bit = bit, \
84 .pull_val = status, 94 .pull_val = status,
85 95
96#define MUX_REG_850(reg, mode_offset, mode) \
97 .mux_reg = OMAP850_IO_CONF_##reg, \
98 .mask_offset = mode_offset, \
99 .mask = mode,
100
101#define PULL_REG_850(reg, bit, status) .pull_reg = OMAP850_IO_CONF_##reg, \
102 .pull_bit = bit, \
103 .pull_val = status,
104
86#endif /* CONFIG_OMAP_MUX_DEBUG */ 105#endif /* CONFIG_OMAP_MUX_DEBUG */
87 106
88#define MUX_CFG(desc, mux_reg, mode_offset, mode, \ 107#define MUX_CFG(desc, mux_reg, mode_offset, mode, \
@@ -98,7 +117,7 @@
98 117
99 118
100/* 119/*
101 * OMAP730 has a slightly different config for the pin mux. 120 * OMAP730/850 has a slightly different config for the pin mux.
102 * - config regs are the OMAP730_IO_CONF_x regs (see omap730.h) regs and 121 * - config regs are the OMAP730_IO_CONF_x regs (see omap730.h) regs and
103 * not the FUNC_MUX_CTRL_x regs from hardware.h 122 * not the FUNC_MUX_CTRL_x regs from hardware.h
104 * - for pull-up/down, only has one enable bit which is is in the same register 123 * - for pull-up/down, only has one enable bit which is is in the same register
@@ -114,6 +133,17 @@
114 PU_PD_REG(NA, 0) \ 133 PU_PD_REG(NA, 0) \
115}, 134},
116 135
136#define MUX_CFG_850(desc, mux_reg, mode_offset, mode, \
137 pull_bit, pull_status, debug_status)\
138{ \
139 .name = desc, \
140 .debug = debug_status, \
141 MUX_REG_850(mux_reg, mode_offset, mode) \
142 PULL_REG_850(mux_reg, pull_bit, pull_status) \
143 PU_PD_REG(NA, 0) \
144},
145
146
117#define MUX_CFG_24XX(desc, reg_offset, mode, \ 147#define MUX_CFG_24XX(desc, reg_offset, mode, \
118 pull_en, pull_mode, dbg) \ 148 pull_en, pull_mode, dbg) \
119{ \ 149{ \
@@ -221,6 +251,26 @@ enum omap730_index {
221 W17_730_USB_VBUSI, 251 W17_730_USB_VBUSI,
222}; 252};
223 253
254enum omap850_index {
255 /* OMAP 850 keyboard */
256 E2_850_KBR0,
257 J7_850_KBR1,
258 E1_850_KBR2,
259 F3_850_KBR3,
260 D2_850_KBR4,
261 C2_850_KBC0,
262 D3_850_KBC1,
263 E4_850_KBC2,
264 F4_850_KBC3,
265 E3_850_KBC4,
266
267 /* USB */
268 AA17_850_USB_DM,
269 W16_850_USB_PU_EN,
270 W17_850_USB_VBUSI,
271};
272
273
224enum omap1xxx_index { 274enum omap1xxx_index {
225 /* UART1 (BT_UART_GATING)*/ 275 /* UART1 (BT_UART_GATING)*/
226 UART1_TX = 0, 276 UART1_TX = 0,
@@ -788,7 +838,20 @@ enum omap34xx_index {
788 * - "_DOWN" suffix (GPIO3_DOWN) with internal pulldown 838 * - "_DOWN" suffix (GPIO3_DOWN) with internal pulldown
789 * - "_OUT" suffix (GPIO3_OUT) for output-only pins (unlike 24xx) 839 * - "_OUT" suffix (GPIO3_OUT) for output-only pins (unlike 24xx)
790 */ 840 */
841 AF26_34XX_GPIO0,
842 AF22_34XX_GPIO9,
791 AH8_34XX_GPIO29, 843 AH8_34XX_GPIO29,
844 U8_34XX_GPIO54_OUT,
845 U8_34XX_GPIO54_DOWN,
846 L8_34XX_GPIO63,
847 G25_34XX_GPIO86_OUT,
848 AG4_34XX_GPIO134_OUT,
849 AE4_34XX_GPIO136_OUT,
850 AF6_34XX_GPIO140_UP,
851 AE6_34XX_GPIO141,
852 AF5_34XX_GPIO142,
853 AE5_34XX_GPIO143,
854 H19_34XX_GPIO164_OUT,
792 J25_34XX_GPIO170, 855 J25_34XX_GPIO170,
793}; 856};
794 857
diff --git a/arch/arm/plat-omap/include/mach/omap34xx.h b/arch/arm/plat-omap/include/mach/omap34xx.h
index 8e0479fff05a..1b1c35d21697 100644
--- a/arch/arm/plat-omap/include/mach/omap34xx.h
+++ b/arch/arm/plat-omap/include/mach/omap34xx.h
@@ -49,6 +49,33 @@
49#define OMAP343X_CTRL_BASE OMAP343X_SCM_BASE 49#define OMAP343X_CTRL_BASE OMAP343X_SCM_BASE
50 50
51#define OMAP34XX_IC_BASE 0x48200000 51#define OMAP34XX_IC_BASE 0x48200000
52
53#define OMAP3430_ISP_BASE (L4_34XX_BASE + 0xBC000)
54#define OMAP3430_ISP_CBUFF_BASE (OMAP3430_ISP_BASE + 0x0100)
55#define OMAP3430_ISP_CCP2_BASE (OMAP3430_ISP_BASE + 0x0400)
56#define OMAP3430_ISP_CCDC_BASE (OMAP3430_ISP_BASE + 0x0600)
57#define OMAP3430_ISP_HIST_BASE (OMAP3430_ISP_BASE + 0x0A00)
58#define OMAP3430_ISP_H3A_BASE (OMAP3430_ISP_BASE + 0x0C00)
59#define OMAP3430_ISP_PREV_BASE (OMAP3430_ISP_BASE + 0x0E00)
60#define OMAP3430_ISP_RESZ_BASE (OMAP3430_ISP_BASE + 0x1000)
61#define OMAP3430_ISP_SBL_BASE (OMAP3430_ISP_BASE + 0x1200)
62#define OMAP3430_ISP_MMU_BASE (OMAP3430_ISP_BASE + 0x1400)
63#define OMAP3430_ISP_CSI2A_BASE (OMAP3430_ISP_BASE + 0x1800)
64#define OMAP3430_ISP_CSI2PHY_BASE (OMAP3430_ISP_BASE + 0x1970)
65
66#define OMAP3430_ISP_END (OMAP3430_ISP_BASE + 0x06F)
67#define OMAP3430_ISP_CBUFF_END (OMAP3430_ISP_CBUFF_BASE + 0x077)
68#define OMAP3430_ISP_CCP2_END (OMAP3430_ISP_CCP2_BASE + 0x1EF)
69#define OMAP3430_ISP_CCDC_END (OMAP3430_ISP_CCDC_BASE + 0x0A7)
70#define OMAP3430_ISP_HIST_END (OMAP3430_ISP_HIST_BASE + 0x047)
71#define OMAP3430_ISP_H3A_END (OMAP3430_ISP_H3A_BASE + 0x05F)
72#define OMAP3430_ISP_PREV_END (OMAP3430_ISP_PREV_BASE + 0x09F)
73#define OMAP3430_ISP_RESZ_END (OMAP3430_ISP_RESZ_BASE + 0x0AB)
74#define OMAP3430_ISP_SBL_END (OMAP3430_ISP_SBL_BASE + 0x0FB)
75#define OMAP3430_ISP_MMU_END (OMAP3430_ISP_MMU_BASE + 0x06F)
76#define OMAP3430_ISP_CSI2A_END (OMAP3430_ISP_CSI2A_BASE + 0x16F)
77#define OMAP3430_ISP_CSI2PHY_END (OMAP3430_ISP_CSI2PHY_BASE + 0x007)
78
52#define OMAP34XX_IVA_INTC_BASE 0x40000000 79#define OMAP34XX_IVA_INTC_BASE 0x40000000
53#define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000) 80#define OMAP34XX_HSUSB_OTG_BASE (L4_34XX_BASE + 0xAB000)
54#define OMAP34XX_HSUSB_HOST_BASE (L4_34XX_BASE + 0x64000) 81#define OMAP34XX_HSUSB_HOST_BASE (L4_34XX_BASE + 0x64000)
@@ -61,6 +88,7 @@
61#define OMAP2_CM_BASE OMAP3430_CM_BASE 88#define OMAP2_CM_BASE OMAP3430_CM_BASE
62#define OMAP2_PRM_BASE OMAP3430_PRM_BASE 89#define OMAP2_PRM_BASE OMAP3430_PRM_BASE
63#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP34XX_IC_BASE) 90#define OMAP2_VA_IC_BASE IO_ADDRESS(OMAP34XX_IC_BASE)
91#define OMAP34XX_MAILBOX_BASE (L4_34XX_BASE + 0x94000)
64 92
65#endif 93#endif
66 94
diff --git a/arch/arm/plat-omap/include/mach/omap850.h b/arch/arm/plat-omap/include/mach/omap850.h
new file mode 100644
index 000000000000..c33f67981712
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/omap850.h
@@ -0,0 +1,102 @@
1/* arch/arm/plat-omap/include/mach/omap850.h
2 *
3 * Hardware definitions for TI OMAP850 processor.
4 *
5 * Derived from omap730.h by Zebediah C. McClure <zmc@lurian.net>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
13 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
15 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
16 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
17 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
18 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
19 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
20 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
21 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
22 *
23 * You should have received a copy of the GNU General Public License along
24 * with this program; if not, write to the Free Software Foundation, Inc.,
25 * 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27
28#ifndef __ASM_ARCH_OMAP850_H
29#define __ASM_ARCH_OMAP850_H
30
31/*
32 * ----------------------------------------------------------------------------
33 * Base addresses
34 * ----------------------------------------------------------------------------
35 */
36
37/* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */
38
39#define OMAP850_DSP_BASE 0xE0000000
40#define OMAP850_DSP_SIZE 0x50000
41#define OMAP850_DSP_START 0xE0000000
42
43#define OMAP850_DSPREG_BASE 0xE1000000
44#define OMAP850_DSPREG_SIZE SZ_128K
45#define OMAP850_DSPREG_START 0xE1000000
46
47/*
48 * ----------------------------------------------------------------------------
49 * OMAP850 specific configuration registers
50 * ----------------------------------------------------------------------------
51 */
52#define OMAP850_CONFIG_BASE 0xfffe1000
53#define OMAP850_IO_CONF_0 0xfffe1070
54#define OMAP850_IO_CONF_1 0xfffe1074
55#define OMAP850_IO_CONF_2 0xfffe1078
56#define OMAP850_IO_CONF_3 0xfffe107c
57#define OMAP850_IO_CONF_4 0xfffe1080
58#define OMAP850_IO_CONF_5 0xfffe1084
59#define OMAP850_IO_CONF_6 0xfffe1088
60#define OMAP850_IO_CONF_7 0xfffe108c
61#define OMAP850_IO_CONF_8 0xfffe1090
62#define OMAP850_IO_CONF_9 0xfffe1094
63#define OMAP850_IO_CONF_10 0xfffe1098
64#define OMAP850_IO_CONF_11 0xfffe109c
65#define OMAP850_IO_CONF_12 0xfffe10a0
66#define OMAP850_IO_CONF_13 0xfffe10a4
67
68#define OMAP850_MODE_1 0xfffe1010
69#define OMAP850_MODE_2 0xfffe1014
70
71/* CSMI specials: in terms of base + offset */
72#define OMAP850_MODE2_OFFSET 0x14
73
74/*
75 * ----------------------------------------------------------------------------
76 * OMAP850 traffic controller configuration registers
77 * ----------------------------------------------------------------------------
78 */
79#define OMAP850_FLASH_CFG_0 0xfffecc10
80#define OMAP850_FLASH_ACFG_0 0xfffecc50
81#define OMAP850_FLASH_CFG_1 0xfffecc14
82#define OMAP850_FLASH_ACFG_1 0xfffecc54
83
84/*
85 * ----------------------------------------------------------------------------
86 * OMAP850 DSP control registers
87 * ----------------------------------------------------------------------------
88 */
89#define OMAP850_ICR_BASE 0xfffbb800
90#define OMAP850_DSP_M_CTL 0xfffbb804
91#define OMAP850_DSP_MMU_BASE 0xfffed200
92
93/*
94 * ----------------------------------------------------------------------------
95 * OMAP850 PCC_UPLD configuration registers
96 * ----------------------------------------------------------------------------
97 */
98#define OMAP850_PCC_UPLD_CTRL_BASE (0xfffe0900)
99#define OMAP850_PCC_UPLD_CTRL (OMAP850_PCC_UPLD_CTRL_BASE + 0x00)
100
101#endif /* __ASM_ARCH_OMAP850_H */
102
diff --git a/arch/arm/plat-omap/include/mach/system.h b/arch/arm/plat-omap/include/mach/system.h
index cb8c0ef30fba..1060e345423b 100644
--- a/arch/arm/plat-omap/include/mach/system.h
+++ b/arch/arm/plat-omap/include/mach/system.h
@@ -13,6 +13,8 @@
13 13
14#ifndef CONFIG_MACH_VOICEBLUE 14#ifndef CONFIG_MACH_VOICEBLUE
15#define voiceblue_reset() do {} while (0) 15#define voiceblue_reset() do {} while (0)
16#else
17extern void voiceblue_reset(void);
16#endif 18#endif
17 19
18static inline void arch_idle(void) 20static inline void arch_idle(void)
diff --git a/arch/arm/plat-omap/include/mach/usb.h b/arch/arm/plat-omap/include/mach/usb.h
index a56a610950c2..69f0ceed500b 100644
--- a/arch/arm/plat-omap/include/mach/usb.h
+++ b/arch/arm/plat-omap/include/mach/usb.h
@@ -27,8 +27,18 @@
27#define UDC_BASE OMAP2_UDC_BASE 27#define UDC_BASE OMAP2_UDC_BASE
28#define OMAP_OHCI_BASE OMAP2_OHCI_BASE 28#define OMAP_OHCI_BASE OMAP2_OHCI_BASE
29 29
30#ifdef CONFIG_USB_MUSB_SOC
31extern void usb_musb_init(void);
32#else
33static inline void usb_musb_init(void)
34{
35}
36#endif
37
30#endif 38#endif
31 39
40void omap_usb_init(struct omap_usb_config *pdata);
41
32/*-------------------------------------------------------------------------*/ 42/*-------------------------------------------------------------------------*/
33 43
34/* 44/*
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c
index b52ce053e6f2..0abfbaa59871 100644
--- a/arch/arm/plat-omap/mailbox.c
+++ b/arch/arm/plat-omap/mailbox.c
@@ -1,10 +1,9 @@
1/* 1/*
2 * OMAP mailbox driver 2 * OMAP mailbox driver
3 * 3 *
4 * Copyright (C) 2006 Nokia Corporation. All rights reserved. 4 * Copyright (C) 2006-2009 Nokia Corporation. All rights reserved.
5 * 5 *
6 * Contact: Toshihiro Kobayashi <toshihiro.kobayashi@nokia.com> 6 * Contact: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
7 * Restructured by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
8 * 7 *
9 * This program is free software; you can redistribute it and/or 8 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License 9 * modify it under the terms of the GNU General Public License
@@ -22,21 +21,98 @@
22 * 21 *
23 */ 22 */
24 23
25#include <linux/init.h>
26#include <linux/module.h> 24#include <linux/module.h>
27#include <linux/sched.h>
28#include <linux/interrupt.h> 25#include <linux/interrupt.h>
29#include <linux/device.h> 26#include <linux/device.h>
30#include <linux/blkdev.h>
31#include <linux/err.h>
32#include <linux/delay.h> 27#include <linux/delay.h>
33#include <linux/io.h> 28
34#include <mach/mailbox.h> 29#include <mach/mailbox.h>
35#include "mailbox.h" 30
31static int enable_seq_bit;
32module_param(enable_seq_bit, bool, 0);
33MODULE_PARM_DESC(enable_seq_bit, "Enable sequence bit checking.");
36 34
37static struct omap_mbox *mboxes; 35static struct omap_mbox *mboxes;
38static DEFINE_RWLOCK(mboxes_lock); 36static DEFINE_RWLOCK(mboxes_lock);
39 37
38/*
39 * Mailbox sequence bit API
40 */
41
42/* seq_rcv should be initialized with any value other than
43 * 0 and 1 << 31, to allow either value for the first
44 * message. */
45static inline void mbox_seq_init(struct omap_mbox *mbox)
46{
47 if (!enable_seq_bit)
48 return;
49
50 /* any value other than 0 and 1 << 31 */
51 mbox->seq_rcv = 0xffffffff;
52}
53
54static inline void mbox_seq_toggle(struct omap_mbox *mbox, mbox_msg_t * msg)
55{
56 if (!enable_seq_bit)
57 return;
58
59 /* add seq_snd to msg */
60 *msg = (*msg & 0x7fffffff) | mbox->seq_snd;
61 /* flip seq_snd */
62 mbox->seq_snd ^= 1 << 31;
63}
64
65static inline int mbox_seq_test(struct omap_mbox *mbox, mbox_msg_t msg)
66{
67 mbox_msg_t seq;
68
69 if (!enable_seq_bit)
70 return 0;
71
72 seq = msg & (1 << 31);
73 if (seq == mbox->seq_rcv)
74 return -1;
75 mbox->seq_rcv = seq;
76 return 0;
77}
78
79/* Mailbox FIFO handle functions */
80static inline mbox_msg_t mbox_fifo_read(struct omap_mbox *mbox)
81{
82 return mbox->ops->fifo_read(mbox);
83}
84static inline void mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg)
85{
86 mbox->ops->fifo_write(mbox, msg);
87}
88static inline int mbox_fifo_empty(struct omap_mbox *mbox)
89{
90 return mbox->ops->fifo_empty(mbox);
91}
92static inline int mbox_fifo_full(struct omap_mbox *mbox)
93{
94 return mbox->ops->fifo_full(mbox);
95}
96
97/* Mailbox IRQ handle functions */
98static inline void enable_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
99{
100 mbox->ops->enable_irq(mbox, irq);
101}
102static inline void disable_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
103{
104 mbox->ops->disable_irq(mbox, irq);
105}
106static inline void ack_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
107{
108 if (mbox->ops->ack_irq)
109 mbox->ops->ack_irq(mbox, irq);
110}
111static inline int is_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
112{
113 return mbox->ops->is_irq(mbox, irq);
114}
115
40/* Mailbox Sequence Bit function */ 116/* Mailbox Sequence Bit function */
41void omap_mbox_init_seq(struct omap_mbox *mbox) 117void omap_mbox_init_seq(struct omap_mbox *mbox)
42{ 118{
@@ -136,7 +212,7 @@ static void mbox_rx_work(struct work_struct *work)
136 unsigned long flags; 212 unsigned long flags;
137 213
138 if (mbox->rxq->callback == NULL) { 214 if (mbox->rxq->callback == NULL) {
139 sysfs_notify(&mbox->dev.kobj, NULL, "mbox"); 215 sysfs_notify(&mbox->dev->kobj, NULL, "mbox");
140 return; 216 return;
141 } 217 }
142 218
@@ -204,7 +280,7 @@ static void __mbox_rx_interrupt(struct omap_mbox *mbox)
204 /* no more messages in the fifo. clear IRQ source. */ 280 /* no more messages in the fifo. clear IRQ source. */
205 ack_mbox_irq(mbox, IRQ_RX); 281 ack_mbox_irq(mbox, IRQ_RX);
206 enable_mbox_irq(mbox, IRQ_RX); 282 enable_mbox_irq(mbox, IRQ_RX);
207 nomem: 283nomem:
208 schedule_work(&mbox->rxq->work); 284 schedule_work(&mbox->rxq->work);
209} 285}
210 286
@@ -286,7 +362,7 @@ static ssize_t mbox_show(struct class *class, char *buf)
286static CLASS_ATTR(mbox, S_IRUGO, mbox_show, NULL); 362static CLASS_ATTR(mbox, S_IRUGO, mbox_show, NULL);
287 363
288static struct class omap_mbox_class = { 364static struct class omap_mbox_class = {
289 .name = "omap_mbox", 365 .name = "omap-mailbox",
290}; 366};
291 367
292static struct omap_mbox_queue *mbox_queue_alloc(struct omap_mbox *mbox, 368static struct omap_mbox_queue *mbox_queue_alloc(struct omap_mbox *mbox,
@@ -333,21 +409,6 @@ static int omap_mbox_init(struct omap_mbox *mbox)
333 return ret; 409 return ret;
334 } 410 }
335 411
336 mbox->dev.class = &omap_mbox_class;
337 dev_set_name(&mbox->dev, "%s", mbox->name);
338 dev_set_drvdata(&mbox->dev, mbox);
339
340 ret = device_register(&mbox->dev);
341 if (unlikely(ret))
342 goto fail_device_reg;
343
344 ret = device_create_file(&mbox->dev, &dev_attr_mbox);
345 if (unlikely(ret)) {
346 printk(KERN_ERR
347 "device_create_file failed: %d\n", ret);
348 goto fail_create_mbox;
349 }
350
351 ret = request_irq(mbox->irq, mbox_interrupt, IRQF_DISABLED, 412 ret = request_irq(mbox->irq, mbox_interrupt, IRQF_DISABLED,
352 mbox->name, mbox); 413 mbox->name, mbox);
353 if (unlikely(ret)) { 414 if (unlikely(ret)) {
@@ -377,10 +438,6 @@ static int omap_mbox_init(struct omap_mbox *mbox)
377 fail_alloc_txq: 438 fail_alloc_txq:
378 free_irq(mbox->irq, mbox); 439 free_irq(mbox->irq, mbox);
379 fail_request_irq: 440 fail_request_irq:
380 device_remove_file(&mbox->dev, &dev_attr_mbox);
381 fail_create_mbox:
382 device_unregister(&mbox->dev);
383 fail_device_reg:
384 if (unlikely(mbox->ops->shutdown)) 441 if (unlikely(mbox->ops->shutdown))
385 mbox->ops->shutdown(mbox); 442 mbox->ops->shutdown(mbox);
386 443
@@ -393,8 +450,6 @@ static void omap_mbox_fini(struct omap_mbox *mbox)
393 mbox_queue_free(mbox->rxq); 450 mbox_queue_free(mbox->rxq);
394 451
395 free_irq(mbox->irq, mbox); 452 free_irq(mbox->irq, mbox);
396 device_remove_file(&mbox->dev, &dev_attr_mbox);
397 class_unregister(&omap_mbox_class);
398 453
399 if (unlikely(mbox->ops->shutdown)) 454 if (unlikely(mbox->ops->shutdown))
400 mbox->ops->shutdown(mbox); 455 mbox->ops->shutdown(mbox);
@@ -440,7 +495,7 @@ void omap_mbox_put(struct omap_mbox *mbox)
440} 495}
441EXPORT_SYMBOL(omap_mbox_put); 496EXPORT_SYMBOL(omap_mbox_put);
442 497
443int omap_mbox_register(struct omap_mbox *mbox) 498int omap_mbox_register(struct device *parent, struct omap_mbox *mbox)
444{ 499{
445 int ret = 0; 500 int ret = 0;
446 struct omap_mbox **tmp; 501 struct omap_mbox **tmp;
@@ -450,14 +505,31 @@ int omap_mbox_register(struct omap_mbox *mbox)
450 if (mbox->next) 505 if (mbox->next)
451 return -EBUSY; 506 return -EBUSY;
452 507
508 mbox->dev = device_create(&omap_mbox_class,
509 parent, 0, mbox, "%s", mbox->name);
510 if (IS_ERR(mbox->dev))
511 return PTR_ERR(mbox->dev);
512
513 ret = device_create_file(mbox->dev, &dev_attr_mbox);
514 if (ret)
515 goto err_sysfs;
516
453 write_lock(&mboxes_lock); 517 write_lock(&mboxes_lock);
454 tmp = find_mboxes(mbox->name); 518 tmp = find_mboxes(mbox->name);
455 if (*tmp) 519 if (*tmp) {
456 ret = -EBUSY; 520 ret = -EBUSY;
457 else 521 write_unlock(&mboxes_lock);
458 *tmp = mbox; 522 goto err_find;
523 }
524 *tmp = mbox;
459 write_unlock(&mboxes_lock); 525 write_unlock(&mboxes_lock);
460 526
527 return 0;
528
529err_find:
530 device_remove_file(mbox->dev, &dev_attr_mbox);
531err_sysfs:
532 device_unregister(mbox->dev);
461 return ret; 533 return ret;
462} 534}
463EXPORT_SYMBOL(omap_mbox_register); 535EXPORT_SYMBOL(omap_mbox_register);
@@ -473,6 +545,8 @@ int omap_mbox_unregister(struct omap_mbox *mbox)
473 *tmp = mbox->next; 545 *tmp = mbox->next;
474 mbox->next = NULL; 546 mbox->next = NULL;
475 write_unlock(&mboxes_lock); 547 write_unlock(&mboxes_lock);
548 device_remove_file(mbox->dev, &dev_attr_mbox);
549 device_unregister(mbox->dev);
476 return 0; 550 return 0;
477 } 551 }
478 tmp = &(*tmp)->next; 552 tmp = &(*tmp)->next;
@@ -501,4 +575,6 @@ static void __exit omap_mbox_class_exit(void)
501subsys_initcall(omap_mbox_class_init); 575subsys_initcall(omap_mbox_class_init);
502module_exit(omap_mbox_class_exit); 576module_exit(omap_mbox_class_exit);
503 577
504MODULE_LICENSE("GPL"); 578MODULE_LICENSE("GPL v2");
579MODULE_DESCRIPTION("omap mailbox: interrupt driven messaging");
580MODULE_AUTHOR("Toshihiro Kobayashi and Hiroshi DOYU");
diff --git a/arch/arm/plat-omap/mailbox.h b/arch/arm/plat-omap/mailbox.h
deleted file mode 100644
index 67c6740b8ad5..000000000000
--- a/arch/arm/plat-omap/mailbox.h
+++ /dev/null
@@ -1,100 +0,0 @@
1/*
2 * Mailbox internal functions
3 *
4 * Copyright (C) 2006 Nokia Corporation
5 * Written by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11
12#ifndef __ARCH_ARM_PLAT_MAILBOX_H
13#define __ARCH_ARM_PLAT_MAILBOX_H
14
15/*
16 * Mailbox sequence bit API
17 */
18#if defined(CONFIG_ARCH_OMAP1)
19# define MBOX_USE_SEQ_BIT
20#elif defined(CONFIG_ARCH_OMAP2)
21# define MBOX_USE_SEQ_BIT
22#endif
23
24#ifdef MBOX_USE_SEQ_BIT
25/* seq_rcv should be initialized with any value other than
26 * 0 and 1 << 31, to allow either value for the first
27 * message. */
28static inline void mbox_seq_init(struct omap_mbox *mbox)
29{
30 /* any value other than 0 and 1 << 31 */
31 mbox->seq_rcv = 0xffffffff;
32}
33
34static inline void mbox_seq_toggle(struct omap_mbox *mbox, mbox_msg_t * msg)
35{
36 /* add seq_snd to msg */
37 *msg = (*msg & 0x7fffffff) | mbox->seq_snd;
38 /* flip seq_snd */
39 mbox->seq_snd ^= 1 << 31;
40}
41
42static inline int mbox_seq_test(struct omap_mbox *mbox, mbox_msg_t msg)
43{
44 mbox_msg_t seq = msg & (1 << 31);
45 if (seq == mbox->seq_rcv)
46 return -1;
47 mbox->seq_rcv = seq;
48 return 0;
49}
50#else
51static inline void mbox_seq_init(struct omap_mbox *mbox)
52{
53}
54static inline void mbox_seq_toggle(struct omap_mbox *mbox, mbox_msg_t * msg)
55{
56}
57static inline int mbox_seq_test(struct omap_mbox *mbox, mbox_msg_t msg)
58{
59 return 0;
60}
61#endif
62
63/* Mailbox FIFO handle functions */
64static inline mbox_msg_t mbox_fifo_read(struct omap_mbox *mbox)
65{
66 return mbox->ops->fifo_read(mbox);
67}
68static inline void mbox_fifo_write(struct omap_mbox *mbox, mbox_msg_t msg)
69{
70 mbox->ops->fifo_write(mbox, msg);
71}
72static inline int mbox_fifo_empty(struct omap_mbox *mbox)
73{
74 return mbox->ops->fifo_empty(mbox);
75}
76static inline int mbox_fifo_full(struct omap_mbox *mbox)
77{
78 return mbox->ops->fifo_full(mbox);
79}
80
81/* Mailbox IRQ handle functions */
82static inline void enable_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
83{
84 mbox->ops->enable_irq(mbox, irq);
85}
86static inline void disable_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
87{
88 mbox->ops->disable_irq(mbox, irq);
89}
90static inline void ack_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
91{
92 if (mbox->ops->ack_irq)
93 mbox->ops->ack_irq(mbox, irq);
94}
95static inline int is_mbox_irq(struct omap_mbox *mbox, omap_mbox_irq_t irq)
96{
97 return mbox->ops->is_irq(mbox, irq);
98}
99
100#endif /* __ARCH_ARM_PLAT_MAILBOX_H */
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index be7bcaf2b832..fa5297d643d3 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -148,7 +148,7 @@ void __init omap_detect_sram(void)
148 omap_sram_base = OMAP1_SRAM_VA; 148 omap_sram_base = OMAP1_SRAM_VA;
149 omap_sram_start = OMAP1_SRAM_PA; 149 omap_sram_start = OMAP1_SRAM_PA;
150 150
151 if (cpu_is_omap730()) 151 if (cpu_is_omap7xx())
152 omap_sram_size = 0x32000; /* 200K */ 152 omap_sram_size = 0x32000; /* 200K */
153 else if (cpu_is_omap15xx()) 153 else if (cpu_is_omap15xx())
154 omap_sram_size = 0x30000; /* 192K */ 154 omap_sram_size = 0x30000; /* 192K */
diff --git a/arch/arm/plat-omap/usb.c b/arch/arm/plat-omap/usb.c
index e278de6862ae..509f2ed99e21 100644
--- a/arch/arm/plat-omap/usb.c
+++ b/arch/arm/plat-omap/usb.c
@@ -729,30 +729,13 @@ static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
729 729
730/*-------------------------------------------------------------------------*/ 730/*-------------------------------------------------------------------------*/
731 731
732static struct omap_usb_config platform_data; 732void __init omap_usb_init(struct omap_usb_config *pdata)
733
734static int __init
735omap_usb_init(void)
736{ 733{
737 const struct omap_usb_config *config;
738
739 config = omap_get_config(OMAP_TAG_USB, struct omap_usb_config);
740 if (config == NULL) {
741 printk(KERN_ERR "USB: No board-specific "
742 "platform config found\n");
743 return -ENODEV;
744 }
745 platform_data = *config;
746
747 if (cpu_is_omap730() || cpu_is_omap16xx() || cpu_is_omap24xx()) 734 if (cpu_is_omap730() || cpu_is_omap16xx() || cpu_is_omap24xx())
748 omap_otg_init(&platform_data); 735 omap_otg_init(pdata);
749 else if (cpu_is_omap15xx()) 736 else if (cpu_is_omap15xx())
750 omap_1510_usb_init(&platform_data); 737 omap_1510_usb_init(pdata);
751 else { 738 else
752 printk(KERN_ERR "USB: No init for your chip yet\n"); 739 printk(KERN_ERR "USB: No init for your chip yet\n");
753 return -ENODEV;
754 }
755 return 0;
756} 740}
757 741
758subsys_initcall(omap_usb_init);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-05 22:23:12 -0500