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authorLinus Torvalds <torvalds@linux-foundation.org>2012-07-23 19:22:12 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-07-23 19:22:12 -0400
commitfde75430278130505cac21997cd9f90b7bb2670a (patch)
tree909f659117f5fa8bf1b9b46809f4dc655aee0d34 /arch/arm/plat-omap
parent1a4120bc101bdc25ec7258937b5071bf34b19cc5 (diff)
parentdb3c47a3af96e8109b1bb114c32f0854259d5970 (diff)
Merge tag 'cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm-soc cleanups, part 2, from Arnd Bergmann: "These omap cleanups have dependencies on earlier omap branches that in turn depend on other cleanups, so they could not go into the same branch." * tag 'cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: OMAP: sdrc: Fix the build break for OMAP4 only builds ARM: OMAP2+: dmtimer: cleanup fclk usage ARM: OMAP2+: Fix mismerge for omap_hwmod_get_main_clk() API ARM: OMAP2+: Remove unnecessary ifdef around __omap2_set_globals ARM: OMAP2+: am33xx: Change cpu_is_am33xx to soc_is_am33xx ARM: OMAP2+: am33xx: Make am33xx as a separate class ARM: OMAP2+: Move omap3 dpll ops to dpll3xxx.c ARM: OMAP2+: All OMAP2PLUS uses omap-device.o target so add one entry ARM: OMAP: dmtimer: use devm_ API and do some cleanup in probe() ARM: OMAP2+: hwmod code: add support to set dmadisable in hwmod framework ARM: OMAP2+: PRM/CM: Move the stubbed prm and cm functions to prcm.c file and make them __weak ARM: OMAP2+: hwmod: add omap_hwmod_get_main_clk() API ARM: OMAP3+: dpll: optimize noncore dpll locking logic ARM: OMAP3: control: add definition for CONTROL_CAMERA_PHY_CTRL ARM: OMAP2+: powerdomain code: Fix Wake-up power domain power status ARM: OMAP4: clockdomain/CM code: Update supported transition modes ARM: OMAP3/4: omap_hwmod: Add rstst_offs field to struct omap_hwmod_omap4_prcm ARM: OMAP2+: hwmod: Add new sysc_type3 into omap_hwmod required for am33xx
Diffstat (limited to 'arch/arm/plat-omap')
-rw-r--r--arch/arm/plat-omap/Makefile4
-rw-r--r--arch/arm/plat-omap/dmtimer.c53
-rw-r--r--arch/arm/plat-omap/include/plat/cpu.h17
-rw-r--r--arch/arm/plat-omap/include/plat/omap_hwmod.h19
-rw-r--r--arch/arm/plat-omap/include/plat/sdrc.h2
-rw-r--r--arch/arm/plat-omap/sram.c6
6 files changed, 51 insertions, 50 deletions
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index 6d87532871cd..961bf859bc0c 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -10,9 +10,7 @@ obj-n :=
10obj- := 10obj- :=
11 11
12# omap_device support (OMAP2+ only at the moment) 12# omap_device support (OMAP2+ only at the moment)
13obj-$(CONFIG_ARCH_OMAP2) += omap_device.o 13obj-$(CONFIG_ARCH_OMAP2PLUS) += omap_device.o
14obj-$(CONFIG_ARCH_OMAP3) += omap_device.o
15obj-$(CONFIG_ARCH_OMAP4) += omap_device.o
16 14
17obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o 15obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
18obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o 16obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 54ed4e6e429e..626ad8cad7a9 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -37,7 +37,7 @@
37 37
38#include <linux/module.h> 38#include <linux/module.h>
39#include <linux/io.h> 39#include <linux/io.h>
40#include <linux/slab.h> 40#include <linux/device.h>
41#include <linux/err.h> 41#include <linux/err.h>
42#include <linux/pm_runtime.h> 42#include <linux/pm_runtime.h>
43 43
@@ -689,49 +689,39 @@ EXPORT_SYMBOL_GPL(omap_dm_timers_active);
689 */ 689 */
690static int __devinit omap_dm_timer_probe(struct platform_device *pdev) 690static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
691{ 691{
692 int ret;
693 unsigned long flags; 692 unsigned long flags;
694 struct omap_dm_timer *timer; 693 struct omap_dm_timer *timer;
695 struct resource *mem, *irq, *ioarea; 694 struct resource *mem, *irq;
695 struct device *dev = &pdev->dev;
696 struct dmtimer_platform_data *pdata = pdev->dev.platform_data; 696 struct dmtimer_platform_data *pdata = pdev->dev.platform_data;
697 697
698 if (!pdata) { 698 if (!pdata) {
699 dev_err(&pdev->dev, "%s: no platform data.\n", __func__); 699 dev_err(dev, "%s: no platform data.\n", __func__);
700 return -ENODEV; 700 return -ENODEV;
701 } 701 }
702 702
703 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 703 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
704 if (unlikely(!irq)) { 704 if (unlikely(!irq)) {
705 dev_err(&pdev->dev, "%s: no IRQ resource.\n", __func__); 705 dev_err(dev, "%s: no IRQ resource.\n", __func__);
706 return -ENODEV; 706 return -ENODEV;
707 } 707 }
708 708
709 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 709 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
710 if (unlikely(!mem)) { 710 if (unlikely(!mem)) {
711 dev_err(&pdev->dev, "%s: no memory resource.\n", __func__); 711 dev_err(dev, "%s: no memory resource.\n", __func__);
712 return -ENODEV; 712 return -ENODEV;
713 } 713 }
714 714
715 ioarea = request_mem_region(mem->start, resource_size(mem), 715 timer = devm_kzalloc(dev, sizeof(struct omap_dm_timer), GFP_KERNEL);
716 pdev->name);
717 if (!ioarea) {
718 dev_err(&pdev->dev, "%s: region already claimed.\n", __func__);
719 return -EBUSY;
720 }
721
722 timer = kzalloc(sizeof(struct omap_dm_timer), GFP_KERNEL);
723 if (!timer) { 716 if (!timer) {
724 dev_err(&pdev->dev, "%s: no memory for omap_dm_timer.\n", 717 dev_err(dev, "%s: memory alloc failed!\n", __func__);
725 __func__); 718 return -ENOMEM;
726 ret = -ENOMEM;
727 goto err_free_ioregion;
728 } 719 }
729 720
730 timer->io_base = ioremap(mem->start, resource_size(mem)); 721 timer->io_base = devm_request_and_ioremap(dev, mem);
731 if (!timer->io_base) { 722 if (!timer->io_base) {
732 dev_err(&pdev->dev, "%s: ioremap failed.\n", __func__); 723 dev_err(dev, "%s: region already claimed.\n", __func__);
733 ret = -ENOMEM; 724 return -ENOMEM;
734 goto err_free_mem;
735 } 725 }
736 726
737 timer->id = pdev->id; 727 timer->id = pdev->id;
@@ -742,14 +732,14 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
742 732
743 /* Skip pm_runtime_enable for OMAP1 */ 733 /* Skip pm_runtime_enable for OMAP1 */
744 if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) { 734 if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) {
745 pm_runtime_enable(&pdev->dev); 735 pm_runtime_enable(dev);
746 pm_runtime_irq_safe(&pdev->dev); 736 pm_runtime_irq_safe(dev);
747 } 737 }
748 738
749 if (!timer->reserved) { 739 if (!timer->reserved) {
750 pm_runtime_get_sync(&pdev->dev); 740 pm_runtime_get_sync(dev);
751 __omap_dm_timer_init_regs(timer); 741 __omap_dm_timer_init_regs(timer);
752 pm_runtime_put(&pdev->dev); 742 pm_runtime_put(dev);
753 } 743 }
754 744
755 /* add the timer element to the list */ 745 /* add the timer element to the list */
@@ -757,17 +747,9 @@ static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
757 list_add_tail(&timer->node, &omap_timer_list); 747 list_add_tail(&timer->node, &omap_timer_list);
758 spin_unlock_irqrestore(&dm_timer_lock, flags); 748 spin_unlock_irqrestore(&dm_timer_lock, flags);
759 749
760 dev_dbg(&pdev->dev, "Device Probed.\n"); 750 dev_dbg(dev, "Device Probed.\n");
761 751
762 return 0; 752 return 0;
763
764err_free_mem:
765 kfree(timer);
766
767err_free_ioregion:
768 release_mem_region(mem->start, resource_size(mem));
769
770 return ret;
771} 753}
772 754
773/** 755/**
@@ -788,7 +770,6 @@ static int __devexit omap_dm_timer_remove(struct platform_device *pdev)
788 list_for_each_entry(timer, &omap_timer_list, node) 770 list_for_each_entry(timer, &omap_timer_list, node)
789 if (timer->pdev->id == pdev->id) { 771 if (timer->pdev->id == pdev->id) {
790 list_del(&timer->node); 772 list_del(&timer->node);
791 kfree(timer);
792 ret = 0; 773 ret = 0;
793 break; 774 break;
794 } 775 }
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 430081ac0c47..f91e0b99b30c 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -150,8 +150,8 @@ IS_AM_SUBCLASS(335x, 0x335)
150#define cpu_is_ti816x() 0 150#define cpu_is_ti816x() 0
151#define cpu_is_ti814x() 0 151#define cpu_is_ti814x() 0
152#define soc_is_am35xx() 0 152#define soc_is_am35xx() 0
153#define cpu_is_am33xx() 0 153#define soc_is_am33xx() 0
154#define cpu_is_am335x() 0 154#define soc_is_am335x() 0
155#define cpu_is_omap44xx() 0 155#define cpu_is_omap44xx() 0
156#define cpu_is_omap443x() 0 156#define cpu_is_omap443x() 0
157#define cpu_is_omap446x() 0 157#define cpu_is_omap446x() 0
@@ -328,8 +328,6 @@ IS_OMAP_TYPE(3430, 0x3430)
328# undef cpu_is_ti816x 328# undef cpu_is_ti816x
329# undef cpu_is_ti814x 329# undef cpu_is_ti814x
330# undef soc_is_am35xx 330# undef soc_is_am35xx
331# undef cpu_is_am33xx
332# undef cpu_is_am335x
333# define cpu_is_omap3430() is_omap3430() 331# define cpu_is_omap3430() is_omap3430()
334# undef cpu_is_omap3630 332# undef cpu_is_omap3630
335# define cpu_is_omap3630() is_omap363x() 333# define cpu_is_omap3630() is_omap363x()
@@ -337,8 +335,13 @@ IS_OMAP_TYPE(3430, 0x3430)
337# define cpu_is_ti816x() is_ti816x() 335# define cpu_is_ti816x() is_ti816x()
338# define cpu_is_ti814x() is_ti814x() 336# define cpu_is_ti814x() is_ti814x()
339# define soc_is_am35xx() is_am35xx() 337# define soc_is_am35xx() is_am35xx()
340# define cpu_is_am33xx() is_am33xx() 338#endif
341# define cpu_is_am335x() is_am335x() 339
340# if defined(CONFIG_SOC_AM33XX)
341# undef soc_is_am33xx
342# undef soc_is_am335x
343# define soc_is_am33xx() is_am33xx()
344# define soc_is_am335x() is_am335x()
342#endif 345#endif
343 346
344# if defined(CONFIG_ARCH_OMAP4) 347# if defined(CONFIG_ARCH_OMAP4)
@@ -392,7 +395,7 @@ IS_OMAP_TYPE(3430, 0x3430)
392#define AM35XX_REV_ES1_0 AM35XX_CLASS 395#define AM35XX_REV_ES1_0 AM35XX_CLASS
393#define AM35XX_REV_ES1_1 (AM35XX_CLASS | (0x1 << 8)) 396#define AM35XX_REV_ES1_1 (AM35XX_CLASS | (0x1 << 8))
394 397
395#define AM335X_CLASS 0x33500034 398#define AM335X_CLASS 0x33500033
396#define AM335X_REV_ES1_0 AM335X_CLASS 399#define AM335X_REV_ES1_0 AM335X_CLASS
397 400
398#define OMAP443X_CLASS 0x44300044 401#define OMAP443X_CLASS 0x44300044
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index a8ecc53b3670..6132972aff37 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -41,6 +41,7 @@ struct omap_device;
41 41
42extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type1; 42extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type1;
43extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2; 43extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
44extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type3;
44 45
45/* 46/*
46 * OCP SYSCONFIG bit shifts/masks TYPE1. These are for IPs compliant 47 * OCP SYSCONFIG bit shifts/masks TYPE1. These are for IPs compliant
@@ -69,6 +70,17 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2;
69#define SYSC_TYPE2_SIDLEMODE_MASK (0x3 << SYSC_TYPE2_SIDLEMODE_SHIFT) 70#define SYSC_TYPE2_SIDLEMODE_MASK (0x3 << SYSC_TYPE2_SIDLEMODE_SHIFT)
70#define SYSC_TYPE2_MIDLEMODE_SHIFT 4 71#define SYSC_TYPE2_MIDLEMODE_SHIFT 4
71#define SYSC_TYPE2_MIDLEMODE_MASK (0x3 << SYSC_TYPE2_MIDLEMODE_SHIFT) 72#define SYSC_TYPE2_MIDLEMODE_MASK (0x3 << SYSC_TYPE2_MIDLEMODE_SHIFT)
73#define SYSC_TYPE2_DMADISABLE_SHIFT 16
74#define SYSC_TYPE2_DMADISABLE_MASK (0x1 << SYSC_TYPE2_DMADISABLE_SHIFT)
75
76/*
77 * OCP SYSCONFIG bit shifts/masks TYPE3.
78 * This is applicable for some IPs present in AM33XX
79 */
80#define SYSC_TYPE3_SIDLEMODE_SHIFT 0
81#define SYSC_TYPE3_SIDLEMODE_MASK (0x3 << SYSC_TYPE3_SIDLEMODE_SHIFT)
82#define SYSC_TYPE3_MIDLEMODE_SHIFT 2
83#define SYSC_TYPE3_MIDLEMODE_MASK (0x3 << SYSC_TYPE3_MIDLEMODE_SHIFT)
72 84
73/* OCP SYSSTATUS bit shifts/masks */ 85/* OCP SYSSTATUS bit shifts/masks */
74#define SYSS_RESETDONE_SHIFT 0 86#define SYSS_RESETDONE_SHIFT 0
@@ -283,6 +295,7 @@ struct omap_hwmod_ocp_if {
283#define SYSS_HAS_RESET_STATUS (1 << 7) 295#define SYSS_HAS_RESET_STATUS (1 << 7)
284#define SYSC_NO_CACHE (1 << 8) /* XXX SW flag, belongs elsewhere */ 296#define SYSC_NO_CACHE (1 << 8) /* XXX SW flag, belongs elsewhere */
285#define SYSC_HAS_RESET_STATUS (1 << 9) 297#define SYSC_HAS_RESET_STATUS (1 << 9)
298#define SYSC_HAS_DMADISABLE (1 << 10)
286 299
287/* omap_hwmod_sysconfig.clockact flags */ 300/* omap_hwmod_sysconfig.clockact flags */
288#define CLOCKACT_TEST_BOTH 0x0 301#define CLOCKACT_TEST_BOTH 0x0
@@ -298,6 +311,7 @@ struct omap_hwmod_ocp_if {
298 * @enwkup_shift: Offset of the enawakeup bit 311 * @enwkup_shift: Offset of the enawakeup bit
299 * @srst_shift: Offset of the softreset bit 312 * @srst_shift: Offset of the softreset bit
300 * @autoidle_shift: Offset of the autoidle bit 313 * @autoidle_shift: Offset of the autoidle bit
314 * @dmadisable_shift: Offset of the dmadisable bit
301 */ 315 */
302struct omap_hwmod_sysc_fields { 316struct omap_hwmod_sysc_fields {
303 u8 midle_shift; 317 u8 midle_shift;
@@ -306,6 +320,7 @@ struct omap_hwmod_sysc_fields {
306 u8 enwkup_shift; 320 u8 enwkup_shift;
307 u8 srst_shift; 321 u8 srst_shift;
308 u8 autoidle_shift; 322 u8 autoidle_shift;
323 u8 dmadisable_shift;
309}; 324};
310 325
311/** 326/**
@@ -374,11 +389,13 @@ struct omap_hwmod_omap2_prcm {
374 * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data 389 * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
375 * @clkctrl_reg: PRCM address of the clock control register 390 * @clkctrl_reg: PRCM address of the clock control register
376 * @rstctrl_reg: address of the XXX_RSTCTRL register located in the PRM 391 * @rstctrl_reg: address of the XXX_RSTCTRL register located in the PRM
392 * @rstst_reg: (AM33XX only) address of the XXX_RSTST register in the PRM
377 * @submodule_wkdep_bit: bit shift of the WKDEP range 393 * @submodule_wkdep_bit: bit shift of the WKDEP range
378 */ 394 */
379struct omap_hwmod_omap4_prcm { 395struct omap_hwmod_omap4_prcm {
380 u16 clkctrl_offs; 396 u16 clkctrl_offs;
381 u16 rstctrl_offs; 397 u16 rstctrl_offs;
398 u16 rstst_offs;
382 u16 context_offs; 399 u16 context_offs;
383 u8 submodule_wkdep_bit; 400 u8 submodule_wkdep_bit;
384 u8 modulemode; 401 u8 modulemode;
@@ -631,6 +648,8 @@ int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx);
631 648
632extern void __init omap_hwmod_init(void); 649extern void __init omap_hwmod_init(void);
633 650
651const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh);
652
634/* 653/*
635 * Chip variant-specific hwmod init routines - XXX should be converted 654 * Chip variant-specific hwmod init routines - XXX should be converted
636 * to use initcalls once the initial boot ordering is straightened out 655 * to use initcalls once the initial boot ordering is straightened out
diff --git a/arch/arm/plat-omap/include/plat/sdrc.h b/arch/arm/plat-omap/include/plat/sdrc.h
index 9bb978ecd884..36d6a7666216 100644
--- a/arch/arm/plat-omap/include/plat/sdrc.h
+++ b/arch/arm/plat-omap/include/plat/sdrc.h
@@ -123,7 +123,7 @@ struct omap_sdrc_params {
123 u32 mr; 123 u32 mr;
124}; 124};
125 125
126#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 126#ifdef CONFIG_SOC_HAS_OMAP2_SDRC
127void omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0, 127void omap2_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
128 struct omap_sdrc_params *sdrc_cs1); 128 struct omap_sdrc_params *sdrc_cs1);
129#else 129#else
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 477363c163ec..70cf825bdd87 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -85,7 +85,7 @@ static int is_sram_locked(void)
85 __raw_writel(0xCFDE, OMAP24XX_VA_READPERM0); /* all i-read */ 85 __raw_writel(0xCFDE, OMAP24XX_VA_READPERM0); /* all i-read */
86 __raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */ 86 __raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */
87 } 87 }
88 if (cpu_is_omap34xx() && !cpu_is_am33xx()) { 88 if (cpu_is_omap34xx()) {
89 __raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */ 89 __raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */
90 __raw_writel(0xFFFF, OMAP34XX_VA_READPERM0); /* all i-read */ 90 __raw_writel(0xFFFF, OMAP34XX_VA_READPERM0); /* all i-read */
91 __raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */ 91 __raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */
@@ -123,7 +123,7 @@ static void __init omap_detect_sram(void)
123 omap_sram_size = 0x800; /* 2K */ 123 omap_sram_size = 0x800; /* 2K */
124 } 124 }
125 } else { 125 } else {
126 if (cpu_is_am33xx()) { 126 if (soc_is_am33xx()) {
127 omap_sram_start = AM33XX_SRAM_PA; 127 omap_sram_start = AM33XX_SRAM_PA;
128 omap_sram_size = 0x10000; /* 64K */ 128 omap_sram_size = 0x10000; /* 64K */
129 } else if (cpu_is_omap34xx()) { 129 } else if (cpu_is_omap34xx()) {
@@ -386,7 +386,7 @@ int __init omap_sram_init(void)
386 omap242x_sram_init(); 386 omap242x_sram_init();
387 else if (cpu_is_omap2430()) 387 else if (cpu_is_omap2430())
388 omap243x_sram_init(); 388 omap243x_sram_init();
389 else if (cpu_is_am33xx()) 389 else if (soc_is_am33xx())
390 am33xx_sram_init(); 390 am33xx_sram_init();
391 else if (cpu_is_omap34xx()) 391 else if (cpu_is_omap34xx())
392 omap34xx_sram_init(); 392 omap34xx_sram_init();