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authorRajendra Nayak <rnayak@ti.com>2009-12-08 20:46:28 -0500
committerpaul <paul@twilight.(none)>2009-12-11 19:00:45 -0500
commit972c542746904b5f418284946728a61b783275ef (patch)
tree3f8b449c10e6a25df3bd216c6e039f4240d52446 /arch/arm/plat-omap
parentdd7084138f7293f97584050d43a92cb03836974e (diff)
ARM: OMAP4: PM: OMAP4 clock tree and clkdev registration
This patch defines all the clock nodes in OMAP4430 platform. All the clock node structs and the clkdev table is autogenerated using a python script (gen_clock_tree.py) developed by Paul Walmsley, Benoit Cousson and Rajendra Nayak. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com>
Diffstat (limited to 'arch/arm/plat-omap')
-rw-r--r--arch/arm/plat-omap/include/plat/clkdev_omap.h2
-rw-r--r--arch/arm/plat-omap/include/plat/clock.h3
2 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/plat-omap/include/plat/clkdev_omap.h b/arch/arm/plat-omap/include/plat/clkdev_omap.h
index 96e5d385ac7d..35b36caf5f91 100644
--- a/arch/arm/plat-omap/include/plat/clkdev_omap.h
+++ b/arch/arm/plat-omap/include/plat/clkdev_omap.h
@@ -35,7 +35,7 @@ struct omap_clk {
35#define CK_343X (1 << 6) 35#define CK_343X (1 << 6)
36#define CK_3430ES1 (1 << 7) 36#define CK_3430ES1 (1 << 7)
37#define CK_3430ES2 (1 << 8) 37#define CK_3430ES2 (1 << 8)
38 38#define CK_443X (1 << 9)
39 39
40#endif 40#endif
41 41
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index 00310f21e84f..309b6d1dccdb 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -150,6 +150,8 @@ extern const struct clkops clkops_null;
150#define CONFIG_PARTICIPANT (1 << 10) /* Fundamental clock */ 150#define CONFIG_PARTICIPANT (1 << 10) /* Fundamental clock */
151#define ENABLE_ON_INIT (1 << 11) /* Enable upon framework init */ 151#define ENABLE_ON_INIT (1 << 11) /* Enable upon framework init */
152#define INVERT_ENABLE (1 << 12) /* 0 enables, 1 disables */ 152#define INVERT_ENABLE (1 << 12) /* 0 enables, 1 disables */
153#define CLOCK_IN_OMAP4430 (1 << 13)
154#define ALWAYS_ENABLED (1 << 14)
153/* bits 13-31 are currently free */ 155/* bits 13-31 are currently free */
154 156
155/* Clksel_rate flags */ 157/* Clksel_rate flags */
@@ -158,6 +160,7 @@ extern const struct clkops clkops_null;
158#define RATE_IN_243X (1 << 2) 160#define RATE_IN_243X (1 << 2)
159#define RATE_IN_343X (1 << 3) /* rates common to all 343X */ 161#define RATE_IN_343X (1 << 3) /* rates common to all 343X */
160#define RATE_IN_3430ES2 (1 << 4) /* 3430ES2 rates only */ 162#define RATE_IN_3430ES2 (1 << 4) /* 3430ES2 rates only */
163#define RATE_IN_4430 (1 << 5)
161 164
162#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X) 165#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
163 166