diff options
author | Tony Lindgren <tony@atomide.com> | 2010-02-12 15:26:47 -0500 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2010-02-15 12:27:01 -0500 |
commit | 088ef950dc0dd58d2f339e1616c9092fea923f06 (patch) | |
tree | 4901dd1855d101f2d4c84c1d297edb4e9404ffcd /arch/arm/plat-omap | |
parent | d10f2b6e745f1232ff6517b335faf3bfd7005bec (diff) |
omap2: Convert ARCH_OMAP24XX to ARCH_OMAP2
Convert ARCH_OMAP24XX to ARCH_OMAP2
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/plat-omap')
-rw-r--r-- | arch/arm/plat-omap/Kconfig | 4 | ||||
-rw-r--r-- | arch/arm/plat-omap/devices.c | 2 | ||||
-rw-r--r-- | arch/arm/plat-omap/gpio.c | 56 | ||||
-rw-r--r-- | arch/arm/plat-omap/i2c.c | 4 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/cpu.h | 8 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/mcbsp.h | 2 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/menelaus.h | 2 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/mux.h | 2 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/omap24xx.h | 6 | ||||
-rw-r--r-- | arch/arm/plat-omap/sram.c | 2 |
10 files changed, 44 insertions, 44 deletions
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index f195457d1b03..df497fc33f2b 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig | |||
@@ -124,7 +124,7 @@ config OMAP_MPU_TIMER | |||
124 | 124 | ||
125 | config OMAP_32K_TIMER | 125 | config OMAP_32K_TIMER |
126 | bool "Use 32KHz timer" | 126 | bool "Use 32KHz timer" |
127 | depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX || ARCH_OMAP4 | 127 | depends on ARCH_OMAP16XX || ARCH_OMAP2 || ARCH_OMAP34XX || ARCH_OMAP4 |
128 | help | 128 | help |
129 | Select this option if you want to enable the OMAP 32KHz timer. | 129 | Select this option if you want to enable the OMAP 32KHz timer. |
130 | This timer saves power compared to the OMAP_MPU_TIMER, and has | 130 | This timer saves power compared to the OMAP_MPU_TIMER, and has |
@@ -145,7 +145,7 @@ config OMAP_32K_TIMER_HZ | |||
145 | 145 | ||
146 | config OMAP_DM_TIMER | 146 | config OMAP_DM_TIMER |
147 | bool "Use dual-mode timer" | 147 | bool "Use dual-mode timer" |
148 | depends on ARCH_OMAP16XX || ARCH_OMAP24XX || ARCH_OMAP34XX || ARCH_OMAP4 | 148 | depends on ARCH_OMAP16XX || ARCH_OMAP2 || ARCH_OMAP34XX || ARCH_OMAP4 |
149 | help | 149 | help |
150 | Select this option if you want to use OMAP Dual-Mode timers. | 150 | Select this option if you want to use OMAP Dual-Mode timers. |
151 | 151 | ||
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c index 30b5db73017a..59f92c8bfc6d 100644 --- a/arch/arm/plat-omap/devices.c +++ b/arch/arm/plat-omap/devices.c | |||
@@ -244,7 +244,7 @@ fail: | |||
244 | 244 | ||
245 | #if defined(CONFIG_HW_RANDOM_OMAP) || defined(CONFIG_HW_RANDOM_OMAP_MODULE) | 245 | #if defined(CONFIG_HW_RANDOM_OMAP) || defined(CONFIG_HW_RANDOM_OMAP_MODULE) |
246 | 246 | ||
247 | #ifdef CONFIG_ARCH_OMAP24XX | 247 | #ifdef CONFIG_ARCH_OMAP2 |
248 | #define OMAP_RNG_BASE 0x480A0000 | 248 | #define OMAP_RNG_BASE 0x480A0000 |
249 | #else | 249 | #else |
250 | #define OMAP_RNG_BASE 0xfffe5000 | 250 | #define OMAP_RNG_BASE 0xfffe5000 |
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c index c09b3d9bcd3b..0fb0e58fec93 100644 --- a/arch/arm/plat-omap/gpio.c +++ b/arch/arm/plat-omap/gpio.c | |||
@@ -177,12 +177,12 @@ struct gpio_bank { | |||
177 | u16 irq; | 177 | u16 irq; |
178 | u16 virtual_irq_start; | 178 | u16 virtual_irq_start; |
179 | int method; | 179 | int method; |
180 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \ | 180 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2) || \ |
181 | defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP4) | 181 | defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP4) |
182 | u32 suspend_wakeup; | 182 | u32 suspend_wakeup; |
183 | u32 saved_wakeup; | 183 | u32 saved_wakeup; |
184 | #endif | 184 | #endif |
185 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ | 185 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) || \ |
186 | defined(CONFIG_ARCH_OMAP4) | 186 | defined(CONFIG_ARCH_OMAP4) |
187 | u32 non_wakeup_gpios; | 187 | u32 non_wakeup_gpios; |
188 | u32 enabled_non_wakeup_gpios; | 188 | u32 enabled_non_wakeup_gpios; |
@@ -248,7 +248,7 @@ static struct gpio_bank gpio_bank_7xx[7] = { | |||
248 | }; | 248 | }; |
249 | #endif | 249 | #endif |
250 | 250 | ||
251 | #ifdef CONFIG_ARCH_OMAP24XX | 251 | #ifdef CONFIG_ARCH_OMAP2 |
252 | 252 | ||
253 | static struct gpio_bank gpio_bank_242x[4] = { | 253 | static struct gpio_bank gpio_bank_242x[4] = { |
254 | { OMAP242X_GPIO1_BASE, NULL, INT_24XX_GPIO_BANK1, IH_GPIO_BASE, | 254 | { OMAP242X_GPIO1_BASE, NULL, INT_24XX_GPIO_BANK1, IH_GPIO_BASE, |
@@ -426,7 +426,7 @@ static void _set_gpio_direction(struct gpio_bank *bank, int gpio, int is_input) | |||
426 | reg += OMAP7XX_GPIO_DIR_CONTROL; | 426 | reg += OMAP7XX_GPIO_DIR_CONTROL; |
427 | break; | 427 | break; |
428 | #endif | 428 | #endif |
429 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 429 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) |
430 | case METHOD_GPIO_24XX: | 430 | case METHOD_GPIO_24XX: |
431 | reg += OMAP24XX_GPIO_OE; | 431 | reg += OMAP24XX_GPIO_OE; |
432 | break; | 432 | break; |
@@ -493,7 +493,7 @@ static void _set_gpio_dataout(struct gpio_bank *bank, int gpio, int enable) | |||
493 | l &= ~(1 << gpio); | 493 | l &= ~(1 << gpio); |
494 | break; | 494 | break; |
495 | #endif | 495 | #endif |
496 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 496 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) |
497 | case METHOD_GPIO_24XX: | 497 | case METHOD_GPIO_24XX: |
498 | if (enable) | 498 | if (enable) |
499 | reg += OMAP24XX_GPIO_SETDATAOUT; | 499 | reg += OMAP24XX_GPIO_SETDATAOUT; |
@@ -546,7 +546,7 @@ static int _get_gpio_datain(struct gpio_bank *bank, int gpio) | |||
546 | reg += OMAP7XX_GPIO_DATA_INPUT; | 546 | reg += OMAP7XX_GPIO_DATA_INPUT; |
547 | break; | 547 | break; |
548 | #endif | 548 | #endif |
549 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 549 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) |
550 | case METHOD_GPIO_24XX: | 550 | case METHOD_GPIO_24XX: |
551 | reg += OMAP24XX_GPIO_DATAIN; | 551 | reg += OMAP24XX_GPIO_DATAIN; |
552 | break; | 552 | break; |
@@ -592,7 +592,7 @@ static int _get_gpio_dataout(struct gpio_bank *bank, int gpio) | |||
592 | reg += OMAP7XX_GPIO_DATA_OUTPUT; | 592 | reg += OMAP7XX_GPIO_DATA_OUTPUT; |
593 | break; | 593 | break; |
594 | #endif | 594 | #endif |
595 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ | 595 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) || \ |
596 | defined(CONFIG_ARCH_OMAP4) | 596 | defined(CONFIG_ARCH_OMAP4) |
597 | case METHOD_GPIO_24XX: | 597 | case METHOD_GPIO_24XX: |
598 | reg += OMAP24XX_GPIO_DATAOUT; | 598 | reg += OMAP24XX_GPIO_DATAOUT; |
@@ -684,7 +684,7 @@ void omap_set_gpio_debounce_time(int gpio, int enc_time) | |||
684 | } | 684 | } |
685 | EXPORT_SYMBOL(omap_set_gpio_debounce_time); | 685 | EXPORT_SYMBOL(omap_set_gpio_debounce_time); |
686 | 686 | ||
687 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ | 687 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) || \ |
688 | defined(CONFIG_ARCH_OMAP4) | 688 | defined(CONFIG_ARCH_OMAP4) |
689 | static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, | 689 | static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, |
690 | int trigger) | 690 | int trigger) |
@@ -856,7 +856,7 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger) | |||
856 | goto bad; | 856 | goto bad; |
857 | break; | 857 | break; |
858 | #endif | 858 | #endif |
859 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ | 859 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) || \ |
860 | defined(CONFIG_ARCH_OMAP4) | 860 | defined(CONFIG_ARCH_OMAP4) |
861 | case METHOD_GPIO_24XX: | 861 | case METHOD_GPIO_24XX: |
862 | set_24xx_gpio_triggering(bank, gpio, trigger); | 862 | set_24xx_gpio_triggering(bank, gpio, trigger); |
@@ -937,7 +937,7 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) | |||
937 | reg += OMAP7XX_GPIO_INT_STATUS; | 937 | reg += OMAP7XX_GPIO_INT_STATUS; |
938 | break; | 938 | break; |
939 | #endif | 939 | #endif |
940 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 940 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) |
941 | case METHOD_GPIO_24XX: | 941 | case METHOD_GPIO_24XX: |
942 | reg += OMAP24XX_GPIO_IRQSTATUS1; | 942 | reg += OMAP24XX_GPIO_IRQSTATUS1; |
943 | break; | 943 | break; |
@@ -954,7 +954,7 @@ static void _clear_gpio_irqbank(struct gpio_bank *bank, int gpio_mask) | |||
954 | __raw_writel(gpio_mask, reg); | 954 | __raw_writel(gpio_mask, reg); |
955 | 955 | ||
956 | /* Workaround for clearing DSP GPIO interrupts to allow retention */ | 956 | /* Workaround for clearing DSP GPIO interrupts to allow retention */ |
957 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 957 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) |
958 | reg = bank->base + OMAP24XX_GPIO_IRQSTATUS2; | 958 | reg = bank->base + OMAP24XX_GPIO_IRQSTATUS2; |
959 | #endif | 959 | #endif |
960 | #if defined(CONFIG_ARCH_OMAP4) | 960 | #if defined(CONFIG_ARCH_OMAP4) |
@@ -1008,7 +1008,7 @@ static u32 _get_gpio_irqbank_mask(struct gpio_bank *bank) | |||
1008 | inv = 1; | 1008 | inv = 1; |
1009 | break; | 1009 | break; |
1010 | #endif | 1010 | #endif |
1011 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 1011 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) |
1012 | case METHOD_GPIO_24XX: | 1012 | case METHOD_GPIO_24XX: |
1013 | reg += OMAP24XX_GPIO_IRQENABLE1; | 1013 | reg += OMAP24XX_GPIO_IRQENABLE1; |
1014 | mask = 0xffffffff; | 1014 | mask = 0xffffffff; |
@@ -1077,7 +1077,7 @@ static void _enable_gpio_irqbank(struct gpio_bank *bank, int gpio_mask, int enab | |||
1077 | l |= gpio_mask; | 1077 | l |= gpio_mask; |
1078 | break; | 1078 | break; |
1079 | #endif | 1079 | #endif |
1080 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 1080 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) |
1081 | case METHOD_GPIO_24XX: | 1081 | case METHOD_GPIO_24XX: |
1082 | if (enable) | 1082 | if (enable) |
1083 | reg += OMAP24XX_GPIO_SETIRQENABLE1; | 1083 | reg += OMAP24XX_GPIO_SETIRQENABLE1; |
@@ -1131,7 +1131,7 @@ static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable) | |||
1131 | spin_unlock_irqrestore(&bank->lock, flags); | 1131 | spin_unlock_irqrestore(&bank->lock, flags); |
1132 | return 0; | 1132 | return 0; |
1133 | #endif | 1133 | #endif |
1134 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ | 1134 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) || \ |
1135 | defined(CONFIG_ARCH_OMAP4) | 1135 | defined(CONFIG_ARCH_OMAP4) |
1136 | case METHOD_GPIO_24XX: | 1136 | case METHOD_GPIO_24XX: |
1137 | if (bank->non_wakeup_gpios & (1 << gpio)) { | 1137 | if (bank->non_wakeup_gpios & (1 << gpio)) { |
@@ -1227,7 +1227,7 @@ static void omap_gpio_free(struct gpio_chip *chip, unsigned offset) | |||
1227 | __raw_writel(1 << offset, reg); | 1227 | __raw_writel(1 << offset, reg); |
1228 | } | 1228 | } |
1229 | #endif | 1229 | #endif |
1230 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ | 1230 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) || \ |
1231 | defined(CONFIG_ARCH_OMAP4) | 1231 | defined(CONFIG_ARCH_OMAP4) |
1232 | if (bank->method == METHOD_GPIO_24XX) { | 1232 | if (bank->method == METHOD_GPIO_24XX) { |
1233 | /* Disable wake-up during idle for dynamic tick */ | 1233 | /* Disable wake-up during idle for dynamic tick */ |
@@ -1286,7 +1286,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
1286 | if (bank->method == METHOD_GPIO_7XX) | 1286 | if (bank->method == METHOD_GPIO_7XX) |
1287 | isr_reg = bank->base + OMAP7XX_GPIO_INT_STATUS; | 1287 | isr_reg = bank->base + OMAP7XX_GPIO_INT_STATUS; |
1288 | #endif | 1288 | #endif |
1289 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 1289 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) |
1290 | if (bank->method == METHOD_GPIO_24XX) | 1290 | if (bank->method == METHOD_GPIO_24XX) |
1291 | isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1; | 1291 | isr_reg = bank->base + OMAP24XX_GPIO_IRQSTATUS1; |
1292 | #endif | 1292 | #endif |
@@ -1756,7 +1756,7 @@ static int __init _omap_gpio_init(void) | |||
1756 | bank_size = SZ_2K; | 1756 | bank_size = SZ_2K; |
1757 | } | 1757 | } |
1758 | #endif | 1758 | #endif |
1759 | #ifdef CONFIG_ARCH_OMAP24XX | 1759 | #ifdef CONFIG_ARCH_OMAP2 |
1760 | if (cpu_is_omap242x()) { | 1760 | if (cpu_is_omap242x()) { |
1761 | gpio_bank_count = 4; | 1761 | gpio_bank_count = 4; |
1762 | gpio_bank = gpio_bank_242x; | 1762 | gpio_bank = gpio_bank_242x; |
@@ -1809,7 +1809,7 @@ static int __init _omap_gpio_init(void) | |||
1809 | gpio_count = 32; /* 7xx has 32-bit GPIOs */ | 1809 | gpio_count = 32; /* 7xx has 32-bit GPIOs */ |
1810 | } | 1810 | } |
1811 | 1811 | ||
1812 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ | 1812 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) || \ |
1813 | defined(CONFIG_ARCH_OMAP4) | 1813 | defined(CONFIG_ARCH_OMAP4) |
1814 | if (bank->method == METHOD_GPIO_24XX) { | 1814 | if (bank->method == METHOD_GPIO_24XX) { |
1815 | static const u32 non_wakeup_gpios[] = { | 1815 | static const u32 non_wakeup_gpios[] = { |
@@ -1903,7 +1903,7 @@ static int __init _omap_gpio_init(void) | |||
1903 | return 0; | 1903 | return 0; |
1904 | } | 1904 | } |
1905 | 1905 | ||
1906 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \ | 1906 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2) || \ |
1907 | defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP4) | 1907 | defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP4) |
1908 | static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg) | 1908 | static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg) |
1909 | { | 1909 | { |
@@ -1927,7 +1927,7 @@ static int omap_gpio_suspend(struct sys_device *dev, pm_message_t mesg) | |||
1927 | wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; | 1927 | wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; |
1928 | break; | 1928 | break; |
1929 | #endif | 1929 | #endif |
1930 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 1930 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) |
1931 | case METHOD_GPIO_24XX: | 1931 | case METHOD_GPIO_24XX: |
1932 | wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN; | 1932 | wake_status = bank->base + OMAP24XX_GPIO_WAKE_EN; |
1933 | wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; | 1933 | wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; |
@@ -1975,7 +1975,7 @@ static int omap_gpio_resume(struct sys_device *dev) | |||
1975 | wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; | 1975 | wake_set = bank->base + OMAP1610_GPIO_SET_WAKEUPENA; |
1976 | break; | 1976 | break; |
1977 | #endif | 1977 | #endif |
1978 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 1978 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) |
1979 | case METHOD_GPIO_24XX: | 1979 | case METHOD_GPIO_24XX: |
1980 | wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; | 1980 | wake_clear = bank->base + OMAP24XX_GPIO_CLEARWKUENA; |
1981 | wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; | 1981 | wake_set = bank->base + OMAP24XX_GPIO_SETWKUENA; |
@@ -2013,7 +2013,7 @@ static struct sys_device omap_gpio_device = { | |||
2013 | 2013 | ||
2014 | #endif | 2014 | #endif |
2015 | 2015 | ||
2016 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ | 2016 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) || \ |
2017 | defined(CONFIG_ARCH_OMAP4) | 2017 | defined(CONFIG_ARCH_OMAP4) |
2018 | 2018 | ||
2019 | static int workaround_enabled; | 2019 | static int workaround_enabled; |
@@ -2030,7 +2030,7 @@ void omap2_gpio_prepare_for_retention(void) | |||
2030 | 2030 | ||
2031 | if (!(bank->enabled_non_wakeup_gpios)) | 2031 | if (!(bank->enabled_non_wakeup_gpios)) |
2032 | continue; | 2032 | continue; |
2033 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 2033 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) |
2034 | bank->saved_datain = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN); | 2034 | bank->saved_datain = __raw_readl(bank->base + OMAP24XX_GPIO_DATAIN); |
2035 | l1 = __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT); | 2035 | l1 = __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT); |
2036 | l2 = __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT); | 2036 | l2 = __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT); |
@@ -2045,7 +2045,7 @@ void omap2_gpio_prepare_for_retention(void) | |||
2045 | bank->saved_risingdetect = l2; | 2045 | bank->saved_risingdetect = l2; |
2046 | l1 &= ~bank->enabled_non_wakeup_gpios; | 2046 | l1 &= ~bank->enabled_non_wakeup_gpios; |
2047 | l2 &= ~bank->enabled_non_wakeup_gpios; | 2047 | l2 &= ~bank->enabled_non_wakeup_gpios; |
2048 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 2048 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) |
2049 | __raw_writel(l1, bank->base + OMAP24XX_GPIO_FALLINGDETECT); | 2049 | __raw_writel(l1, bank->base + OMAP24XX_GPIO_FALLINGDETECT); |
2050 | __raw_writel(l2, bank->base + OMAP24XX_GPIO_RISINGDETECT); | 2050 | __raw_writel(l2, bank->base + OMAP24XX_GPIO_RISINGDETECT); |
2051 | #endif | 2051 | #endif |
@@ -2074,7 +2074,7 @@ void omap2_gpio_resume_after_retention(void) | |||
2074 | 2074 | ||
2075 | if (!(bank->enabled_non_wakeup_gpios)) | 2075 | if (!(bank->enabled_non_wakeup_gpios)) |
2076 | continue; | 2076 | continue; |
2077 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 2077 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) |
2078 | __raw_writel(bank->saved_fallingdetect, | 2078 | __raw_writel(bank->saved_fallingdetect, |
2079 | bank->base + OMAP24XX_GPIO_FALLINGDETECT); | 2079 | bank->base + OMAP24XX_GPIO_FALLINGDETECT); |
2080 | __raw_writel(bank->saved_risingdetect, | 2080 | __raw_writel(bank->saved_risingdetect, |
@@ -2113,7 +2113,7 @@ void omap2_gpio_resume_after_retention(void) | |||
2113 | 2113 | ||
2114 | if (gen) { | 2114 | if (gen) { |
2115 | u32 old0, old1; | 2115 | u32 old0, old1; |
2116 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 2116 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) |
2117 | old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0); | 2117 | old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0); |
2118 | old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); | 2118 | old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); |
2119 | __raw_writel(old0 | gen, bank->base + | 2119 | __raw_writel(old0 | gen, bank->base + |
@@ -2240,7 +2240,7 @@ static int __init omap_gpio_sysinit(void) | |||
2240 | 2240 | ||
2241 | mpuio_init(); | 2241 | mpuio_init(); |
2242 | 2242 | ||
2243 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \ | 2243 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2) || \ |
2244 | defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP4) | 2244 | defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP4) |
2245 | if (cpu_is_omap16xx() || cpu_class_is_omap2()) { | 2245 | if (cpu_is_omap16xx() || cpu_class_is_omap2()) { |
2246 | if (ret == 0) { | 2246 | if (ret == 0) { |
@@ -2300,7 +2300,7 @@ static int dbg_gpio_show(struct seq_file *s, void *unused) | |||
2300 | /* FIXME for at least omap2, show pullup/pulldown state */ | 2300 | /* FIXME for at least omap2, show pullup/pulldown state */ |
2301 | 2301 | ||
2302 | irqstat = irq_desc[irq].status; | 2302 | irqstat = irq_desc[irq].status; |
2303 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP24XX) || \ | 2303 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2) || \ |
2304 | defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP4) | 2304 | defined(CONFIG_ARCH_OMAP34XX) || defined(CONFIG_ARCH_OMAP4) |
2305 | if (is_in && ((bank->suspend_wakeup & mask) | 2305 | if (is_in && ((bank->suspend_wakeup & mask) |
2306 | || irqstat & IRQ_TYPE_SENSE_MASK)) { | 2306 | || irqstat & IRQ_TYPE_SENSE_MASK)) { |
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c index 33fff4ef382d..7773bceca442 100644 --- a/arch/arm/plat-omap/i2c.c +++ b/arch/arm/plat-omap/i2c.c | |||
@@ -50,7 +50,7 @@ static const char name[] = "i2c_omap"; | |||
50 | 50 | ||
51 | static struct resource i2c_resources[][2] = { | 51 | static struct resource i2c_resources[][2] = { |
52 | { I2C_RESOURCE_BUILDER(0, 0) }, | 52 | { I2C_RESOURCE_BUILDER(0, 0) }, |
53 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 53 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) |
54 | { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE2, INT_24XX_I2C2_IRQ) }, | 54 | { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE2, INT_24XX_I2C2_IRQ) }, |
55 | #endif | 55 | #endif |
56 | #if defined(CONFIG_ARCH_OMAP34XX) | 56 | #if defined(CONFIG_ARCH_OMAP34XX) |
@@ -72,7 +72,7 @@ static struct resource i2c_resources[][2] = { | |||
72 | static u32 i2c_rate[ARRAY_SIZE(i2c_resources)]; | 72 | static u32 i2c_rate[ARRAY_SIZE(i2c_resources)]; |
73 | static struct platform_device omap_i2c_devices[] = { | 73 | static struct platform_device omap_i2c_devices[] = { |
74 | I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_rate[0]), | 74 | I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_rate[0]), |
75 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 75 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) |
76 | I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_rate[1]), | 76 | I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_rate[1]), |
77 | #endif | 77 | #endif |
78 | #if defined(CONFIG_ARCH_OMAP34XX) | 78 | #if defined(CONFIG_ARCH_OMAP34XX) |
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h index ccd78fd473d1..527aaae61720 100644 --- a/arch/arm/plat-omap/include/plat/cpu.h +++ b/arch/arm/plat-omap/include/plat/cpu.h | |||
@@ -114,7 +114,7 @@ unsigned int omap_rev(void); | |||
114 | # define OMAP_NAME omap16xx | 114 | # define OMAP_NAME omap16xx |
115 | # endif | 115 | # endif |
116 | #endif | 116 | #endif |
117 | #if (defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)) | 117 | #if (defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX)) |
118 | # if (defined(OMAP_NAME) || defined(MULTI_OMAP1)) | 118 | # if (defined(OMAP_NAME) || defined(MULTI_OMAP1)) |
119 | # error "OMAP1 and OMAP2 can't be selected at the same time" | 119 | # error "OMAP1 and OMAP2 can't be selected at the same time" |
120 | # endif | 120 | # endif |
@@ -233,7 +233,7 @@ IS_OMAP_SUBCLASS(443x, 0x443) | |||
233 | #endif | 233 | #endif |
234 | 234 | ||
235 | #if defined(MULTI_OMAP2) | 235 | #if defined(MULTI_OMAP2) |
236 | # if defined(CONFIG_ARCH_OMAP24XX) | 236 | # if defined(CONFIG_ARCH_OMAP2) |
237 | # undef cpu_is_omap24xx | 237 | # undef cpu_is_omap24xx |
238 | # undef cpu_is_omap242x | 238 | # undef cpu_is_omap242x |
239 | # undef cpu_is_omap243x | 239 | # undef cpu_is_omap243x |
@@ -248,7 +248,7 @@ IS_OMAP_SUBCLASS(443x, 0x443) | |||
248 | # define cpu_is_omap343x() is_omap343x() | 248 | # define cpu_is_omap343x() is_omap343x() |
249 | # endif | 249 | # endif |
250 | #else | 250 | #else |
251 | # if defined(CONFIG_ARCH_OMAP24XX) | 251 | # if defined(CONFIG_ARCH_OMAP2) |
252 | # undef cpu_is_omap24xx | 252 | # undef cpu_is_omap24xx |
253 | # define cpu_is_omap24xx() 1 | 253 | # define cpu_is_omap24xx() 1 |
254 | # endif | 254 | # endif |
@@ -374,7 +374,7 @@ IS_OMAP_TYPE(3517, 0x3517) | |||
374 | # define cpu_is_omap1710() is_omap1710() | 374 | # define cpu_is_omap1710() is_omap1710() |
375 | #endif | 375 | #endif |
376 | 376 | ||
377 | #if defined(CONFIG_ARCH_OMAP24XX) | 377 | #if defined(CONFIG_ARCH_OMAP2) |
378 | # undef cpu_is_omap2420 | 378 | # undef cpu_is_omap2420 |
379 | # undef cpu_is_omap2422 | 379 | # undef cpu_is_omap2422 |
380 | # undef cpu_is_omap2423 | 380 | # undef cpu_is_omap2423 |
diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h index 4f22e5bb7ff7..951506277ec8 100644 --- a/arch/arm/plat-omap/include/plat/mcbsp.h +++ b/arch/arm/plat-omap/include/plat/mcbsp.h | |||
@@ -103,7 +103,7 @@ | |||
103 | #define AUDIO_DMA_TX OMAP_DMA_MCBSP1_TX | 103 | #define AUDIO_DMA_TX OMAP_DMA_MCBSP1_TX |
104 | #define AUDIO_DMA_RX OMAP_DMA_MCBSP1_RX | 104 | #define AUDIO_DMA_RX OMAP_DMA_MCBSP1_RX |
105 | 105 | ||
106 | #elif defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) || \ | 106 | #elif defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) || \ |
107 | defined(CONFIG_ARCH_OMAP4) | 107 | defined(CONFIG_ARCH_OMAP4) |
108 | 108 | ||
109 | #define OMAP_MCBSP_REG_DRR2 0x00 | 109 | #define OMAP_MCBSP_REG_DRR2 0x00 |
diff --git a/arch/arm/plat-omap/include/plat/menelaus.h b/arch/arm/plat-omap/include/plat/menelaus.h index 3122bf68c7ce..4a970ec62dd1 100644 --- a/arch/arm/plat-omap/include/plat/menelaus.h +++ b/arch/arm/plat-omap/include/plat/menelaus.h | |||
@@ -40,7 +40,7 @@ extern int menelaus_set_vcore_hw(unsigned int roof_mV, unsigned int floor_mV); | |||
40 | 40 | ||
41 | extern int menelaus_set_regulator_sleep(int enable, u32 val); | 41 | extern int menelaus_set_regulator_sleep(int enable, u32 val); |
42 | 42 | ||
43 | #if defined(CONFIG_ARCH_OMAP24XX) && defined(CONFIG_MENELAUS) | 43 | #if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_MENELAUS) |
44 | #define omap_has_menelaus() 1 | 44 | #define omap_has_menelaus() 1 |
45 | #else | 45 | #else |
46 | #define omap_has_menelaus() 0 | 46 | #define omap_has_menelaus() 0 |
diff --git a/arch/arm/plat-omap/include/plat/mux.h b/arch/arm/plat-omap/include/plat/mux.h index 692c90e89ac3..c7472a28ce24 100644 --- a/arch/arm/plat-omap/include/plat/mux.h +++ b/arch/arm/plat-omap/include/plat/mux.h | |||
@@ -135,7 +135,7 @@ struct pin_config { | |||
135 | const unsigned int mux_reg; | 135 | const unsigned int mux_reg; |
136 | unsigned char debug; | 136 | unsigned char debug; |
137 | 137 | ||
138 | #if defined(CONFIG_ARCH_OMAP1) || defined(CONFIG_ARCH_OMAP24XX) | 138 | #if defined(CONFIG_ARCH_OMAP1) || defined(CONFIG_ARCH_OMAP2) |
139 | const unsigned char mask_offset; | 139 | const unsigned char mask_offset; |
140 | const unsigned char mask; | 140 | const unsigned char mask; |
141 | 141 | ||
diff --git a/arch/arm/plat-omap/include/plat/omap24xx.h b/arch/arm/plat-omap/include/plat/omap24xx.h index 696edfc145a6..7055672a8c68 100644 --- a/arch/arm/plat-omap/include/plat/omap24xx.h +++ b/arch/arm/plat-omap/include/plat/omap24xx.h | |||
@@ -23,8 +23,8 @@ | |||
23 | * | 23 | * |
24 | */ | 24 | */ |
25 | 25 | ||
26 | #ifndef __ASM_ARCH_OMAP24XX_H | 26 | #ifndef __ASM_ARCH_OMAP2_H |
27 | #define __ASM_ARCH_OMAP24XX_H | 27 | #define __ASM_ARCH_OMAP2_H |
28 | 28 | ||
29 | /* | 29 | /* |
30 | * Please place only base defines here and put the rest in device | 30 | * Please place only base defines here and put the rest in device |
@@ -85,5 +85,5 @@ | |||
85 | #define OMAP24XX_SEC_AES_BASE (OMAP24XX_SEC_BASE + 0x6000) | 85 | #define OMAP24XX_SEC_AES_BASE (OMAP24XX_SEC_BASE + 0x6000) |
86 | #define OMAP24XX_SEC_PKA_BASE (OMAP24XX_SEC_BASE + 0x8000) | 86 | #define OMAP24XX_SEC_PKA_BASE (OMAP24XX_SEC_BASE + 0x8000) |
87 | 87 | ||
88 | #endif /* __ASM_ARCH_OMAP24XX_H */ | 88 | #endif /* __ASM_ARCH_OMAP2_H */ |
89 | 89 | ||
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index d8d5094b37ed..e0cbb9349bc1 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c | |||
@@ -53,7 +53,7 @@ | |||
53 | #define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000) | 53 | #define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000) |
54 | #define OMAP4_SRAM_PUB_VA (OMAP4_SRAM_VA + 0x4000) | 54 | #define OMAP4_SRAM_PUB_VA (OMAP4_SRAM_VA + 0x4000) |
55 | 55 | ||
56 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 56 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP34XX) |
57 | #define SRAM_BOOTLOADER_SZ 0x00 | 57 | #define SRAM_BOOTLOADER_SZ 0x00 |
58 | #else | 58 | #else |
59 | #define SRAM_BOOTLOADER_SZ 0x80 | 59 | #define SRAM_BOOTLOADER_SZ 0x80 |