Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull general arm-soc cleanups from Arnd Bergmann:
 "These are all boring changes, moving stuff around or renaming things
  mostly, and also getting rid of stuff that is duplicate or should not
  be there to start with.  Platform-wise this is all over the place,
  mainly omap, samsung, at91, imx and tegra."

Resolve trivial conflict in arch/arm/mach-omap2/clockdomains3xxx_data.c

* tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (67 commits)
  ARM: clps711x: Remove the setting of the time
  ARM: clps711x: Removed superfluous transform virt_to_bus and related functions
  ARM: clps711x/p720t: Replace __initcall by .init_early call
  ARM: S3C24XX: Remove unused GPIO definitions for Openmoko GTA02 board
  ARM: S3C24XX: Remove unused GPIO definitions for port J
  ARM: S3C24XX: Remove unused GPA, GPE, GPH bank GPIO aliases
  ARM: S3C24XX: Convert the touchscreen setup code to common GPIO API
  ARM: S3C24XX: Convert the PM code to gpiolib API
  ARM: S3C24XX: Convert QT2410 board file to the gpiolib API
  ARM: S3C24XX: Convert SMDK board file to the gpiolib API
  ARM: S3C24XX: Free the backlight gpio requested in Mini2440 board code
  ARM: imx: remove unused pdata from device macros
  ARM: imx: Kconfig: Remove IMX_HAVE_PLATFORM_IMX_SSI from MACH_MX25_3DS
  ARM: at91: fix new build errors
  ARM: at91: add AIC5 support
  ARM: at91: remove mach/irqs.h
  ARM: at91: sparse irq support
  ARM: at91: at91 based machines specify their own irq handler at run time
  ARM: at91: remove static irq priorities for sam9x5
  ARM: at91: add of irq priorities support
  ...

8 files changed, 36 insertions, 411 deletions

diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index ed8605f01155..6d87532871cd 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -4,7 +4,7 @@
 
 # Common support
 obj-y := common.o sram.o clock.o devices.o dma.o mux.o \
-         usb.o fb.o counter_32k.o
+         fb.o counter_32k.o
 obj-m :=
 obj-n :=
 obj-  :=
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index cb16ade437cb..7fe626761e53 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -573,22 +573,25 @@ EXPORT_SYMBOL(omap_set_dma_dest_burst_mode);
 
 static inline void omap_enable_channel_irq(int lch)
 {
-        u32 status;
-
         /* Clear CSR */
         if (cpu_class_is_omap1())
-                status = p->dma_read(CSR, lch);
-        else if (cpu_class_is_omap2())
+                p->dma_read(CSR, lch);
+        else
                 p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);
 
         /* Enable some nice interrupts. */
         p->dma_write(dma_chan[lch].enabled_irqs, CICR, lch);
 }
 
-static void omap_disable_channel_irq(int lch)
+static inline void omap_disable_channel_irq(int lch)
 {
-        if (cpu_class_is_omap2())
-                p->dma_write(0, CICR, lch);
+        /* disable channel interrupts */
+        p->dma_write(0, CICR, lch);
+        /* Clear CSR */
+        if (cpu_class_is_omap1())
+                p->dma_read(CSR, lch);
+        else
+                p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);
 }
 
 void omap_enable_dma_irq(int lch, u16 bits)
@@ -632,14 +635,14 @@ static inline void disable_lnk(int lch)
         l = p->dma_read(CLNK_CTRL, lch);
 
         /* Disable interrupts */
+        omap_disable_channel_irq(lch);
+
         if (cpu_class_is_omap1()) {
-                p->dma_write(0, CICR, lch);
                 /* Set the STOP_LNK bit */
                 l |= 1 << 14;
         }
 
         if (cpu_class_is_omap2()) {
-                omap_disable_channel_irq(lch);
                 /* Clear the ENABLE_LNK bit */
                 l &= ~(1 << 15);
         }
@@ -657,6 +660,9 @@ static inline void omap2_enable_irq_lch(int lch)
                 return;
 
         spin_lock_irqsave(&dma_chan_lock, flags);
+        /* clear IRQ STATUS */
+        p->dma_write(1 << lch, IRQSTATUS_L0, lch);
+        /* Enable interrupt */
         val = p->dma_read(IRQENABLE_L0, lch);
         val |= 1 << lch;
         p->dma_write(val, IRQENABLE_L0, lch);
@@ -672,9 +678,12 @@ static inline void omap2_disable_irq_lch(int lch)
                 return;
 
         spin_lock_irqsave(&dma_chan_lock, flags);
+        /* Disable interrupt */
         val = p->dma_read(IRQENABLE_L0, lch);
         val &= ~(1 << lch);
         p->dma_write(val, IRQENABLE_L0, lch);
+        /* clear IRQ STATUS */
+        p->dma_write(1 << lch, IRQSTATUS_L0, lch);
         spin_unlock_irqrestore(&dma_chan_lock, flags);
 }
 
@@ -745,11 +754,8 @@ int omap_request_dma(int dev_id, const char *dev_name,
         }
 
         if (cpu_class_is_omap2()) {
-                omap2_enable_irq_lch(free_ch);
                 omap_enable_channel_irq(free_ch);
-                /* Clear the CSR register and IRQ status register */
-                p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, free_ch);
-                p->dma_write(1 << free_ch, IRQSTATUS_L0, 0);
+                omap2_enable_irq_lch(free_ch);
         }
 
         *dma_ch_out = free_ch;
@@ -768,27 +774,19 @@ void omap_free_dma(int lch)
                 return;
         }
 
-        if (cpu_class_is_omap1()) {
-                /* Disable all DMA interrupts for the channel. */
-                p->dma_write(0, CICR, lch);
-                /* Make sure the DMA transfer is stopped. */
-                p->dma_write(0, CCR, lch);
-        }
-
-        if (cpu_class_is_omap2()) {
+        /* Disable interrupt for logical channel */
+        if (cpu_class_is_omap2())
                 omap2_disable_irq_lch(lch);
 
-                /* Clear the CSR register and IRQ status register */
-                p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch);
-                p->dma_write(1 << lch, IRQSTATUS_L0, lch);
+        /* Disable all DMA interrupts for the channel. */
+        omap_disable_channel_irq(lch);
 
-                /* Disable all DMA interrupts for the channel. */
-                p->dma_write(0, CICR, lch);
+        /* Make sure the DMA transfer is stopped. */
+        p->dma_write(0, CCR, lch);
 
-                /* Make sure the DMA transfer is stopped. */
-                p->dma_write(0, CCR, lch);
+        /* Clear registers */
+        if (cpu_class_is_omap2())
                 omap_clear_dma(lch);
-        }
 
         spin_lock_irqsave(&dma_chan_lock, flags);
         dma_chan[lch].dev_id = -1;
@@ -943,8 +941,7 @@ void omap_stop_dma(int lch)
         u32 l;
 
         /* Disable all interrupts on the channel */
-        if (cpu_class_is_omap1())
-                p->dma_write(0, CICR, lch);
+        omap_disable_channel_irq(lch);
 
         l = p->dma_read(CCR, lch);
         if (IS_DMA_ERRATA(DMA_ERRATA_i541) &&
diff --git a/arch/arm/plat-omap/include/plat/board.h b/arch/arm/plat-omap/include/plat/board.h
index 4814c5b65306..e62f20a5c0af 100644
--- a/arch/arm/plat-omap/include/plat/board.h
+++ b/arch/arm/plat-omap/include/plat/board.h
@@ -57,44 +57,6 @@ struct omap_camera_sensor_config {
         int (*power_off)(void * data);
 };
 
-struct omap_usb_config {
-        /* Configure drivers according to the connectors on your board:
-         *  - "A" connector (rectagular)
-         *      ... for host/OHCI use, set "register_host".
-         *  - "B" connector (squarish) or "Mini-B"
-         *      ... for device/gadget use, set "register_dev".
-         *  - "Mini-AB" connector (very similar to Mini-B)
-         *      ... for OTG use as device OR host, initialize "otg"
-         */
-        unsigned        register_host:1;
-        unsigned        register_dev:1;
-        u8              otg;    /* port number, 1-based:  usb1 == 2 */
-
-        u8              hmc_mode;
-
-        /* implicitly true if otg:  host supports remote wakeup? */
-        u8              rwc;
-
-        /* signaling pins used to talk to transceiver on usbN:
-         *  0 == usbN unused
-         *  2 == usb0-only, using internal transceiver
-         *  3 == 3 wire bidirectional
-         *  4 == 4 wire bidirectional
-         *  6 == 6 wire unidirectional (or TLL)
-         */
-        u8              pins[3];
-
-        struct platform_device *udc_device;
-        struct platform_device *ohci_device;
-        struct platform_device *otg_device;
-
-        u32 (*usb0_init)(unsigned nwires, unsigned is_device);
-        u32 (*usb1_init)(unsigned nwires);
-        u32 (*usb2_init)(unsigned nwires, unsigned alt_pingroup);
-
-        int (*ocpi_enable)(void);
-};
-
 struct omap_lcd_config {
         char panel_name[16];
         char ctrl_name[16];
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index d0ef57c1d71b..656b9862279e 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -156,7 +156,6 @@ struct dpll_data {
         u8                      min_divider;
         u16                     max_divider;
         u8                      modes;
-#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
         void __iomem            *autoidle_reg;
         void __iomem            *idlest_reg;
         u32                     autoidle_mask;
@@ -167,7 +166,6 @@ struct dpll_data {
         u8                      auto_recal_bit;
         u8                      recal_en_bit;
         u8                      recal_st_bit;
-#  endif
         u8                      flags;
 };
 
diff --git a/arch/arm/plat-omap/include/plat/dsp.h b/arch/arm/plat-omap/include/plat/dsp.h
index 9c604b390f9f..5927709b1908 100644
--- a/arch/arm/plat-omap/include/plat/dsp.h
+++ b/arch/arm/plat-omap/include/plat/dsp.h
@@ -18,6 +18,9 @@ struct omap_dsp_platform_data {
         u32 (*dsp_cm_read)(s16 , u16);
         u32 (*dsp_cm_rmw_bits)(u32, u32, s16, s16);
 
+        void (*set_bootaddr)(u32);
+        void (*set_bootmode)(u8);
+
         phys_addr_t phys_mempool_base;
         phys_addr_t phys_mempool_size;
 };
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index c835b7194ff5..a8ecc53b3670 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -629,6 +629,8 @@ int omap_hwmod_no_setup_reset(struct omap_hwmod *oh);
 
 int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx);
 
+extern void __init omap_hwmod_init(void);
+
 /*
  * Chip variant-specific hwmod init routines - XXX should be converted
  * to use initcalls once the initial boot ordering is straightened out
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h
index 762eeb0626c1..548a4c8d63df 100644
--- a/arch/arm/plat-omap/include/plat/usb.h
+++ b/arch/arm/plat-omap/include/plat/usb.h
@@ -44,6 +44,8 @@ struct usbhs_omap_board_data {
         struct regulator                *regulator[OMAP3_HS_USB_PORTS];
 };
 
+#ifdef CONFIG_ARCH_OMAP2PLUS
+
 struct ehci_hcd_omap_platform_data {
         enum usbhs_omap_port_mode       port_mode[OMAP3_HS_USB_PORTS];
         int                             reset_gpio_port[OMAP3_HS_USB_PORTS];
@@ -64,26 +66,6 @@ struct usbhs_omap_platform_data {
 };
 /*-------------------------------------------------------------------------*/
 
-#define OMAP1_OTG_BASE                  0xfffb0400
-#define OMAP1_UDC_BASE                  0xfffb4000
-#define OMAP1_OHCI_BASE                 0xfffba000
-
-#define OMAP2_OHCI_BASE                 0x4805e000
-#define OMAP2_UDC_BASE                  0x4805e200
-#define OMAP2_OTG_BASE                  0x4805e300
-
-#ifdef CONFIG_ARCH_OMAP1
-
-#define OTG_BASE                        OMAP1_OTG_BASE
-#define UDC_BASE                        OMAP1_UDC_BASE
-#define OMAP_OHCI_BASE                  OMAP1_OHCI_BASE
-
-#else
-
-#define OTG_BASE                        OMAP2_OTG_BASE
-#define UDC_BASE                        OMAP2_UDC_BASE
-#define OMAP_OHCI_BASE                  OMAP2_OHCI_BASE
-
 struct omap_musb_board_data {
         u8      interface_type;
         u8      mode;
@@ -107,44 +89,6 @@ extern int omap4430_phy_init(struct device *dev);
 extern int omap4430_phy_exit(struct device *dev);
 extern int omap4430_phy_suspend(struct device *dev, int suspend);
 
-/*
- * NOTE: Please update omap USB drivers to use ioremap + read/write
- */
-
-#define OMAP2_L4_IO_OFFSET      0xb2000000
-#define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET)
-
-static inline u8 omap_readb(u32 pa)
-{
-        return __raw_readb(OMAP2_L4_IO_ADDRESS(pa));
-}
-
-static inline u16 omap_readw(u32 pa)
-{
-        return __raw_readw(OMAP2_L4_IO_ADDRESS(pa));
-}
-
-static inline u32 omap_readl(u32 pa)
-{
-        return __raw_readl(OMAP2_L4_IO_ADDRESS(pa));
-}
-
-static inline void omap_writeb(u8 v, u32 pa)
-{
-        __raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa));
-}
-
-
-static inline void omap_writew(u16 v, u32 pa)
-{
-        __raw_writew(v, OMAP2_L4_IO_ADDRESS(pa));
-}
-
-static inline void omap_writel(u32 v, u32 pa)
-{
-        __raw_writel(v, OMAP2_L4_IO_ADDRESS(pa));
-}
-
 #endif
 
 extern void am35x_musb_reset(void);
@@ -153,142 +97,6 @@ extern void am35x_musb_clear_irq(void);
 extern void am35x_set_mode(u8 musb_mode);
 extern void ti81xx_musb_phy_power(u8 on);
 
-/*
- * FIXME correct answer depends on hmc_mode,
- * as does (on omap1) any nonzero value for config->otg port number
- */
-#ifdef  CONFIG_USB_GADGET_OMAP
-#define is_usb0_device(config)  1
-#else
-#define is_usb0_device(config)  0
-#endif
-
-void omap_otg_init(struct omap_usb_config *config);
-
-#if defined(CONFIG_USB) || defined(CONFIG_USB_MODULE)
-void omap1_usb_init(struct omap_usb_config *pdata);
-#else
-static inline void omap1_usb_init(struct omap_usb_config *pdata)
-{
-}
-#endif
-
-#if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP_OTG_MODULE)
-void omap2_usbfs_init(struct omap_usb_config *pdata);
-#else
-static inline void omap2_usbfs_init(struct omap_usb_config *pdata)
-{
-}
-#endif
-
-/*-------------------------------------------------------------------------*/
-
-/*
- * OTG and transceiver registers, for OMAPs starting with ARM926
- */
-#define OTG_REV                         (OTG_BASE + 0x00)
-#define OTG_SYSCON_1                    (OTG_BASE + 0x04)
-#       define   USB2_TRX_MODE(w)       (((w)>>24)&0x07)
-#       define   USB1_TRX_MODE(w)       (((w)>>20)&0x07)
-#       define   USB0_TRX_MODE(w)       (((w)>>16)&0x07)
-#       define   OTG_IDLE_EN            (1 << 15)
-#       define   HST_IDLE_EN            (1 << 14)
-#       define   DEV_IDLE_EN            (1 << 13)
-#       define   OTG_RESET_DONE         (1 << 2)
-#       define   OTG_SOFT_RESET         (1 << 1)
-#define OTG_SYSCON_2                    (OTG_BASE + 0x08)
-#       define   OTG_EN                 (1 << 31)
-#       define   USBX_SYNCHRO           (1 << 30)
-#       define   OTG_MST16              (1 << 29)
-#       define   SRP_GPDATA             (1 << 28)
-#       define   SRP_GPDVBUS            (1 << 27)
-#       define   SRP_GPUVBUS(w)         (((w)>>24)&0x07)
-#       define   A_WAIT_VRISE(w)        (((w)>>20)&0x07)
-#       define   B_ASE_BRST(w)          (((w)>>16)&0x07)
-#       define   SRP_DPW                (1 << 14)
-#       define   SRP_DATA               (1 << 13)
-#       define   SRP_VBUS               (1 << 12)
-#       define   OTG_PADEN              (1 << 10)
-#       define   HMC_PADEN              (1 << 9)
-#       define   UHOST_EN               (1 << 8)
-#       define   HMC_TLLSPEED           (1 << 7)
-#       define   HMC_TLLATTACH          (1 << 6)
-#       define   OTG_HMC(w)             (((w)>>0)&0x3f)
-#define OTG_CTRL                        (OTG_BASE + 0x0c)
-#       define   OTG_USB2_EN            (1 << 29)
-#       define   OTG_USB2_DP            (1 << 28)
-#       define   OTG_USB2_DM            (1 << 27)
-#       define   OTG_USB1_EN            (1 << 26)
-#       define   OTG_USB1_DP            (1 << 25)
-#       define   OTG_USB1_DM            (1 << 24)
-#       define   OTG_USB0_EN            (1 << 23)
-#       define   OTG_USB0_DP            (1 << 22)
-#       define   OTG_USB0_DM            (1 << 21)
-#       define   OTG_ASESSVLD           (1 << 20)
-#       define   OTG_BSESSEND           (1 << 19)
-#       define   OTG_BSESSVLD           (1 << 18)
-#       define   OTG_VBUSVLD            (1 << 17)
-#       define   OTG_ID                 (1 << 16)
-#       define   OTG_DRIVER_SEL         (1 << 15)
-#       define   OTG_A_SETB_HNPEN       (1 << 12)
-#       define   OTG_A_BUSREQ           (1 << 11)
-#       define   OTG_B_HNPEN            (1 << 9)
-#       define   OTG_B_BUSREQ           (1 << 8)
-#       define   OTG_BUSDROP            (1 << 7)
-#       define   OTG_PULLDOWN           (1 << 5)
-#       define   OTG_PULLUP             (1 << 4)
-#       define   OTG_DRV_VBUS           (1 << 3)
-#       define   OTG_PD_VBUS            (1 << 2)
-#       define   OTG_PU_VBUS            (1 << 1)
-#       define   OTG_PU_ID              (1 << 0)
-#define OTG_IRQ_EN                      (OTG_BASE + 0x10)       /* 16-bit */
-#       define   DRIVER_SWITCH          (1 << 15)
-#       define   A_VBUS_ERR             (1 << 13)
-#       define   A_REQ_TMROUT           (1 << 12)
-#       define   A_SRP_DETECT           (1 << 11)
-#       define   B_HNP_FAIL             (1 << 10)
-#       define   B_SRP_TMROUT           (1 << 9)
-#       define   B_SRP_DONE             (1 << 8)
-#       define   B_SRP_STARTED          (1 << 7)
-#       define   OPRT_CHG               (1 << 0)
-#define OTG_IRQ_SRC                     (OTG_BASE + 0x14)       /* 16-bit */
-        // same bits as in IRQ_EN
-#define OTG_OUTCTRL                     (OTG_BASE + 0x18)       /* 16-bit */
-#       define   OTGVPD                 (1 << 14)
-#       define   OTGVPU                 (1 << 13)
-#       define   OTGPUID                (1 << 12)
-#       define   USB2VDR                (1 << 10)
-#       define   USB2PDEN               (1 << 9)
-#       define   USB2PUEN               (1 << 8)
-#       define   USB1VDR                (1 << 6)
-#       define   USB1PDEN               (1 << 5)
-#       define   USB1PUEN               (1 << 4)
-#       define   USB0VDR                (1 << 2)
-#       define   USB0PDEN               (1 << 1)
-#       define   USB0PUEN               (1 << 0)
-#define OTG_TEST                        (OTG_BASE + 0x20)       /* 16-bit */
-#define OTG_VENDOR_CODE                 (OTG_BASE + 0xfc)       /* 16-bit */
-
-/*-------------------------------------------------------------------------*/
-
-/* OMAP1 */
-#define USB_TRANSCEIVER_CTRL            (0xfffe1000 + 0x0064)
-#       define  CONF_USB2_UNI_R         (1 << 8)
-#       define  CONF_USB1_UNI_R         (1 << 7)
-#       define  CONF_USB_PORT0_R(x)     (((x)>>4)&0x7)
-#       define  CONF_USB0_ISOLATE_R     (1 << 3)
-#       define  CONF_USB_PWRDN_DM_R     (1 << 2)
-#       define  CONF_USB_PWRDN_DP_R     (1 << 1)
-
-/* OMAP2 */
-#       define  USB_UNIDIR                      0x0
-#       define  USB_UNIDIR_TLL                  0x1
-#       define  USB_BIDIR                       0x2
-#       define  USB_BIDIR_TLL                   0x3
-#       define  USBTXWRMODEI(port, x)   ((x) << (22 - (port * 2)))
-#       define  USBT2TLL5PI             (1 << 17)
-#       define  USB0PUENACTLOI          (1 << 16)
-#       define  USBSTANDBYCTRL          (1 << 15)
 /* AM35x */
 /* USB 2.0 PHY Control */
 #define CONF2_PHY_GPIOMODE      (1 << 23)
diff --git a/arch/arm/plat-omap/usb.c b/arch/arm/plat-omap/usb.c
deleted file mode 100644
index daa0327381b5..000000000000
--- a/arch/arm/plat-omap/usb.c
+++ /dev/null
@@ -1,145 +0,0 @@
- /*
- * arch/arm/plat-omap/usb.c -- platform level USB initialization
- *
- * Copyright (C) 2004 Texas Instruments, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- */
-
-#undef  DEBUG
-
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-
-#include <plat/usb.h>
-#include <plat/board.h>
-
-#include <mach/hardware.h>
-
-#ifdef  CONFIG_ARCH_OMAP_OTG
-
-void __init
-omap_otg_init(struct omap_usb_config *config)
-{
-        u32             syscon;
-        int             alt_pingroup = 0;
-
-        /* NOTE:  no bus or clock setup (yet?) */
-
-        syscon = omap_readl(OTG_SYSCON_1) & 0xffff;
-        if (!(syscon & OTG_RESET_DONE))
-                pr_debug("USB resets not complete?\n");
-
-        //omap_writew(0, OTG_IRQ_EN);
-
-        /* pin muxing and transceiver pinouts */
-        if (config->pins[0] > 2)        /* alt pingroup 2 */
-                alt_pingroup = 1;
-        syscon |= config->usb0_init(config->pins[0], is_usb0_device(config));
-        syscon |= config->usb1_init(config->pins[1]);
-        syscon |= config->usb2_init(config->pins[2], alt_pingroup);
-        pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
-        omap_writel(syscon, OTG_SYSCON_1);
-
-        syscon = config->hmc_mode;
-        syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */;
-#ifdef  CONFIG_USB_OTG
-        if (config->otg)
-                syscon |= OTG_EN;
-#endif
-        if (cpu_class_is_omap1())
-                pr_debug("USB_TRANSCEIVER_CTRL = %03x\n",
-                         omap_readl(USB_TRANSCEIVER_CTRL));
-        pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2));
-        omap_writel(syscon, OTG_SYSCON_2);
-
-        printk("USB: hmc %d", config->hmc_mode);
-        if (!alt_pingroup)
-                printk(", usb2 alt %d wires", config->pins[2]);
-        else if (config->pins[0])
-                printk(", usb0 %d wires%s", config->pins[0],
-                        is_usb0_device(config) ? " (dev)" : "");
-        if (config->pins[1])
-                printk(", usb1 %d wires", config->pins[1]);
-        if (!alt_pingroup && config->pins[2])
-                printk(", usb2 %d wires", config->pins[2]);
-        if (config->otg)
-                printk(", Mini-AB on usb%d", config->otg - 1);
-        printk("\n");
-
-        if (cpu_class_is_omap1()) {
-                u16 w;
-
-                /* leave USB clocks/controllers off until needed */
-                w = omap_readw(ULPD_SOFT_REQ);
-                w &= ~SOFT_USB_CLK_REQ;
-                omap_writew(w, ULPD_SOFT_REQ);
-
-                w = omap_readw(ULPD_CLOCK_CTRL);
-                w &= ~USB_MCLK_EN;
-                w |= DIS_USB_PVCI_CLK;
-                omap_writew(w, ULPD_CLOCK_CTRL);
-        }
-        syscon = omap_readl(OTG_SYSCON_1);
-        syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN;
-
-#ifdef  CONFIG_USB_GADGET_OMAP
-        if (config->otg || config->register_dev) {
-                struct platform_device *udc_device = config->udc_device;
-                int status;
-
-                syscon &= ~DEV_IDLE_EN;
-                udc_device->dev.platform_data = config;
-                status = platform_device_register(udc_device);
-                if (status)
-                        pr_debug("can't register UDC device, %d\n", status);
-        }
-#endif
-
-#if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
-        if (config->otg || config->register_host) {
-                struct platform_device *ohci_device = config->ohci_device;
-                int status;
-
-                syscon &= ~HST_IDLE_EN;
-                ohci_device->dev.platform_data = config;
-                status = platform_device_register(ohci_device);
-                if (status)
-                        pr_debug("can't register OHCI device, %d\n", status);
-        }
-#endif
-
-#ifdef  CONFIG_USB_OTG
-        if (config->otg) {
-                struct platform_device *otg_device = config->otg_device;
-                int status;
-
-                syscon &= ~OTG_IDLE_EN;
-                otg_device->dev.platform_data = config;
-                status = platform_device_register(otg_device);
-                if (status)
-                        pr_debug("can't register OTG device, %d\n", status);
-        }
-#endif
-        pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
-        omap_writel(syscon, OTG_SYSCON_1);
-}
-
-#else
-void omap_otg_init(struct omap_usb_config *config) {}
-#endif