diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-12-17 15:03:39 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-12-17 15:03:39 -0500 |
commit | cd4348339c21f4a15c01f3f120e92b3224a0a7da (patch) | |
tree | d45fe54ca6d9bc2182943633d6649a417c5de675 /arch/arm/plat-omap | |
parent | 7e1548a597ef7e26d5d62f8be3be6da9e101b26c (diff) | |
parent | 917fa280e5e99edcae44a34feab295a59922d16c (diff) |
Merge branch 'hsmmc-init' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 into devel
Diffstat (limited to 'arch/arm/plat-omap')
-rw-r--r-- | arch/arm/plat-omap/devices.c | 225 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/mach/board-h2.h | 6 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/mach/board.h | 22 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/mach/control.h | 17 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/mach/mmc.h | 74 |
5 files changed, 123 insertions, 221 deletions
diff --git a/arch/arm/plat-omap/devices.c b/arch/arm/plat-omap/devices.c index 0cb2b22388e9..ac15c23fd5da 100644 --- a/arch/arm/plat-omap/devices.c +++ b/arch/arm/plat-omap/devices.c | |||
@@ -192,202 +192,48 @@ void omap_mcbsp_register_board_cfg(struct omap_mcbsp_platform_data *config, | |||
192 | 192 | ||
193 | /*-------------------------------------------------------------------------*/ | 193 | /*-------------------------------------------------------------------------*/ |
194 | 194 | ||
195 | #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \ | 195 | #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \ |
196 | defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE) | 196 | defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE) |
197 | 197 | ||
198 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) | 198 | #define OMAP_MMC_NR_RES 2 |
199 | #define OMAP_MMC1_BASE 0x4809c000 | ||
200 | #define OMAP_MMC1_END (OMAP_MMC1_BASE + 0x1fc) | ||
201 | #define OMAP_MMC1_INT INT_24XX_MMC_IRQ | ||
202 | 199 | ||
203 | #define OMAP_MMC2_BASE 0x480b4000 | 200 | /* |
204 | #define OMAP_MMC2_END (OMAP_MMC2_BASE + 0x1fc) | 201 | * Register MMC devices. Called from mach-omap1 and mach-omap2 device init. |
205 | #define OMAP_MMC2_INT INT_24XX_MMC2_IRQ | 202 | */ |
206 | 203 | int __init omap_mmc_add(int id, unsigned long base, unsigned long size, | |
207 | #else | 204 | unsigned int irq, struct omap_mmc_platform_data *data) |
208 | |||
209 | #define OMAP_MMC1_BASE 0xfffb7800 | ||
210 | #define OMAP_MMC1_END (OMAP_MMC1_BASE + 0x7f) | ||
211 | #define OMAP_MMC1_INT INT_MMC | ||
212 | |||
213 | #define OMAP_MMC2_BASE 0xfffb7c00 /* omap16xx only */ | ||
214 | #define OMAP_MMC2_END (OMAP_MMC2_BASE + 0x7f) | ||
215 | #define OMAP_MMC2_INT INT_1610_MMC2 | ||
216 | |||
217 | #endif | ||
218 | |||
219 | static struct omap_mmc_platform_data mmc1_data; | ||
220 | |||
221 | static u64 mmc1_dmamask = 0xffffffff; | ||
222 | |||
223 | static struct resource mmc1_resources[] = { | ||
224 | { | ||
225 | .start = OMAP_MMC1_BASE, | ||
226 | .end = OMAP_MMC1_END, | ||
227 | .flags = IORESOURCE_MEM, | ||
228 | }, | ||
229 | { | ||
230 | .start = OMAP_MMC1_INT, | ||
231 | .flags = IORESOURCE_IRQ, | ||
232 | }, | ||
233 | }; | ||
234 | |||
235 | static struct platform_device mmc_omap_device1 = { | ||
236 | .name = "mmci-omap", | ||
237 | .id = 1, | ||
238 | .dev = { | ||
239 | .dma_mask = &mmc1_dmamask, | ||
240 | .platform_data = &mmc1_data, | ||
241 | }, | ||
242 | .num_resources = ARRAY_SIZE(mmc1_resources), | ||
243 | .resource = mmc1_resources, | ||
244 | }; | ||
245 | |||
246 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2430) || \ | ||
247 | defined(CONFIG_ARCH_OMAP34XX) | ||
248 | |||
249 | static struct omap_mmc_platform_data mmc2_data; | ||
250 | |||
251 | static u64 mmc2_dmamask = 0xffffffff; | ||
252 | |||
253 | static struct resource mmc2_resources[] = { | ||
254 | { | ||
255 | .start = OMAP_MMC2_BASE, | ||
256 | .end = OMAP_MMC2_END, | ||
257 | .flags = IORESOURCE_MEM, | ||
258 | }, | ||
259 | { | ||
260 | .start = OMAP_MMC2_INT, | ||
261 | .flags = IORESOURCE_IRQ, | ||
262 | }, | ||
263 | }; | ||
264 | |||
265 | static struct platform_device mmc_omap_device2 = { | ||
266 | .name = "mmci-omap", | ||
267 | .id = 2, | ||
268 | .dev = { | ||
269 | .dma_mask = &mmc2_dmamask, | ||
270 | .platform_data = &mmc2_data, | ||
271 | }, | ||
272 | .num_resources = ARRAY_SIZE(mmc2_resources), | ||
273 | .resource = mmc2_resources, | ||
274 | }; | ||
275 | #endif | ||
276 | |||
277 | static inline void omap_init_mmc_conf(const struct omap_mmc_config *mmc_conf) | ||
278 | { | ||
279 | if (cpu_is_omap2430() || cpu_is_omap34xx()) | ||
280 | return; | ||
281 | |||
282 | if (mmc_conf->mmc[0].enabled) { | ||
283 | if (cpu_is_omap24xx()) { | ||
284 | omap_cfg_reg(H18_24XX_MMC_CMD); | ||
285 | omap_cfg_reg(H15_24XX_MMC_CLKI); | ||
286 | omap_cfg_reg(G19_24XX_MMC_CLKO); | ||
287 | omap_cfg_reg(F20_24XX_MMC_DAT0); | ||
288 | omap_cfg_reg(F19_24XX_MMC_DAT_DIR0); | ||
289 | omap_cfg_reg(G18_24XX_MMC_CMD_DIR); | ||
290 | } else { | ||
291 | omap_cfg_reg(MMC_CMD); | ||
292 | omap_cfg_reg(MMC_CLK); | ||
293 | omap_cfg_reg(MMC_DAT0); | ||
294 | if (cpu_is_omap1710()) { | ||
295 | omap_cfg_reg(M15_1710_MMC_CLKI); | ||
296 | omap_cfg_reg(P19_1710_MMC_CMDDIR); | ||
297 | omap_cfg_reg(P20_1710_MMC_DATDIR0); | ||
298 | } | ||
299 | } | ||
300 | if (mmc_conf->mmc[0].wire4) { | ||
301 | if (cpu_is_omap24xx()) { | ||
302 | omap_cfg_reg(H14_24XX_MMC_DAT1); | ||
303 | omap_cfg_reg(E19_24XX_MMC_DAT2); | ||
304 | omap_cfg_reg(D19_24XX_MMC_DAT3); | ||
305 | omap_cfg_reg(E20_24XX_MMC_DAT_DIR1); | ||
306 | omap_cfg_reg(F18_24XX_MMC_DAT_DIR2); | ||
307 | omap_cfg_reg(E18_24XX_MMC_DAT_DIR3); | ||
308 | } else { | ||
309 | omap_cfg_reg(MMC_DAT1); | ||
310 | /* NOTE: DAT2 can be on W10 (here) or M15 */ | ||
311 | if (!mmc_conf->mmc[0].nomux) | ||
312 | omap_cfg_reg(MMC_DAT2); | ||
313 | omap_cfg_reg(MMC_DAT3); | ||
314 | } | ||
315 | } | ||
316 | } | ||
317 | |||
318 | #ifdef CONFIG_ARCH_OMAP16XX | ||
319 | /* block 2 is on newer chips, and has many pinout options */ | ||
320 | if (mmc_conf->mmc[1].enabled) { | ||
321 | if (!mmc_conf->mmc[1].nomux) { | ||
322 | omap_cfg_reg(Y8_1610_MMC2_CMD); | ||
323 | omap_cfg_reg(Y10_1610_MMC2_CLK); | ||
324 | omap_cfg_reg(R18_1610_MMC2_CLKIN); | ||
325 | omap_cfg_reg(W8_1610_MMC2_DAT0); | ||
326 | if (mmc_conf->mmc[1].wire4) { | ||
327 | omap_cfg_reg(V8_1610_MMC2_DAT1); | ||
328 | omap_cfg_reg(W15_1610_MMC2_DAT2); | ||
329 | omap_cfg_reg(R10_1610_MMC2_DAT3); | ||
330 | } | ||
331 | |||
332 | /* These are needed for the level shifter */ | ||
333 | omap_cfg_reg(V9_1610_MMC2_CMDDIR); | ||
334 | omap_cfg_reg(V5_1610_MMC2_DATDIR0); | ||
335 | omap_cfg_reg(W19_1610_MMC2_DATDIR1); | ||
336 | } | ||
337 | |||
338 | /* Feedback clock must be set on OMAP-1710 MMC2 */ | ||
339 | if (cpu_is_omap1710()) | ||
340 | omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24), | ||
341 | MOD_CONF_CTRL_1); | ||
342 | } | ||
343 | #endif | ||
344 | } | ||
345 | |||
346 | static void __init omap_init_mmc(void) | ||
347 | { | 205 | { |
348 | const struct omap_mmc_config *mmc_conf; | 206 | struct platform_device *pdev; |
349 | 207 | struct resource res[OMAP_MMC_NR_RES]; | |
350 | /* NOTE: assumes MMC was never (wrongly) enabled */ | 208 | int ret; |
351 | mmc_conf = omap_get_config(OMAP_TAG_MMC, struct omap_mmc_config); | 209 | |
352 | if (!mmc_conf) | 210 | pdev = platform_device_alloc("mmci-omap", id); |
353 | return; | 211 | if (!pdev) |
354 | 212 | return -ENOMEM; | |
355 | omap_init_mmc_conf(mmc_conf); | 213 | |
356 | 214 | memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource)); | |
357 | if (mmc_conf->mmc[0].enabled) { | 215 | res[0].start = base; |
358 | mmc1_data.conf = mmc_conf->mmc[0]; | 216 | res[0].end = base + size - 1; |
359 | (void) platform_device_register(&mmc_omap_device1); | 217 | res[0].flags = IORESOURCE_MEM; |
360 | } | 218 | res[1].start = res[1].end = irq; |
361 | 219 | res[1].flags = IORESOURCE_IRQ; | |
362 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2430) || \ | 220 | |
363 | defined(CONFIG_ARCH_OMAP34XX) | 221 | ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res)); |
364 | if (mmc_conf->mmc[1].enabled) { | 222 | if (ret == 0) |
365 | mmc2_data.conf = mmc_conf->mmc[1]; | 223 | ret = platform_device_add_data(pdev, data, sizeof(*data)); |
366 | (void) platform_device_register(&mmc_omap_device2); | 224 | if (ret) |
367 | } | 225 | goto fail; |
368 | #endif | 226 | |
369 | } | 227 | ret = platform_device_add(pdev); |
228 | if (ret) | ||
229 | goto fail; | ||
230 | return 0; | ||
370 | 231 | ||
371 | void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info) | 232 | fail: |
372 | { | 233 | platform_device_put(pdev); |
373 | switch (host) { | 234 | return ret; |
374 | case 1: | ||
375 | mmc1_data = *info; | ||
376 | break; | ||
377 | #if defined(CONFIG_ARCH_OMAP16XX) || defined(CONFIG_ARCH_OMAP2430) || \ | ||
378 | defined(CONFIG_ARCH_OMAP34XX) | ||
379 | case 2: | ||
380 | mmc2_data = *info; | ||
381 | break; | ||
382 | #endif | ||
383 | default: | ||
384 | BUG(); | ||
385 | } | ||
386 | } | 235 | } |
387 | 236 | ||
388 | #else | ||
389 | static inline void omap_init_mmc(void) {} | ||
390 | void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info) {} | ||
391 | #endif | 237 | #endif |
392 | 238 | ||
393 | /*-------------------------------------------------------------------------*/ | 239 | /*-------------------------------------------------------------------------*/ |
@@ -532,7 +378,6 @@ static int __init omap_init_devices(void) | |||
532 | */ | 378 | */ |
533 | omap_init_dsp(); | 379 | omap_init_dsp(); |
534 | omap_init_kp(); | 380 | omap_init_kp(); |
535 | omap_init_mmc(); | ||
536 | omap_init_uwire(); | 381 | omap_init_uwire(); |
537 | omap_init_wdt(); | 382 | omap_init_wdt(); |
538 | omap_init_rng(); | 383 | omap_init_rng(); |
diff --git a/arch/arm/plat-omap/include/mach/board-h2.h b/arch/arm/plat-omap/include/mach/board-h2.h index 2a050e9be65f..15531c8dc0e6 100644 --- a/arch/arm/plat-omap/include/mach/board-h2.h +++ b/arch/arm/plat-omap/include/mach/board-h2.h | |||
@@ -29,13 +29,13 @@ | |||
29 | #ifndef __ASM_ARCH_OMAP_H2_H | 29 | #ifndef __ASM_ARCH_OMAP_H2_H |
30 | #define __ASM_ARCH_OMAP_H2_H | 30 | #define __ASM_ARCH_OMAP_H2_H |
31 | 31 | ||
32 | /* Placeholder for H2 specific defines */ | ||
33 | |||
34 | /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ | 32 | /* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */ |
35 | #define OMAP1610_ETHR_START 0x04000300 | 33 | #define OMAP1610_ETHR_START 0x04000300 |
36 | 34 | ||
35 | #define H2_TPS_GPIO_BASE (OMAP_MAX_GPIO_LINES + 16 /* MPUIO */) | ||
36 | # define H2_TPS_GPIO_MMC_PWR_EN (H2_TPS_GPIO_BASE + 3) | ||
37 | |||
37 | extern void h2_mmc_init(void); | 38 | extern void h2_mmc_init(void); |
38 | extern void h2_mmc_slot_cover_handler(void *arg, int state); | ||
39 | 39 | ||
40 | #endif /* __ASM_ARCH_OMAP_H2_H */ | 40 | #endif /* __ASM_ARCH_OMAP_H2_H */ |
41 | 41 | ||
diff --git a/arch/arm/plat-omap/include/mach/board.h b/arch/arm/plat-omap/include/mach/board.h index c23c12ccb353..9466772fc7c8 100644 --- a/arch/arm/plat-omap/include/mach/board.h +++ b/arch/arm/plat-omap/include/mach/board.h | |||
@@ -16,7 +16,6 @@ | |||
16 | 16 | ||
17 | /* Different peripheral ids */ | 17 | /* Different peripheral ids */ |
18 | #define OMAP_TAG_CLOCK 0x4f01 | 18 | #define OMAP_TAG_CLOCK 0x4f01 |
19 | #define OMAP_TAG_MMC 0x4f02 | ||
20 | #define OMAP_TAG_SERIAL_CONSOLE 0x4f03 | 19 | #define OMAP_TAG_SERIAL_CONSOLE 0x4f03 |
21 | #define OMAP_TAG_USB 0x4f04 | 20 | #define OMAP_TAG_USB 0x4f04 |
22 | #define OMAP_TAG_LCD 0x4f05 | 21 | #define OMAP_TAG_LCD 0x4f05 |
@@ -35,27 +34,6 @@ struct omap_clock_config { | |||
35 | u8 system_clock_type; | 34 | u8 system_clock_type; |
36 | }; | 35 | }; |
37 | 36 | ||
38 | struct omap_mmc_conf { | ||
39 | unsigned enabled:1; | ||
40 | /* nomux means "standard" muxing is wrong on this board, and that | ||
41 | * board-specific code handled it before common init logic. | ||
42 | */ | ||
43 | unsigned nomux:1; | ||
44 | /* switch pin can be for card detect (default) or card cover */ | ||
45 | unsigned cover:1; | ||
46 | /* 4 wire signaling is optional, and is only used for SD/SDIO */ | ||
47 | unsigned wire4:1; | ||
48 | /* use the internal clock */ | ||
49 | unsigned internal_clock:1; | ||
50 | s16 power_pin; | ||
51 | s16 switch_pin; | ||
52 | s16 wp_pin; | ||
53 | }; | ||
54 | |||
55 | struct omap_mmc_config { | ||
56 | struct omap_mmc_conf mmc[2]; | ||
57 | }; | ||
58 | |||
59 | struct omap_serial_console_config { | 37 | struct omap_serial_console_config { |
60 | u8 console_uart; | 38 | u8 console_uart; |
61 | u32 console_speed; | 39 | u32 console_speed; |
diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h index dc9886760577..269147f3836f 100644 --- a/arch/arm/plat-omap/include/mach/control.h +++ b/arch/arm/plat-omap/include/mach/control.h | |||
@@ -74,6 +74,7 @@ | |||
74 | #define OMAP243X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) | 74 | #define OMAP243X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) |
75 | #define OMAP243X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) | 75 | #define OMAP243X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) |
76 | #define OMAP243X_CONTROL_IVA2_GEMCFG (OMAP2_CONTROL_GENERAL + 0x0198) | 76 | #define OMAP243X_CONTROL_IVA2_GEMCFG (OMAP2_CONTROL_GENERAL + 0x0198) |
77 | #define OMAP243X_CONTROL_PBIAS_LITE (OMAP2_CONTROL_GENERAL + 0x0230) | ||
77 | 78 | ||
78 | /* 24xx-only CONTROL_GENERAL register offsets */ | 79 | /* 24xx-only CONTROL_GENERAL register offsets */ |
79 | #define OMAP24XX_CONTROL_DEBOBS (OMAP2_CONTROL_GENERAL + 0x0000) | 80 | #define OMAP24XX_CONTROL_DEBOBS (OMAP2_CONTROL_GENERAL + 0x0000) |
@@ -140,6 +141,7 @@ | |||
140 | #define OMAP343X_CONTROL_TEST_KEY_13 (OMAP2_CONTROL_GENERAL + 0x00fc) | 141 | #define OMAP343X_CONTROL_TEST_KEY_13 (OMAP2_CONTROL_GENERAL + 0x00fc) |
141 | #define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) | 142 | #define OMAP343X_CONTROL_IVA2_BOOTADDR (OMAP2_CONTROL_GENERAL + 0x0190) |
142 | #define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) | 143 | #define OMAP343X_CONTROL_IVA2_BOOTMOD (OMAP2_CONTROL_GENERAL + 0x0194) |
144 | #define OMAP343X_CONTROL_PBIAS_LITE (OMAP2_CONTROL_GENERAL + 0x02b0) | ||
143 | #define OMAP343X_CONTROL_TEMP_SENSOR (OMAP2_CONTROL_GENERAL + 0x02b4) | 145 | #define OMAP343X_CONTROL_TEMP_SENSOR (OMAP2_CONTROL_GENERAL + 0x02b4) |
144 | 146 | ||
145 | /* | 147 | /* |
@@ -154,11 +156,14 @@ | |||
154 | * and the security mode (secure, non-secure, don't care) | 156 | * and the security mode (secure, non-secure, don't care) |
155 | */ | 157 | */ |
156 | /* CONTROL_DEVCONF0 bits */ | 158 | /* CONTROL_DEVCONF0 bits */ |
159 | #define OMAP2_MMCSDIO1ADPCLKISEL (1 << 24) /* MMC1 loop back clock */ | ||
157 | #define OMAP24XX_USBSTANDBYCTRL (1 << 15) | 160 | #define OMAP24XX_USBSTANDBYCTRL (1 << 15) |
158 | #define OMAP2_MCBSP2_CLKS_MASK (1 << 6) | 161 | #define OMAP2_MCBSP2_CLKS_MASK (1 << 6) |
159 | #define OMAP2_MCBSP1_CLKS_MASK (1 << 2) | 162 | #define OMAP2_MCBSP1_CLKS_MASK (1 << 2) |
160 | 163 | ||
161 | /* CONTROL_DEVCONF1 bits */ | 164 | /* CONTROL_DEVCONF1 bits */ |
165 | #define OMAP243X_MMC1_ACTIVE_OVERWRITE (1 << 31) | ||
166 | #define OMAP2_MMCSDIO2ADPCLKISEL (1 << 6) /* MMC2 loop back clock */ | ||
162 | #define OMAP2_MCBSP5_CLKS_MASK (1 << 4) /* > 242x */ | 167 | #define OMAP2_MCBSP5_CLKS_MASK (1 << 4) /* > 242x */ |
163 | #define OMAP2_MCBSP4_CLKS_MASK (1 << 2) /* > 242x */ | 168 | #define OMAP2_MCBSP4_CLKS_MASK (1 << 2) /* > 242x */ |
164 | #define OMAP2_MCBSP3_CLKS_MASK (1 << 0) /* > 242x */ | 169 | #define OMAP2_MCBSP3_CLKS_MASK (1 << 0) /* > 242x */ |
@@ -172,6 +177,18 @@ | |||
172 | #define OMAP2_SYSBOOT_1_MASK (1 << 1) | 177 | #define OMAP2_SYSBOOT_1_MASK (1 << 1) |
173 | #define OMAP2_SYSBOOT_0_MASK (1 << 0) | 178 | #define OMAP2_SYSBOOT_0_MASK (1 << 0) |
174 | 179 | ||
180 | /* CONTROL_PBIAS_LITE bits */ | ||
181 | #define OMAP343X_PBIASLITESUPPLY_HIGH1 (1 << 15) | ||
182 | #define OMAP343X_PBIASLITEVMODEERROR1 (1 << 11) | ||
183 | #define OMAP343X_PBIASSPEEDCTRL1 (1 << 10) | ||
184 | #define OMAP343X_PBIASLITEPWRDNZ1 (1 << 9) | ||
185 | #define OMAP343X_PBIASLITEVMODE1 (1 << 8) | ||
186 | #define OMAP343X_PBIASLITESUPPLY_HIGH0 (1 << 7) | ||
187 | #define OMAP343X_PBIASLITEVMODEERROR0 (1 << 3) | ||
188 | #define OMAP2_PBIASSPEEDCTRL0 (1 << 2) | ||
189 | #define OMAP2_PBIASLITEPWRDNZ0 (1 << 1) | ||
190 | #define OMAP2_PBIASLITEVMODE0 (1 << 0) | ||
191 | |||
175 | #ifndef __ASSEMBLY__ | 192 | #ifndef __ASSEMBLY__ |
176 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) | 193 | #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) |
177 | extern void __iomem *omap_ctrl_base_get(void); | 194 | extern void __iomem *omap_ctrl_base_get(void); |
diff --git a/arch/arm/plat-omap/include/mach/mmc.h b/arch/arm/plat-omap/include/mach/mmc.h index fc15d13058fc..031250f02805 100644 --- a/arch/arm/plat-omap/include/mach/mmc.h +++ b/arch/arm/plat-omap/include/mach/mmc.h | |||
@@ -17,12 +17,28 @@ | |||
17 | 17 | ||
18 | #include <mach/board.h> | 18 | #include <mach/board.h> |
19 | 19 | ||
20 | #define OMAP15XX_NR_MMC 1 | ||
21 | #define OMAP16XX_NR_MMC 2 | ||
22 | #define OMAP1_MMC_SIZE 0x080 | ||
23 | #define OMAP1_MMC1_BASE 0xfffb7800 | ||
24 | #define OMAP1_MMC2_BASE 0xfffb7c00 /* omap16xx only */ | ||
25 | |||
26 | #define OMAP24XX_NR_MMC 2 | ||
27 | #define OMAP34XX_NR_MMC 3 | ||
28 | #define OMAP2420_MMC_SIZE OMAP1_MMC_SIZE | ||
29 | #define HSMMC_SIZE 0x200 | ||
30 | #define OMAP2_MMC1_BASE 0x4809c000 | ||
31 | #define OMAP2_MMC2_BASE 0x480b4000 | ||
32 | #define OMAP3_MMC3_BASE 0x480ad000 | ||
33 | #define HSMMC3 (1 << 2) | ||
34 | #define HSMMC2 (1 << 1) | ||
35 | #define HSMMC1 (1 << 0) | ||
36 | |||
20 | #define OMAP_MMC_MAX_SLOTS 2 | 37 | #define OMAP_MMC_MAX_SLOTS 2 |
21 | 38 | ||
22 | struct omap_mmc_platform_data { | 39 | struct omap_mmc_platform_data { |
23 | struct omap_mmc_conf conf; | ||
24 | 40 | ||
25 | /* number of slots on board */ | 41 | /* number of slots per controller */ |
26 | unsigned nr_slots:2; | 42 | unsigned nr_slots:2; |
27 | 43 | ||
28 | /* set if your board has components or wiring that limits the | 44 | /* set if your board has components or wiring that limits the |
@@ -41,7 +57,31 @@ struct omap_mmc_platform_data { | |||
41 | int (*suspend)(struct device *dev, int slot); | 57 | int (*suspend)(struct device *dev, int slot); |
42 | int (*resume)(struct device *dev, int slot); | 58 | int (*resume)(struct device *dev, int slot); |
43 | 59 | ||
60 | u64 dma_mask; | ||
61 | |||
44 | struct omap_mmc_slot_data { | 62 | struct omap_mmc_slot_data { |
63 | |||
64 | /* 4 wire signaling is optional, and is used for SD/SDIO/HSMMC; | ||
65 | * 8 wire signaling is also optional, and is used with HSMMC | ||
66 | */ | ||
67 | u8 wires; | ||
68 | |||
69 | /* | ||
70 | * nomux means "standard" muxing is wrong on this board, and | ||
71 | * that board-specific code handled it before common init logic. | ||
72 | */ | ||
73 | unsigned nomux:1; | ||
74 | |||
75 | /* switch pin can be for card detect (default) or card cover */ | ||
76 | unsigned cover:1; | ||
77 | |||
78 | /* use the internal clock */ | ||
79 | unsigned internal_clock:1; | ||
80 | s16 power_pin; | ||
81 | |||
82 | int switch_pin; /* gpio (card detect) */ | ||
83 | int gpio_wp; /* gpio (write protect) */ | ||
84 | |||
45 | int (* set_bus_mode)(struct device *dev, int slot, int bus_mode); | 85 | int (* set_bus_mode)(struct device *dev, int slot, int bus_mode); |
46 | int (* set_power)(struct device *dev, int slot, int power_on, int vdd); | 86 | int (* set_power)(struct device *dev, int slot, int power_on, int vdd); |
47 | int (* get_ro)(struct device *dev, int slot); | 87 | int (* get_ro)(struct device *dev, int slot); |
@@ -49,8 +89,8 @@ struct omap_mmc_platform_data { | |||
49 | /* return MMC cover switch state, can be NULL if not supported. | 89 | /* return MMC cover switch state, can be NULL if not supported. |
50 | * | 90 | * |
51 | * possible return values: | 91 | * possible return values: |
52 | * 0 - open | 92 | * 0 - closed |
53 | * 1 - closed | 93 | * 1 - open |
54 | */ | 94 | */ |
55 | int (* get_cover_state)(struct device *dev, int slot); | 95 | int (* get_cover_state)(struct device *dev, int slot); |
56 | 96 | ||
@@ -66,9 +106,31 @@ struct omap_mmc_platform_data { | |||
66 | } slots[OMAP_MMC_MAX_SLOTS]; | 106 | } slots[OMAP_MMC_MAX_SLOTS]; |
67 | }; | 107 | }; |
68 | 108 | ||
69 | extern void omap_set_mmc_info(int host, const struct omap_mmc_platform_data *info); | ||
70 | |||
71 | /* called from board-specific card detection service routine */ | 109 | /* called from board-specific card detection service routine */ |
72 | extern void omap_mmc_notify_cover_event(struct device *dev, int slot, int is_closed); | 110 | extern void omap_mmc_notify_cover_event(struct device *dev, int slot, int is_closed); |
73 | 111 | ||
112 | #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \ | ||
113 | defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE) | ||
114 | void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, | ||
115 | int nr_controllers); | ||
116 | void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, | ||
117 | int nr_controllers); | ||
118 | int omap_mmc_add(int id, unsigned long base, unsigned long size, | ||
119 | unsigned int irq, struct omap_mmc_platform_data *data); | ||
120 | #else | ||
121 | static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, | ||
122 | int nr_controllers) | ||
123 | { | ||
124 | } | ||
125 | static inline void omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, | ||
126 | int nr_controllers) | ||
127 | { | ||
128 | } | ||
129 | static inline int omap_mmc_add(int id, unsigned long base, unsigned long size, | ||
130 | unsigned int irq, struct omap_mmc_platform_data *data) | ||
131 | { | ||
132 | return 0; | ||
133 | } | ||
134 | |||
135 | #endif | ||
74 | #endif | 136 | #endif |