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authorTony Lindgren <tony@atomide.com>2009-05-28 18:41:03 -0400
committerTony Lindgren <tony@atomide.com>2009-05-28 18:41:03 -0400
commitc81592ba1b012d555d0cb7ec711afda89c327469 (patch)
tree44e36c4785fc6169b971922097d7b3941101b3e1 /arch/arm/plat-omap
parentc912f7e1eae169aaca333b4c5da3f36c98f2ccb0 (diff)
parent088962c243db42b9c608f30be3e3a05a5b696895 (diff)
Merge branch 'omap-upstream' into for-next
Conflicts: arch/arm/mach-omap2/Makefile
Diffstat (limited to 'arch/arm/plat-omap')
-rw-r--r--arch/arm/plat-omap/dma.c79
-rw-r--r--arch/arm/plat-omap/i2c.c2
-rw-r--r--arch/arm/plat-omap/include/mach/dma.h3
-rw-r--r--arch/arm/plat-omap/include/mach/gpmc-smc91x.h42
-rw-r--r--arch/arm/plat-omap/include/mach/hwa742.h4
-rw-r--r--arch/arm/plat-omap/include/mach/onenand.h22
-rw-r--r--arch/arm/plat-omap/include/mach/vmalloc.h2
-rw-r--r--arch/arm/plat-omap/mcbsp.c30
-rw-r--r--arch/arm/plat-omap/sram.c4
9 files changed, 142 insertions, 46 deletions
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 7fc8c045ad5d..06e9cbe8b8eb 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -310,41 +310,62 @@ EXPORT_SYMBOL(omap_set_dma_transfer_params);
310 310
311void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, u32 color) 311void omap_set_dma_color_mode(int lch, enum omap_dma_color_mode mode, u32 color)
312{ 312{
313 u16 w;
314
315 BUG_ON(omap_dma_in_1510_mode()); 313 BUG_ON(omap_dma_in_1510_mode());
316 314
317 if (cpu_class_is_omap2()) { 315 if (cpu_class_is_omap1()) {
318 REVISIT_24XX(); 316 u16 w;
319 return;
320 }
321 317
322 w = dma_read(CCR2(lch)); 318 w = dma_read(CCR2(lch));
323 w &= ~0x03; 319 w &= ~0x03;
324 320
325 switch (mode) { 321 switch (mode) {
326 case OMAP_DMA_CONSTANT_FILL: 322 case OMAP_DMA_CONSTANT_FILL:
327 w |= 0x01; 323 w |= 0x01;
328 break; 324 break;
329 case OMAP_DMA_TRANSPARENT_COPY: 325 case OMAP_DMA_TRANSPARENT_COPY:
330 w |= 0x02; 326 w |= 0x02;
331 break; 327 break;
332 case OMAP_DMA_COLOR_DIS: 328 case OMAP_DMA_COLOR_DIS:
333 break; 329 break;
334 default: 330 default:
335 BUG(); 331 BUG();
332 }
333 dma_write(w, CCR2(lch));
334
335 w = dma_read(LCH_CTRL(lch));
336 w &= ~0x0f;
337 /* Default is channel type 2D */
338 if (mode) {
339 dma_write((u16)color, COLOR_L(lch));
340 dma_write((u16)(color >> 16), COLOR_U(lch));
341 w |= 1; /* Channel type G */
342 }
343 dma_write(w, LCH_CTRL(lch));
336 } 344 }
337 dma_write(w, CCR2(lch));
338 345
339 w = dma_read(LCH_CTRL(lch)); 346 if (cpu_class_is_omap2()) {
340 w &= ~0x0f; 347 u32 val;
341 /* Default is channel type 2D */ 348
342 if (mode) { 349 val = dma_read(CCR(lch));
343 dma_write((u16)color, COLOR_L(lch)); 350 val &= ~((1 << 17) | (1 << 16));
344 dma_write((u16)(color >> 16), COLOR_U(lch)); 351
345 w |= 1; /* Channel type G */ 352 switch (mode) {
353 case OMAP_DMA_CONSTANT_FILL:
354 val |= 1 << 16;
355 break;
356 case OMAP_DMA_TRANSPARENT_COPY:
357 val |= 1 << 17;
358 break;
359 case OMAP_DMA_COLOR_DIS:
360 break;
361 default:
362 BUG();
363 }
364 dma_write(val, CCR(lch));
365
366 color &= 0xffffff;
367 dma_write(color, COLOR(lch));
346 } 368 }
347 dma_write(w, LCH_CTRL(lch));
348} 369}
349EXPORT_SYMBOL(omap_set_dma_color_mode); 370EXPORT_SYMBOL(omap_set_dma_color_mode);
350 371
@@ -1199,7 +1220,7 @@ static void create_dma_lch_chain(int lch_head, int lch_queue)
1199 * Failure: -EINVAL/-ENOMEM 1220 * Failure: -EINVAL/-ENOMEM
1200 */ 1221 */
1201int omap_request_dma_chain(int dev_id, const char *dev_name, 1222int omap_request_dma_chain(int dev_id, const char *dev_name,
1202 void (*callback) (int chain_id, u16 ch_status, 1223 void (*callback) (int lch, u16 ch_status,
1203 void *data), 1224 void *data),
1204 int *chain_id, int no_of_chans, int chain_mode, 1225 int *chain_id, int no_of_chans, int chain_mode,
1205 struct omap_dma_channel_params params) 1226 struct omap_dma_channel_params params)
diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index a303071d5e36..8b848391f0c8 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -5,7 +5,7 @@
5 * 5 *
6 * Copyright (C) 2007 Nokia Corporation. 6 * Copyright (C) 2007 Nokia Corporation.
7 * 7 *
8 * Contact: Jarkko Nikula <jarkko.nikula@nokia.com> 8 * Contact: Jarkko Nikula <jhnikula@gmail.com>
9 * 9 *
10 * This program is free software; you can redistribute it and/or 10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License 11 * modify it under the terms of the GNU General Public License
diff --git a/arch/arm/plat-omap/include/mach/dma.h b/arch/arm/plat-omap/include/mach/dma.h
index 54fe9665b182..19df76f97ab3 100644
--- a/arch/arm/plat-omap/include/mach/dma.h
+++ b/arch/arm/plat-omap/include/mach/dma.h
@@ -144,6 +144,7 @@
144#define OMAP_DMA4_CSSA_U(n) 0 144#define OMAP_DMA4_CSSA_U(n) 0
145#define OMAP_DMA4_CDSA_L(n) 0 145#define OMAP_DMA4_CDSA_L(n) 0
146#define OMAP_DMA4_CDSA_U(n) 0 146#define OMAP_DMA4_CDSA_U(n) 0
147#define OMAP1_DMA_COLOR(n) 0
147 148
148/*----------------------------------------------------------------------------*/ 149/*----------------------------------------------------------------------------*/
149 150
@@ -531,7 +532,7 @@ extern int omap_get_dma_index(int lch, int *ei, int *fi);
531/* Chaining APIs */ 532/* Chaining APIs */
532#ifndef CONFIG_ARCH_OMAP1 533#ifndef CONFIG_ARCH_OMAP1
533extern int omap_request_dma_chain(int dev_id, const char *dev_name, 534extern int omap_request_dma_chain(int dev_id, const char *dev_name,
534 void (*callback) (int chain_id, u16 ch_status, 535 void (*callback) (int lch, u16 ch_status,
535 void *data), 536 void *data),
536 int *chain_id, int no_of_chans, 537 int *chain_id, int no_of_chans,
537 int chain_mode, 538 int chain_mode,
diff --git a/arch/arm/plat-omap/include/mach/gpmc-smc91x.h b/arch/arm/plat-omap/include/mach/gpmc-smc91x.h
new file mode 100644
index 000000000000..b64fbee4d567
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/gpmc-smc91x.h
@@ -0,0 +1,42 @@
1/*
2 * arch/arm/plat-omap/include/mach/gpmc-smc91x.h
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_OMAP_GPMC_SMC91X_H__
12
13#define GPMC_TIMINGS_SMC91C96 (1 << 4)
14#define GPMC_MUX_ADD_DATA (1 << 5) /* GPMC_CONFIG1_MUXADDDATA */
15#define GPMC_READ_MON (1 << 6) /* GPMC_CONFIG1_WAIT_READ_MON */
16#define GPMC_WRITE_MON (1 << 7) /* GPMC_CONFIG1_WAIT_WRITE_MON */
17
18struct omap_smc91x_platform_data {
19 int cs;
20 int gpio_irq;
21 int gpio_pwrdwn;
22 int gpio_reset;
23 int wait_pin; /* Optional GPMC_CONFIG1_WAITPINSELECT */
24 u32 flags;
25 int (*retime)(void);
26};
27
28#if defined(CONFIG_SMC91X) || \
29 defined(CONFIG_SMC91X_MODULE)
30
31extern void gpmc_smc91x_init(struct omap_smc91x_platform_data *d);
32
33#else
34
35#define board_smc91x_data NULL
36
37static inline void gpmc_smc91x_init(struct omap_smc91x_platform_data *d)
38{
39}
40
41#endif
42#endif
diff --git a/arch/arm/plat-omap/include/mach/hwa742.h b/arch/arm/plat-omap/include/mach/hwa742.h
index 577f492f2d3c..886248d32b49 100644
--- a/arch/arm/plat-omap/include/mach/hwa742.h
+++ b/arch/arm/plat-omap/include/mach/hwa742.h
@@ -2,10 +2,6 @@
2#define _HWA742_H 2#define _HWA742_H
3 3
4struct hwa742_platform_data { 4struct hwa742_platform_data {
5 void (*power_up)(struct device *dev);
6 void (*power_down)(struct device *dev);
7 unsigned long (*get_clock_rate)(struct device *dev);
8
9 unsigned te_connected:1; 5 unsigned te_connected:1;
10}; 6};
11 7
diff --git a/arch/arm/plat-omap/include/mach/onenand.h b/arch/arm/plat-omap/include/mach/onenand.h
index 4649d302c263..72f433d7d827 100644
--- a/arch/arm/plat-omap/include/mach/onenand.h
+++ b/arch/arm/plat-omap/include/mach/onenand.h
@@ -9,8 +9,12 @@
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10 */ 10 */
11 11
12#include <linux/mtd/mtd.h>
12#include <linux/mtd/partitions.h> 13#include <linux/mtd/partitions.h>
13 14
15#define ONENAND_SYNC_READ (1 << 0)
16#define ONENAND_SYNC_READWRITE (1 << 1)
17
14struct omap_onenand_platform_data { 18struct omap_onenand_platform_data {
15 int cs; 19 int cs;
16 int gpio_irq; 20 int gpio_irq;
@@ -18,8 +22,22 @@ struct omap_onenand_platform_data {
18 int nr_parts; 22 int nr_parts;
19 int (*onenand_setup)(void __iomem *, int freq); 23 int (*onenand_setup)(void __iomem *, int freq);
20 int dma_channel; 24 int dma_channel;
25 u8 flags;
21}; 26};
22 27
23int omap2_onenand_rephase(void);
24
25#define ONENAND_MAX_PARTITIONS 8 28#define ONENAND_MAX_PARTITIONS 8
29
30#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
31 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
32
33extern void gpmc_onenand_init(struct omap_onenand_platform_data *d);
34
35#else
36
37#define board_onenand_data NULL
38
39static inline void gpmc_onenand_init(struct omap_onenand_platform_data *d)
40{
41}
42
43#endif
diff --git a/arch/arm/plat-omap/include/mach/vmalloc.h b/arch/arm/plat-omap/include/mach/vmalloc.h
index dc104cd96197..b97dfafeebda 100644
--- a/arch/arm/plat-omap/include/mach/vmalloc.h
+++ b/arch/arm/plat-omap/include/mach/vmalloc.h
@@ -17,5 +17,5 @@
17 * along with this program; if not, write to the Free Software 17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 19 */
20#define VMALLOC_END (PAGE_OFFSET + 0x10000000) 20#define VMALLOC_END (PAGE_OFFSET + 0x18000000)
21 21
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 28b0a824b8cf..efa0e0111f38 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -91,11 +91,20 @@ static void omap_mcbsp_dump_reg(u8 id)
91static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id) 91static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
92{ 92{
93 struct omap_mcbsp *mcbsp_tx = dev_id; 93 struct omap_mcbsp *mcbsp_tx = dev_id;
94 u16 irqst_spcr2;
94 95
95 dev_dbg(mcbsp_tx->dev, "TX IRQ callback : 0x%x\n", 96 irqst_spcr2 = OMAP_MCBSP_READ(mcbsp_tx->io_base, SPCR2);
96 OMAP_MCBSP_READ(mcbsp_tx->io_base, SPCR2)); 97 dev_dbg(mcbsp_tx->dev, "TX IRQ callback : 0x%x\n", irqst_spcr2);
97 98
98 complete(&mcbsp_tx->tx_irq_completion); 99 if (irqst_spcr2 & XSYNC_ERR) {
100 dev_err(mcbsp_tx->dev, "TX Frame Sync Error! : 0x%x\n",
101 irqst_spcr2);
102 /* Writing zero to XSYNC_ERR clears the IRQ */
103 OMAP_MCBSP_WRITE(mcbsp_tx->io_base, SPCR2,
104 irqst_spcr2 & ~(XSYNC_ERR));
105 } else {
106 complete(&mcbsp_tx->tx_irq_completion);
107 }
99 108
100 return IRQ_HANDLED; 109 return IRQ_HANDLED;
101} 110}
@@ -103,11 +112,20 @@ static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id)
103static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id) 112static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id)
104{ 113{
105 struct omap_mcbsp *mcbsp_rx = dev_id; 114 struct omap_mcbsp *mcbsp_rx = dev_id;
115 u16 irqst_spcr1;
106 116
107 dev_dbg(mcbsp_rx->dev, "RX IRQ callback : 0x%x\n", 117 irqst_spcr1 = OMAP_MCBSP_READ(mcbsp_rx->io_base, SPCR1);
108 OMAP_MCBSP_READ(mcbsp_rx->io_base, SPCR2)); 118 dev_dbg(mcbsp_rx->dev, "RX IRQ callback : 0x%x\n", irqst_spcr1);
109 119
110 complete(&mcbsp_rx->rx_irq_completion); 120 if (irqst_spcr1 & RSYNC_ERR) {
121 dev_err(mcbsp_rx->dev, "RX Frame Sync Error! : 0x%x\n",
122 irqst_spcr1);
123 /* Writing zero to RSYNC_ERR clears the IRQ */
124 OMAP_MCBSP_WRITE(mcbsp_rx->io_base, SPCR1,
125 irqst_spcr1 & ~(RSYNC_ERR));
126 } else {
127 complete(&mcbsp_rx->tx_irq_completion);
128 }
111 129
112 return IRQ_HANDLED; 130 return IRQ_HANDLED;
113} 131}
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 4f0145d26246..bd44d1a9df9c 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -38,8 +38,8 @@
38#define OMAP1_SRAM_VA VMALLOC_END 38#define OMAP1_SRAM_VA VMALLOC_END
39#define OMAP2_SRAM_PA 0x40200000 39#define OMAP2_SRAM_PA 0x40200000
40#define OMAP2_SRAM_PUB_PA 0x4020f800 40#define OMAP2_SRAM_PUB_PA 0x4020f800
41#define OMAP2_SRAM_VA VMALLOC_END 41#define OMAP2_SRAM_VA 0xe3000000
42#define OMAP2_SRAM_PUB_VA (VMALLOC_END + 0x800) 42#define OMAP2_SRAM_PUB_VA (OMAP2_SRAM_VA + 0x800)
43#define OMAP3_SRAM_PA 0x40200000 43#define OMAP3_SRAM_PA 0x40200000
44#define OMAP3_SRAM_VA 0xd7000000 44#define OMAP3_SRAM_VA 0xd7000000
45#define OMAP3_SRAM_PUB_PA 0x40208000 45#define OMAP3_SRAM_PUB_PA 0x40208000