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authorDavid Brownell <dbrownell@users.sourceforge.net>2008-12-10 20:35:27 -0500
committerTony Lindgren <tony@atomide.com>2008-12-10 20:35:27 -0500
commite031ab23deb5a5d9ac5744e69a0627823e81b074 (patch)
tree333b33349da9ca3493bf80df6bdcce79b09503cd /arch/arm/plat-omap
parent3ff164e15574191c69e8406794b0578c8d2a4e23 (diff)
ARM: OMAP: minor gpio bugfixes
Minor GPIO fixes: - If get_gpio_bank() fails, then BUG() out. - In omap_set_gpio_debounce(): * protect the read/modify/write with the relevant spinlock * make the omap3 clock ops pass "sparse" checking Except for the spinlock problem, these were reported through "make". Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/plat-omap')
-rw-r--r--arch/arm/plat-omap/gpio.c20
1 files changed, 15 insertions, 5 deletions
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index e8aae2ac2a00..07b6968a7d16 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -245,6 +245,8 @@ static inline struct gpio_bank *get_gpio_bank(int gpio)
245 return &gpio_bank[gpio >> 5]; 245 return &gpio_bank[gpio >> 5];
246 if (cpu_is_omap34xx()) 246 if (cpu_is_omap34xx())
247 return &gpio_bank[gpio >> 5]; 247 return &gpio_bank[gpio >> 5];
248 BUG();
249 return NULL;
248} 250}
249 251
250static inline int get_gpio_index(int gpio) 252static inline int get_gpio_index(int gpio)
@@ -448,6 +450,7 @@ void omap_set_gpio_debounce(int gpio, int enable)
448{ 450{
449 struct gpio_bank *bank; 451 struct gpio_bank *bank;
450 void __iomem *reg; 452 void __iomem *reg;
453 unsigned long flags;
451 u32 val, l = 1 << get_gpio_index(gpio); 454 u32 val, l = 1 << get_gpio_index(gpio);
452 455
453 if (cpu_class_is_omap1()) 456 if (cpu_class_is_omap1())
@@ -455,21 +458,28 @@ void omap_set_gpio_debounce(int gpio, int enable)
455 458
456 bank = get_gpio_bank(gpio); 459 bank = get_gpio_bank(gpio);
457 reg = bank->base; 460 reg = bank->base;
458
459 reg += OMAP24XX_GPIO_DEBOUNCE_EN; 461 reg += OMAP24XX_GPIO_DEBOUNCE_EN;
462
463 spin_lock_irqsave(&bank->lock, flags);
460 val = __raw_readl(reg); 464 val = __raw_readl(reg);
461 465
462 if (enable && !(val & l)) 466 if (enable && !(val & l))
463 val |= l; 467 val |= l;
464 else if (!enable && val & l) 468 else if (!enable && (val & l))
465 val &= ~l; 469 val &= ~l;
466 else 470 else
467 return; 471 goto done;
468 472
469 if (cpu_is_omap34xx()) 473 if (cpu_is_omap34xx()) {
470 enable ? clk_enable(bank->dbck) : clk_disable(bank->dbck); 474 if (enable)
475 clk_enable(bank->dbck);
476 else
477 clk_disable(bank->dbck);
478 }
471 479
472 __raw_writel(val, reg); 480 __raw_writel(val, reg);
481done:
482 spin_unlock_irqrestore(&bank->lock, flags);
473} 483}
474EXPORT_SYMBOL(omap_set_gpio_debounce); 484EXPORT_SYMBOL(omap_set_gpio_debounce);
475 485