diff options
author | Afzal Mohammed <afzal@ti.com> | 2012-09-29 08:34:58 -0400 |
---|---|---|
committer | Afzal Mohammed <afzal@ti.com> | 2012-10-15 05:12:13 -0400 |
commit | c46406a3f28e4bc2139415db385b91ae756009c1 (patch) | |
tree | d1f962c0f6c5d6e30018d8f931a8b41643dd7433 /arch/arm/plat-omap | |
parent | 2ef9f3ddec55f1b77615613d4aab418f073220bb (diff) |
ARM: OMAP2+: gpmc: remove exported nand functions
nand driver handles gpmc-nand block fully, hence no more
users for these exported nand functions, remove it.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Diffstat (limited to 'arch/arm/plat-omap')
-rw-r--r-- | arch/arm/plat-omap/include/plat/gpmc.h | 31 |
1 files changed, 0 insertions, 31 deletions
diff --git a/arch/arm/plat-omap/include/plat/gpmc.h b/arch/arm/plat-omap/include/plat/gpmc.h index 4b06bb4531a2..79f4dfc2adb3 100644 --- a/arch/arm/plat-omap/include/plat/gpmc.h +++ b/arch/arm/plat-omap/include/plat/gpmc.h | |||
@@ -34,15 +34,6 @@ | |||
34 | #define GPMC_SET_IRQ_STATUS 0x00000004 | 34 | #define GPMC_SET_IRQ_STATUS 0x00000004 |
35 | #define GPMC_CONFIG_WP 0x00000005 | 35 | #define GPMC_CONFIG_WP 0x00000005 |
36 | 36 | ||
37 | #define GPMC_GET_IRQ_STATUS 0x00000006 | ||
38 | #define GPMC_PREFETCH_FIFO_CNT 0x00000007 /* bytes available in FIFO for r/w */ | ||
39 | #define GPMC_PREFETCH_COUNT 0x00000008 /* remaining bytes to be read/write*/ | ||
40 | #define GPMC_STATUS_BUFFER 0x00000009 /* 1: buffer is available to write */ | ||
41 | |||
42 | #define GPMC_NAND_COMMAND 0x0000000a | ||
43 | #define GPMC_NAND_ADDRESS 0x0000000b | ||
44 | #define GPMC_NAND_DATA 0x0000000c | ||
45 | |||
46 | #define GPMC_ENABLE_IRQ 0x0000000d | 37 | #define GPMC_ENABLE_IRQ 0x0000000d |
47 | 38 | ||
48 | /* ECC commands */ | 39 | /* ECC commands */ |
@@ -78,15 +69,10 @@ | |||
78 | #define GPMC_DEVICETYPE_NOR 0 | 69 | #define GPMC_DEVICETYPE_NOR 0 |
79 | #define GPMC_DEVICETYPE_NAND 2 | 70 | #define GPMC_DEVICETYPE_NAND 2 |
80 | #define GPMC_CONFIG_WRITEPROTECT 0x00000010 | 71 | #define GPMC_CONFIG_WRITEPROTECT 0x00000010 |
81 | #define GPMC_STATUS_BUFF_EMPTY 0x00000001 | ||
82 | #define WR_RD_PIN_MONITORING 0x00600000 | 72 | #define WR_RD_PIN_MONITORING 0x00600000 |
83 | #define GPMC_PREFETCH_STATUS_FIFO_CNT(val) ((val >> 24) & 0x7F) | ||
84 | #define GPMC_PREFETCH_STATUS_COUNT(val) (val & 0x00003fff) | ||
85 | #define GPMC_IRQ_FIFOEVENTENABLE 0x01 | 73 | #define GPMC_IRQ_FIFOEVENTENABLE 0x01 |
86 | #define GPMC_IRQ_COUNT_EVENT 0x02 | 74 | #define GPMC_IRQ_COUNT_EVENT 0x02 |
87 | 75 | ||
88 | #define PREFETCH_FIFOTHRESHOLD_MAX 0x40 | ||
89 | #define PREFETCH_FIFOTHRESHOLD(val) ((val) << 8) | ||
90 | 76 | ||
91 | /* | 77 | /* |
92 | * Note that all values in this struct are in nanoseconds except sync_clk | 78 | * Note that all values in this struct are in nanoseconds except sync_clk |
@@ -142,25 +128,8 @@ extern int gpmc_cs_request(int cs, unsigned long size, unsigned long *base); | |||
142 | extern void gpmc_cs_free(int cs); | 128 | extern void gpmc_cs_free(int cs); |
143 | extern int gpmc_cs_set_reserved(int cs, int reserved); | 129 | extern int gpmc_cs_set_reserved(int cs, int reserved); |
144 | extern int gpmc_cs_reserved(int cs); | 130 | extern int gpmc_cs_reserved(int cs); |
145 | extern int gpmc_prefetch_enable(int cs, int fifo_th, int dma_mode, | ||
146 | unsigned int u32_count, int is_write); | ||
147 | extern int gpmc_prefetch_reset(int cs); | ||
148 | extern void omap3_gpmc_save_context(void); | 131 | extern void omap3_gpmc_save_context(void); |
149 | extern void omap3_gpmc_restore_context(void); | 132 | extern void omap3_gpmc_restore_context(void); |
150 | extern int gpmc_read_status(int cmd); | ||
151 | extern int gpmc_cs_configure(int cs, int cmd, int wval); | 133 | extern int gpmc_cs_configure(int cs, int cmd, int wval); |
152 | extern int gpmc_nand_read(int cs, int cmd); | ||
153 | extern int gpmc_nand_write(int cs, int cmd, int wval); | ||
154 | |||
155 | int gpmc_enable_hwecc(int cs, int mode, int dev_width, int ecc_size); | ||
156 | int gpmc_calculate_ecc(int cs, const u_char *dat, u_char *ecc_code); | ||
157 | |||
158 | #ifdef CONFIG_ARCH_OMAP3 | ||
159 | int gpmc_init_hwecc_bch(int cs, int nsectors, int nerrors); | ||
160 | int gpmc_enable_hwecc_bch(int cs, int mode, int dev_width, int nsectors, | ||
161 | int nerrors); | ||
162 | int gpmc_calculate_ecc_bch4(int cs, const u_char *dat, u_char *ecc); | ||
163 | int gpmc_calculate_ecc_bch8(int cs, const u_char *dat, u_char *ecc); | ||
164 | #endif /* CONFIG_ARCH_OMAP3 */ | ||
165 | 134 | ||
166 | #endif | 135 | #endif |