Merge branch 'omap2-clock' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6.git

Merge branch 'omap2-clock' into omap-all

4 files changed, 299 insertions, 0 deletions

diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index b917206ee906..ef62bf21e179 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -29,6 +29,30 @@ config OMAP_DEBUG_LEDS
         depends on OMAP_DEBUG_DEVICES
         default y if LEDS || LEDS_OMAP_DEBUG
 
+config OMAP_DEBUG_POWERDOMAIN
+        bool "Emit debug messages from powerdomain layer"
+        depends on ARCH_OMAP2 || ARCH_OMAP3
+        default n
+        help
+          Say Y here if you want to compile in powerdomain layer
+          debugging messages for OMAP2/3.   These messages can
+          provide more detail as to why some powerdomain calls
+          may be failing, and will also emit a descriptive message
+          for every powerdomain register write.  However, the
+          extra detail costs some memory.
+
+config OMAP_DEBUG_CLOCKDOMAIN
+        bool "Emit debug messages from clockdomain layer"
+        depends on ARCH_OMAP2 || ARCH_OMAP3
+        default n
+        help
+          Say Y here if you want to compile in clockdomain layer
+          debugging messages for OMAP2/3.   These messages can
+          provide more detail as to why some clockdomain calls
+          may be failing, and will also emit a descriptive message
+          for every clockdomain register write.  However, the
+          extra detail costs some memory.
+
 config OMAP_RESET_CLOCKS
         bool "Reset unused clocks during boot"
         depends on ARCH_OMAP
diff --git a/arch/arm/plat-omap/include/mach/clock.h b/arch/arm/plat-omap/include/mach/clock.h
index 92f7c7238fcd..719298554ed7 100644
--- a/arch/arm/plat-omap/include/mach/clock.h
+++ b/arch/arm/plat-omap/include/mach/clock.h
@@ -15,6 +15,7 @@
 
 struct module;
 struct clk;
+struct clockdomain;
 
 #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
 
@@ -79,6 +80,8 @@ struct clk {
         u32                     clksel_mask;
         const struct clksel     *clksel;
         struct dpll_data        *dpll_data;
+        const char              *clkdm_name;
+        struct clockdomain      *clkdm;
 #else
         __u8                    rate_offset;
         __u8                    src_offset;
diff --git a/arch/arm/plat-omap/include/mach/clockdomain.h b/arch/arm/plat-omap/include/mach/clockdomain.h
new file mode 100644
index 000000000000..1f51f0173784
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/clockdomain.h
@@ -0,0 +1,106 @@
+/*
+ * linux/include/asm-arm/arch-omap/clockdomain.h
+ *
+ * OMAP2/3 clockdomain framework functions
+ *
+ * Copyright (C) 2008 Texas Instruments, Inc.
+ * Copyright (C) 2008 Nokia Corporation
+ *
+ * Written by Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARM_ARCH_OMAP_CLOCKDOMAIN_H
+#define __ASM_ARM_ARCH_OMAP_CLOCKDOMAIN_H
+
+#include <mach/powerdomain.h>
+#include <mach/clock.h>
+#include <mach/cpu.h>
+
+/* Clockdomain capability flags */
+#define CLKDM_CAN_FORCE_SLEEP                   (1 << 0)
+#define CLKDM_CAN_FORCE_WAKEUP                  (1 << 1)
+#define CLKDM_CAN_ENABLE_AUTO                   (1 << 2)
+#define CLKDM_CAN_DISABLE_AUTO                  (1 << 3)
+
+#define CLKDM_CAN_HWSUP         (CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_DISABLE_AUTO)
+#define CLKDM_CAN_SWSUP         (CLKDM_CAN_FORCE_SLEEP | CLKDM_CAN_FORCE_WAKEUP)
+#define CLKDM_CAN_HWSUP_SWSUP   (CLKDM_CAN_SWSUP | CLKDM_CAN_HWSUP)
+
+/* OMAP24XX CM_CLKSTCTRL_*.AUTOSTATE_* register bit values */
+#define OMAP24XX_CLKSTCTRL_DISABLE_AUTO         0x0
+#define OMAP24XX_CLKSTCTRL_ENABLE_AUTO          0x1
+
+/* OMAP3XXX CM_CLKSTCTRL_*.CLKTRCTRL_* register bit values */
+#define OMAP34XX_CLKSTCTRL_DISABLE_AUTO         0x0
+#define OMAP34XX_CLKSTCTRL_FORCE_SLEEP          0x1
+#define OMAP34XX_CLKSTCTRL_FORCE_WAKEUP         0x2
+#define OMAP34XX_CLKSTCTRL_ENABLE_AUTO          0x3
+
+/*
+ * struct clkdm_pwrdm_autodep - a powerdomain that should have wkdeps
+ * and sleepdeps added when a powerdomain should stay active in hwsup mode;
+ * and conversely, removed when the powerdomain should be allowed to go
+ * inactive in hwsup mode.
+ */
+struct clkdm_pwrdm_autodep {
+
+        /* Name of the powerdomain to add a wkdep/sleepdep on */
+        const char *pwrdm_name;
+
+        /* Powerdomain pointer (looked up at clkdm_init() time) */
+        struct powerdomain *pwrdm;
+
+        /* OMAP chip types that this clockdomain dep is valid on */
+        const struct omap_chip_id omap_chip;
+
+};
+
+struct clockdomain {
+
+        /* Clockdomain name */
+        const char *name;
+
+        /* Powerdomain enclosing this clockdomain */
+        const char *pwrdm_name;
+
+        /* CLKTRCTRL/AUTOSTATE field mask in CM_CLKSTCTRL reg */
+        const u16 clktrctrl_mask;
+
+        /* Clockdomain capability flags */
+        const u8 flags;
+
+        /* OMAP chip types that this clockdomain is valid on */
+        const struct omap_chip_id omap_chip;
+
+        /* Usecount tracking */
+        atomic_t usecount;
+
+        /* Powerdomain pointer assigned at clkdm_register() */
+        struct powerdomain *pwrdm;
+
+        struct list_head node;
+
+};
+
+void clkdm_init(struct clockdomain **clkdms, struct clkdm_pwrdm_autodep *autodeps);
+int clkdm_register(struct clockdomain *clkdm);
+int clkdm_unregister(struct clockdomain *clkdm);
+struct clockdomain *clkdm_lookup(const char *name);
+
+int clkdm_for_each(int (*fn)(struct clockdomain *clkdm));
+struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm);
+
+void omap2_clkdm_allow_idle(struct clockdomain *clkdm);
+void omap2_clkdm_deny_idle(struct clockdomain *clkdm);
+
+int omap2_clkdm_wakeup(struct clockdomain *clkdm);
+int omap2_clkdm_sleep(struct clockdomain *clkdm);
+
+int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk);
+int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk);
+
+#endif
diff --git a/arch/arm/plat-omap/include/mach/powerdomain.h b/arch/arm/plat-omap/include/mach/powerdomain.h
new file mode 100644
index 000000000000..2806a9c8e4d7
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/powerdomain.h
@@ -0,0 +1,166 @@
+/*
+ * OMAP2/3 powerdomain control
+ *
+ * Copyright (C) 2007-8 Texas Instruments, Inc.
+ * Copyright (C) 2007-8 Nokia Corporation
+ *
+ * Written by Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef ASM_ARM_ARCH_OMAP_POWERDOMAIN
+#define ASM_ARM_ARCH_OMAP_POWERDOMAIN
+
+#include <linux/types.h>
+#include <linux/list.h>
+
+#include <asm/atomic.h>
+
+#include <mach/cpu.h>
+
+
+/* Powerdomain basic power states */
+#define PWRDM_POWER_OFF         0x0
+#define PWRDM_POWER_RET         0x1
+#define PWRDM_POWER_INACTIVE    0x2
+#define PWRDM_POWER_ON          0x3
+
+/* Powerdomain allowable state bitfields */
+#define PWRSTS_OFF_ON           ((1 << PWRDM_POWER_OFF) | \
+                                 (1 << PWRDM_POWER_ON))
+
+#define PWRSTS_OFF_RET          ((1 << PWRDM_POWER_OFF) | \
+                                 (1 << PWRDM_POWER_RET))
+
+#define PWRSTS_OFF_RET_ON       (PWRSTS_OFF_RET | (1 << PWRDM_POWER_ON))
+
+
+/* Powerdomain flags */
+#define PWRDM_HAS_HDWR_SAR      (1 << 0) /* hardware save-and-restore support */
+
+
+/*
+ * Number of memory banks that are power-controllable.  On OMAP3430, the
+ * maximum is 4.
+ */
+#define PWRDM_MAX_MEM_BANKS     4
+
+/*
+ * Maximum number of clockdomains that can be associated with a powerdomain.
+ * CORE powerdomain is probably the worst case.
+ */
+#define PWRDM_MAX_CLKDMS        3
+
+/* XXX A completely arbitrary number. What is reasonable here? */
+#define PWRDM_TRANSITION_BAILOUT 100000
+
+struct clockdomain;
+struct powerdomain;
+
+/* Encodes dependencies between powerdomains - statically defined */
+struct pwrdm_dep {
+
+        /* Powerdomain name */
+        const char *pwrdm_name;
+
+        /* Powerdomain pointer - resolved by the powerdomain code */
+        struct powerdomain *pwrdm;
+
+        /* Flags to mark OMAP chip restrictions, etc. */
+        const struct omap_chip_id omap_chip;
+
+};
+
+struct powerdomain {
+
+        /* Powerdomain name */
+        const char *name;
+
+        /* the address offset from CM_BASE/PRM_BASE */
+        const s16 prcm_offs;
+
+        /* Used to represent the OMAP chip types containing this pwrdm */
+        const struct omap_chip_id omap_chip;
+
+        /* Bit shift of this powerdomain's PM_WKDEP/CM_SLEEPDEP bit */
+        const u8 dep_bit;
+
+        /* Powerdomains that can be told to wake this powerdomain up */
+        struct pwrdm_dep *wkdep_srcs;
+
+        /* Powerdomains that can be told to keep this pwrdm from inactivity */
+        struct pwrdm_dep *sleepdep_srcs;
+
+        /* Possible powerdomain power states */
+        const u8 pwrsts;
+
+        /* Possible logic power states when pwrdm in RETENTION */
+        const u8 pwrsts_logic_ret;
+
+        /* Powerdomain flags */
+        const u8 flags;
+
+        /* Number of software-controllable memory banks in this powerdomain */
+        const u8 banks;
+
+        /* Possible memory bank pwrstates when pwrdm in RETENTION */
+        const u8 pwrsts_mem_ret[PWRDM_MAX_MEM_BANKS];
+
+        /* Possible memory bank pwrstates when pwrdm is ON */
+        const u8 pwrsts_mem_on[PWRDM_MAX_MEM_BANKS];
+
+        /* Clockdomains in this powerdomain */
+        struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS];
+
+        struct list_head node;
+
+};
+
+
+void pwrdm_init(struct powerdomain **pwrdm_list);
+
+int pwrdm_register(struct powerdomain *pwrdm);
+int pwrdm_unregister(struct powerdomain *pwrdm);
+struct powerdomain *pwrdm_lookup(const char *name);
+
+int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm));
+
+int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
+int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
+int pwrdm_for_each_clkdm(struct powerdomain *pwrdm,
+                         int (*fn)(struct powerdomain *pwrdm,
+                                   struct clockdomain *clkdm));
+
+int pwrdm_add_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2);
+int pwrdm_del_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2);
+int pwrdm_read_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2);
+int pwrdm_add_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2);
+int pwrdm_del_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2);
+int pwrdm_read_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2);
+
+int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm);
+
+int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst);
+int pwrdm_read_next_pwrst(struct powerdomain *pwrdm);
+int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm);
+int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm);
+
+int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst);
+int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
+int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
+
+int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm);
+int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm);
+int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
+int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
+
+int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm);
+int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm);
+bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm);
+
+int pwrdm_wait_transition(struct powerdomain *pwrdm);
+
+#endif