diff options
author | Paul Walmsley <paul@pwsan.com> | 2011-03-11 00:43:32 -0500 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2011-03-11 00:43:32 -0500 |
commit | a08572ae529b1e8de12393eeced661feae8fd44c (patch) | |
tree | e9b48848ab72c953d778832336eb8e1d43abdc8d /arch/arm/plat-omap | |
parent | 2d403fe03070b541cc93cfa915f6e6c592cf231c (diff) | |
parent | c0718df4d666cc5fd8837ac93c82995a17bfdbf5 (diff) |
Merge remote branch 'remotes/origin/voltage_split_2.6.39' into tmp-integration-2.6.39-20110310-024
Conflicts:
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
Diffstat (limited to 'arch/arm/plat-omap')
-rw-r--r-- | arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/smartreflex.h | 245 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/voltage.h | 155 |
3 files changed, 0 insertions, 401 deletions
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h index fca0cbce4659..23c77cd4abed 100644 --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h | |||
@@ -35,7 +35,6 @@ | |||
35 | #include <linux/ioport.h> | 35 | #include <linux/ioport.h> |
36 | #include <linux/spinlock.h> | 36 | #include <linux/spinlock.h> |
37 | #include <plat/cpu.h> | 37 | #include <plat/cpu.h> |
38 | #include <plat/voltage.h> | ||
39 | 38 | ||
40 | struct omap_device; | 39 | struct omap_device; |
41 | 40 | ||
diff --git a/arch/arm/plat-omap/include/plat/smartreflex.h b/arch/arm/plat-omap/include/plat/smartreflex.h deleted file mode 100644 index 6568c885f37a..000000000000 --- a/arch/arm/plat-omap/include/plat/smartreflex.h +++ /dev/null | |||
@@ -1,245 +0,0 @@ | |||
1 | /* | ||
2 | * OMAP Smartreflex Defines and Routines | ||
3 | * | ||
4 | * Author: Thara Gopinath <thara@ti.com> | ||
5 | * | ||
6 | * Copyright (C) 2010 Texas Instruments, Inc. | ||
7 | * Thara Gopinath <thara@ti.com> | ||
8 | * | ||
9 | * Copyright (C) 2008 Nokia Corporation | ||
10 | * Kalle Jokiniemi | ||
11 | * | ||
12 | * Copyright (C) 2007 Texas Instruments, Inc. | ||
13 | * Lesly A M <x0080970@ti.com> | ||
14 | * | ||
15 | * This program is free software; you can redistribute it and/or modify | ||
16 | * it under the terms of the GNU General Public License version 2 as | ||
17 | * published by the Free Software Foundation. | ||
18 | */ | ||
19 | |||
20 | #ifndef __ASM_ARM_OMAP_SMARTREFLEX_H | ||
21 | #define __ASM_ARM_OMAP_SMARTREFLEX_H | ||
22 | |||
23 | #include <linux/platform_device.h> | ||
24 | #include <plat/voltage.h> | ||
25 | |||
26 | /* | ||
27 | * Different Smartreflex IPs version. The v1 is the 65nm version used in | ||
28 | * OMAP3430. The v2 is the update for the 45nm version of the IP | ||
29 | * used in OMAP3630 and OMAP4430 | ||
30 | */ | ||
31 | #define SR_TYPE_V1 1 | ||
32 | #define SR_TYPE_V2 2 | ||
33 | |||
34 | /* SMART REFLEX REG ADDRESS OFFSET */ | ||
35 | #define SRCONFIG 0x00 | ||
36 | #define SRSTATUS 0x04 | ||
37 | #define SENVAL 0x08 | ||
38 | #define SENMIN 0x0C | ||
39 | #define SENMAX 0x10 | ||
40 | #define SENAVG 0x14 | ||
41 | #define AVGWEIGHT 0x18 | ||
42 | #define NVALUERECIPROCAL 0x1c | ||
43 | #define SENERROR_V1 0x20 | ||
44 | #define ERRCONFIG_V1 0x24 | ||
45 | #define IRQ_EOI 0x20 | ||
46 | #define IRQSTATUS_RAW 0x24 | ||
47 | #define IRQSTATUS 0x28 | ||
48 | #define IRQENABLE_SET 0x2C | ||
49 | #define IRQENABLE_CLR 0x30 | ||
50 | #define SENERROR_V2 0x34 | ||
51 | #define ERRCONFIG_V2 0x38 | ||
52 | |||
53 | /* Bit/Shift Positions */ | ||
54 | |||
55 | /* SRCONFIG */ | ||
56 | #define SRCONFIG_ACCUMDATA_SHIFT 22 | ||
57 | #define SRCONFIG_SRCLKLENGTH_SHIFT 12 | ||
58 | #define SRCONFIG_SENNENABLE_V1_SHIFT 5 | ||
59 | #define SRCONFIG_SENPENABLE_V1_SHIFT 3 | ||
60 | #define SRCONFIG_SENNENABLE_V2_SHIFT 1 | ||
61 | #define SRCONFIG_SENPENABLE_V2_SHIFT 0 | ||
62 | #define SRCONFIG_CLKCTRL_SHIFT 0 | ||
63 | |||
64 | #define SRCONFIG_ACCUMDATA_MASK (0x3ff << 22) | ||
65 | |||
66 | #define SRCONFIG_SRENABLE BIT(11) | ||
67 | #define SRCONFIG_SENENABLE BIT(10) | ||
68 | #define SRCONFIG_ERRGEN_EN BIT(9) | ||
69 | #define SRCONFIG_MINMAXAVG_EN BIT(8) | ||
70 | #define SRCONFIG_DELAYCTRL BIT(2) | ||
71 | |||
72 | /* AVGWEIGHT */ | ||
73 | #define AVGWEIGHT_SENPAVGWEIGHT_SHIFT 2 | ||
74 | #define AVGWEIGHT_SENNAVGWEIGHT_SHIFT 0 | ||
75 | |||
76 | /* NVALUERECIPROCAL */ | ||
77 | #define NVALUERECIPROCAL_SENPGAIN_SHIFT 20 | ||
78 | #define NVALUERECIPROCAL_SENNGAIN_SHIFT 16 | ||
79 | #define NVALUERECIPROCAL_RNSENP_SHIFT 8 | ||
80 | #define NVALUERECIPROCAL_RNSENN_SHIFT 0 | ||
81 | |||
82 | /* ERRCONFIG */ | ||
83 | #define ERRCONFIG_ERRWEIGHT_SHIFT 16 | ||
84 | #define ERRCONFIG_ERRMAXLIMIT_SHIFT 8 | ||
85 | #define ERRCONFIG_ERRMINLIMIT_SHIFT 0 | ||
86 | |||
87 | #define SR_ERRWEIGHT_MASK (0x07 << 16) | ||
88 | #define SR_ERRMAXLIMIT_MASK (0xff << 8) | ||
89 | #define SR_ERRMINLIMIT_MASK (0xff << 0) | ||
90 | |||
91 | #define ERRCONFIG_VPBOUNDINTEN_V1 BIT(31) | ||
92 | #define ERRCONFIG_VPBOUNDINTST_V1 BIT(30) | ||
93 | #define ERRCONFIG_MCUACCUMINTEN BIT(29) | ||
94 | #define ERRCONFIG_MCUACCUMINTST BIT(28) | ||
95 | #define ERRCONFIG_MCUVALIDINTEN BIT(27) | ||
96 | #define ERRCONFIG_MCUVALIDINTST BIT(26) | ||
97 | #define ERRCONFIG_MCUBOUNDINTEN BIT(25) | ||
98 | #define ERRCONFIG_MCUBOUNDINTST BIT(24) | ||
99 | #define ERRCONFIG_MCUDISACKINTEN BIT(23) | ||
100 | #define ERRCONFIG_VPBOUNDINTST_V2 BIT(23) | ||
101 | #define ERRCONFIG_MCUDISACKINTST BIT(22) | ||
102 | #define ERRCONFIG_VPBOUNDINTEN_V2 BIT(22) | ||
103 | |||
104 | #define ERRCONFIG_STATUS_V1_MASK (ERRCONFIG_VPBOUNDINTST_V1 | \ | ||
105 | ERRCONFIG_MCUACCUMINTST | \ | ||
106 | ERRCONFIG_MCUVALIDINTST | \ | ||
107 | ERRCONFIG_MCUBOUNDINTST | \ | ||
108 | ERRCONFIG_MCUDISACKINTST) | ||
109 | /* IRQSTATUS */ | ||
110 | #define IRQSTATUS_MCUACCUMINT BIT(3) | ||
111 | #define IRQSTATUS_MCVALIDINT BIT(2) | ||
112 | #define IRQSTATUS_MCBOUNDSINT BIT(1) | ||
113 | #define IRQSTATUS_MCUDISABLEACKINT BIT(0) | ||
114 | |||
115 | /* IRQENABLE_SET and IRQENABLE_CLEAR */ | ||
116 | #define IRQENABLE_MCUACCUMINT BIT(3) | ||
117 | #define IRQENABLE_MCUVALIDINT BIT(2) | ||
118 | #define IRQENABLE_MCUBOUNDSINT BIT(1) | ||
119 | #define IRQENABLE_MCUDISABLEACKINT BIT(0) | ||
120 | |||
121 | /* Common Bit values */ | ||
122 | |||
123 | #define SRCLKLENGTH_12MHZ_SYSCLK 0x3c | ||
124 | #define SRCLKLENGTH_13MHZ_SYSCLK 0x41 | ||
125 | #define SRCLKLENGTH_19MHZ_SYSCLK 0x60 | ||
126 | #define SRCLKLENGTH_26MHZ_SYSCLK 0x82 | ||
127 | #define SRCLKLENGTH_38MHZ_SYSCLK 0xC0 | ||
128 | |||
129 | /* | ||
130 | * 3430 specific values. Maybe these should be passed from board file or | ||
131 | * pmic structures. | ||
132 | */ | ||
133 | #define OMAP3430_SR_ACCUMDATA 0x1f4 | ||
134 | |||
135 | #define OMAP3430_SR1_SENPAVGWEIGHT 0x03 | ||
136 | #define OMAP3430_SR1_SENNAVGWEIGHT 0x03 | ||
137 | |||
138 | #define OMAP3430_SR2_SENPAVGWEIGHT 0x01 | ||
139 | #define OMAP3430_SR2_SENNAVGWEIGHT 0x01 | ||
140 | |||
141 | #define OMAP3430_SR_ERRWEIGHT 0x04 | ||
142 | #define OMAP3430_SR_ERRMAXLIMIT 0x02 | ||
143 | |||
144 | /** | ||
145 | * struct omap_sr_pmic_data - Strucutre to be populated by pmic code to pass | ||
146 | * pmic specific info to smartreflex driver | ||
147 | * | ||
148 | * @sr_pmic_init: API to initialize smartreflex on the PMIC side. | ||
149 | */ | ||
150 | struct omap_sr_pmic_data { | ||
151 | void (*sr_pmic_init) (void); | ||
152 | }; | ||
153 | |||
154 | #ifdef CONFIG_OMAP_SMARTREFLEX | ||
155 | /* | ||
156 | * The smart reflex driver supports CLASS1 CLASS2 and CLASS3 SR. | ||
157 | * The smartreflex class driver should pass the class type. | ||
158 | * Should be used to populate the class_type field of the | ||
159 | * omap_smartreflex_class_data structure. | ||
160 | */ | ||
161 | #define SR_CLASS1 0x1 | ||
162 | #define SR_CLASS2 0x2 | ||
163 | #define SR_CLASS3 0x3 | ||
164 | |||
165 | /** | ||
166 | * struct omap_sr_class_data - Smartreflex class driver info | ||
167 | * | ||
168 | * @enable: API to enable a particular class smaartreflex. | ||
169 | * @disable: API to disable a particular class smartreflex. | ||
170 | * @configure: API to configure a particular class smartreflex. | ||
171 | * @notify: API to notify the class driver about an event in SR. | ||
172 | * Not needed for class3. | ||
173 | * @notify_flags: specify the events to be notified to the class driver | ||
174 | * @class_type: specify which smartreflex class. | ||
175 | * Can be used by the SR driver to take any class | ||
176 | * based decisions. | ||
177 | */ | ||
178 | struct omap_sr_class_data { | ||
179 | int (*enable)(struct voltagedomain *voltdm); | ||
180 | int (*disable)(struct voltagedomain *voltdm, int is_volt_reset); | ||
181 | int (*configure)(struct voltagedomain *voltdm); | ||
182 | int (*notify)(struct voltagedomain *voltdm, u32 status); | ||
183 | u8 notify_flags; | ||
184 | u8 class_type; | ||
185 | }; | ||
186 | |||
187 | /** | ||
188 | * struct omap_sr_nvalue_table - Smartreflex n-target value info | ||
189 | * | ||
190 | * @efuse_offs: The offset of the efuse where n-target values are stored. | ||
191 | * @nvalue: The n-target value. | ||
192 | */ | ||
193 | struct omap_sr_nvalue_table { | ||
194 | u32 efuse_offs; | ||
195 | u32 nvalue; | ||
196 | }; | ||
197 | |||
198 | /** | ||
199 | * struct omap_sr_data - Smartreflex platform data. | ||
200 | * | ||
201 | * @ip_type: Smartreflex IP type. | ||
202 | * @senp_mod: SENPENABLE value for the sr | ||
203 | * @senn_mod: SENNENABLE value for sr | ||
204 | * @nvalue_count: Number of distinct nvalues in the nvalue table | ||
205 | * @enable_on_init: whether this sr module needs to enabled at | ||
206 | * boot up or not. | ||
207 | * @nvalue_table: table containing the efuse offsets and nvalues | ||
208 | * corresponding to them. | ||
209 | * @voltdm: Pointer to the voltage domain associated with the SR | ||
210 | */ | ||
211 | struct omap_sr_data { | ||
212 | int ip_type; | ||
213 | u32 senp_mod; | ||
214 | u32 senn_mod; | ||
215 | int nvalue_count; | ||
216 | bool enable_on_init; | ||
217 | struct omap_sr_nvalue_table *nvalue_table; | ||
218 | struct voltagedomain *voltdm; | ||
219 | }; | ||
220 | |||
221 | /* Smartreflex module enable/disable interface */ | ||
222 | void omap_sr_enable(struct voltagedomain *voltdm); | ||
223 | void omap_sr_disable(struct voltagedomain *voltdm); | ||
224 | void omap_sr_disable_reset_volt(struct voltagedomain *voltdm); | ||
225 | |||
226 | /* API to register the pmic specific data with the smartreflex driver. */ | ||
227 | void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data); | ||
228 | |||
229 | /* Smartreflex driver hooks to be called from Smartreflex class driver */ | ||
230 | int sr_enable(struct voltagedomain *voltdm, unsigned long volt); | ||
231 | void sr_disable(struct voltagedomain *voltdm); | ||
232 | int sr_configure_errgen(struct voltagedomain *voltdm); | ||
233 | int sr_configure_minmax(struct voltagedomain *voltdm); | ||
234 | |||
235 | /* API to register the smartreflex class driver with the smartreflex driver */ | ||
236 | int sr_register_class(struct omap_sr_class_data *class_data); | ||
237 | #else | ||
238 | static inline void omap_sr_enable(struct voltagedomain *voltdm) {} | ||
239 | static inline void omap_sr_disable(struct voltagedomain *voltdm) {} | ||
240 | static inline void omap_sr_disable_reset_volt( | ||
241 | struct voltagedomain *voltdm) {} | ||
242 | static inline void omap_sr_register_pmic( | ||
243 | struct omap_sr_pmic_data *pmic_data) {} | ||
244 | #endif | ||
245 | #endif | ||
diff --git a/arch/arm/plat-omap/include/plat/voltage.h b/arch/arm/plat-omap/include/plat/voltage.h deleted file mode 100644 index 5bd204e55c32..000000000000 --- a/arch/arm/plat-omap/include/plat/voltage.h +++ /dev/null | |||
@@ -1,155 +0,0 @@ | |||
1 | /* | ||
2 | * OMAP Voltage Management Routines | ||
3 | * | ||
4 | * Author: Thara Gopinath <thara@ti.com> | ||
5 | * | ||
6 | * Copyright (C) 2009 Texas Instruments, Inc. | ||
7 | * Thara Gopinath <thara@ti.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #ifndef __ARCH_ARM_MACH_OMAP2_VOLTAGE_H | ||
15 | #define __ARCH_ARM_MACH_OMAP2_VOLTAGE_H | ||
16 | |||
17 | #include <linux/err.h> | ||
18 | |||
19 | #define VOLTSCALE_VPFORCEUPDATE 1 | ||
20 | #define VOLTSCALE_VCBYPASS 2 | ||
21 | |||
22 | /* | ||
23 | * OMAP3 GENERIC setup times. Revisit to see if these needs to be | ||
24 | * passed from board or PMIC file | ||
25 | */ | ||
26 | #define OMAP3_CLKSETUP 0xff | ||
27 | #define OMAP3_VOLTOFFSET 0xff | ||
28 | #define OMAP3_VOLTSETUP2 0xff | ||
29 | |||
30 | /* Voltage value defines */ | ||
31 | #define OMAP3430_VDD_MPU_OPP1_UV 975000 | ||
32 | #define OMAP3430_VDD_MPU_OPP2_UV 1075000 | ||
33 | #define OMAP3430_VDD_MPU_OPP3_UV 1200000 | ||
34 | #define OMAP3430_VDD_MPU_OPP4_UV 1270000 | ||
35 | #define OMAP3430_VDD_MPU_OPP5_UV 1350000 | ||
36 | |||
37 | #define OMAP3430_VDD_CORE_OPP1_UV 975000 | ||
38 | #define OMAP3430_VDD_CORE_OPP2_UV 1050000 | ||
39 | #define OMAP3430_VDD_CORE_OPP3_UV 1150000 | ||
40 | |||
41 | #define OMAP3630_VDD_MPU_OPP50_UV 1012500 | ||
42 | #define OMAP3630_VDD_MPU_OPP100_UV 1200000 | ||
43 | #define OMAP3630_VDD_MPU_OPP120_UV 1325000 | ||
44 | #define OMAP3630_VDD_MPU_OPP1G_UV 1375000 | ||
45 | |||
46 | #define OMAP3630_VDD_CORE_OPP50_UV 1000000 | ||
47 | #define OMAP3630_VDD_CORE_OPP100_UV 1200000 | ||
48 | |||
49 | #define OMAP4430_VDD_MPU_OPP50_UV 930000 | ||
50 | #define OMAP4430_VDD_MPU_OPP100_UV 1100000 | ||
51 | #define OMAP4430_VDD_MPU_OPPTURBO_UV 1260000 | ||
52 | #define OMAP4430_VDD_MPU_OPPNITRO_UV 1350000 | ||
53 | |||
54 | #define OMAP4430_VDD_IVA_OPP50_UV 930000 | ||
55 | #define OMAP4430_VDD_IVA_OPP100_UV 1100000 | ||
56 | #define OMAP4430_VDD_IVA_OPPTURBO_UV 1260000 | ||
57 | |||
58 | #define OMAP4430_VDD_CORE_OPP50_UV 930000 | ||
59 | #define OMAP4430_VDD_CORE_OPP100_UV 1100000 | ||
60 | |||
61 | /** | ||
62 | * struct voltagedomain - omap voltage domain global structure. | ||
63 | * @name: Name of the voltage domain which can be used as a unique | ||
64 | * identifier. | ||
65 | */ | ||
66 | struct voltagedomain { | ||
67 | char *name; | ||
68 | }; | ||
69 | |||
70 | /** | ||
71 | * struct omap_volt_data - Omap voltage specific data. | ||
72 | * @voltage_nominal: The possible voltage value in uV | ||
73 | * @sr_efuse_offs: The offset of the efuse register(from system | ||
74 | * control module base address) from where to read | ||
75 | * the n-target value for the smartreflex module. | ||
76 | * @sr_errminlimit: Error min limit value for smartreflex. This value | ||
77 | * differs at differnet opp and thus is linked | ||
78 | * with voltage. | ||
79 | * @vp_errorgain: Error gain value for the voltage processor. This | ||
80 | * field also differs according to the voltage/opp. | ||
81 | */ | ||
82 | struct omap_volt_data { | ||
83 | u32 volt_nominal; | ||
84 | u32 sr_efuse_offs; | ||
85 | u8 sr_errminlimit; | ||
86 | u8 vp_errgain; | ||
87 | }; | ||
88 | |||
89 | /** | ||
90 | * struct omap_volt_pmic_info - PMIC specific data required by voltage driver. | ||
91 | * @slew_rate: PMIC slew rate (in uv/us) | ||
92 | * @step_size: PMIC voltage step size (in uv) | ||
93 | * @vsel_to_uv: PMIC API to convert vsel value to actual voltage in uV. | ||
94 | * @uv_to_vsel: PMIC API to convert voltage in uV to vsel value. | ||
95 | */ | ||
96 | struct omap_volt_pmic_info { | ||
97 | int slew_rate; | ||
98 | int step_size; | ||
99 | u32 on_volt; | ||
100 | u32 onlp_volt; | ||
101 | u32 ret_volt; | ||
102 | u32 off_volt; | ||
103 | u16 volt_setup_time; | ||
104 | u8 vp_erroroffset; | ||
105 | u8 vp_vstepmin; | ||
106 | u8 vp_vstepmax; | ||
107 | u8 vp_vddmin; | ||
108 | u8 vp_vddmax; | ||
109 | u8 vp_timeout_us; | ||
110 | u8 i2c_slave_addr; | ||
111 | u8 pmic_reg; | ||
112 | unsigned long (*vsel_to_uv) (const u8 vsel); | ||
113 | u8 (*uv_to_vsel) (unsigned long uV); | ||
114 | }; | ||
115 | |||
116 | unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm); | ||
117 | void omap_vp_enable(struct voltagedomain *voltdm); | ||
118 | void omap_vp_disable(struct voltagedomain *voltdm); | ||
119 | int omap_voltage_scale_vdd(struct voltagedomain *voltdm, | ||
120 | unsigned long target_volt); | ||
121 | void omap_voltage_reset(struct voltagedomain *voltdm); | ||
122 | void omap_voltage_get_volttable(struct voltagedomain *voltdm, | ||
123 | struct omap_volt_data **volt_data); | ||
124 | struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, | ||
125 | unsigned long volt); | ||
126 | unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm); | ||
127 | struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm); | ||
128 | #ifdef CONFIG_PM | ||
129 | int omap_voltage_register_pmic(struct voltagedomain *voltdm, | ||
130 | struct omap_volt_pmic_info *pmic_info); | ||
131 | void omap_change_voltscale_method(struct voltagedomain *voltdm, | ||
132 | int voltscale_method); | ||
133 | /* API to get the voltagedomain pointer */ | ||
134 | struct voltagedomain *omap_voltage_domain_lookup(char *name); | ||
135 | |||
136 | int omap_voltage_late_init(void); | ||
137 | #else | ||
138 | static inline int omap_voltage_register_pmic(struct voltagedomain *voltdm, | ||
139 | struct omap_volt_pmic_info *pmic_info) | ||
140 | { | ||
141 | return -EINVAL; | ||
142 | } | ||
143 | static inline void omap_change_voltscale_method(struct voltagedomain *voltdm, | ||
144 | int voltscale_method) {} | ||
145 | static inline int omap_voltage_late_init(void) | ||
146 | { | ||
147 | return -EINVAL; | ||
148 | } | ||
149 | static inline struct voltagedomain *omap_voltage_domain_lookup(char *name) | ||
150 | { | ||
151 | return ERR_PTR(-EINVAL); | ||
152 | } | ||
153 | #endif | ||
154 | |||
155 | #endif | ||