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authorSantosh Shilimkar <santosh.shilimkar@ti.com>2009-04-28 11:21:52 -0400
committerSantosh Shilimkar <santosh.shilimkar@ti.com>2009-06-09 03:33:50 -0400
commit367cd31ee0cbc948fe3b83960b1dbf931e2eaa90 (patch)
tree7d9c666fa6da3efb4e206c9f6b5fc4200320e498 /arch/arm/plat-omap
parentc7f7ff179cb9f2f1e0244ef2c80afbb93c74ce2a (diff)
ARM: OMAP4: SMP: Add OMAP4430 SMP board files
This patch adds SMP platform files support for OMAP4430SDP. TI's OMAP4430 SOC is based on ARM Cortex-A9 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and SCU for cache coherency. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm/plat-omap')
-rw-r--r--arch/arm/plat-omap/include/mach/smp.h51
1 files changed, 51 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/include/mach/smp.h b/arch/arm/plat-omap/include/mach/smp.h
new file mode 100644
index 000000000000..dcaa8fde7063
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/smp.h
@@ -0,0 +1,51 @@
1/*
2 * OMAP4 machine specific smp.h
3 *
4 * Copyright (C) 2009 Texas Instruments, Inc.
5 *
6 * Author:
7 * Santosh Shilimkar <santosh.shilimkar@ti.com>
8 *
9 * Interface functions needed for the SMP. This file is based on arm
10 * realview smp platform.
11 * Copyright (c) 2003 ARM Limited.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 */
17#ifndef OMAP_ARCH_SMP_H
18#define OMAP_ARCH_SMP_H
19
20#include <asm/hardware/gic.h>
21
22/*
23 * set_event() is used to wake up secondary core from wfe using sev. ROM
24 * code puts the second core into wfe(standby).
25 *
26 */
27#define set_event() __asm__ __volatile__ ("sev" : : : "memory")
28
29/* Needed for secondary core boot */
30extern void omap_secondary_startup(void);
31
32/*
33 * We use Soft IRQ1 as the IPI
34 */
35static inline void smp_cross_call(const struct cpumask *mask)
36{
37 gic_raise_softirq(mask, 1);
38}
39
40/*
41 * Read MPIDR: Multiprocessor affinity register
42 */
43#define hard_smp_processor_id() \
44 ({ \
45 unsigned int cpunum; \
46 __asm__("mrc p15, 0, %0, c0, c0, 5" \
47 : "=r" (cpunum)); \
48 cpunum &= 0x0F; \
49 })
50
51#endif