Merge branch 'omap4-i2c-init' into omap-for-linus

1 files changed, 98 insertions, 37 deletions

diff --git a/arch/arm/plat-omap/i2c.c b/arch/arm/plat-omap/i2c.c
index 624e26298faa..eec2b4993c69 100644
--- a/arch/arm/plat-omap/i2c.c
+++ b/arch/arm/plat-omap/i2c.c
@@ -26,15 +26,19 @@
 #include <linux/kernel.h>
 #include <linux/platform_device.h>
 #include <linux/i2c.h>
+#include <linux/i2c-omap.h>
+
 #include <mach/irqs.h>
 #include <plat/mux.h>
 #include <plat/i2c.h>
+#include <plat/omap-pm.h>
 
 #define OMAP_I2C_SIZE           0x3f
 #define OMAP1_I2C_BASE          0xfffb3800
 #define OMAP2_I2C_BASE1         0x48070000
 #define OMAP2_I2C_BASE2         0x48072000
 #define OMAP2_I2C_BASE3         0x48060000
+#define OMAP4_I2C_BASE4         0x48350000
 
 static const char name[] = "i2c_omap";
 
@@ -51,11 +55,14 @@ static const char name[] = "i2c_omap";
 
 static struct resource i2c_resources[][2] = {
         { I2C_RESOURCE_BUILDER(0, 0) },
-#if     defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
-        { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE2, INT_24XX_I2C2_IRQ) },
+#if     defined(CONFIG_ARCH_OMAP2PLUS)
+        { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE2, 0) },
+#endif
+#if     defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
+        { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE3, 0) },
 #endif
-#if     defined(CONFIG_ARCH_OMAP3)
-        { I2C_RESOURCE_BUILDER(OMAP2_I2C_BASE3, INT_34XX_I2C3_IRQ) },
+#if     defined(CONFIG_ARCH_OMAP4)
+        { I2C_RESOURCE_BUILDER(OMAP4_I2C_BASE4, 0) },
 #endif
 };
 
@@ -70,14 +77,17 @@ static struct resource i2c_resources[][2] = {
                 },                                      \
         }
 
-static u32 i2c_rate[ARRAY_SIZE(i2c_resources)];
+static struct omap_i2c_bus_platform_data i2c_pdata[ARRAY_SIZE(i2c_resources)];
 static struct platform_device omap_i2c_devices[] = {
-        I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_rate[0]),
-#if     defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
-        I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_rate[1]),
+        I2C_DEV_BUILDER(1, i2c_resources[0], &i2c_pdata[0]),
+#if     defined(CONFIG_ARCH_OMAP2PLUS)
+        I2C_DEV_BUILDER(2, i2c_resources[1], &i2c_pdata[1]),
+#endif
+#if     defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
+        I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_pdata[2]),
 #endif
-#if     defined(CONFIG_ARCH_OMAP3)
-        I2C_DEV_BUILDER(3, i2c_resources[2], &i2c_rate[2]),
+#if     defined(CONFIG_ARCH_OMAP4)
+        I2C_DEV_BUILDER(4, i2c_resources[3], &i2c_pdata[3]),
 #endif
 };
 
@@ -93,39 +103,89 @@ static int __init omap_i2c_nr_ports(void)
                 ports = 2;
         else if (cpu_is_omap34xx())
                 ports = 3;
+        else if (cpu_is_omap44xx())
+                ports = 4;
 
         return ports;
 }
 
-static int __init omap_i2c_add_bus(int bus_id)
+/* Shared between omap2 and 3 */
+static resource_size_t omap2_i2c_irq[3] __initdata = {
+        INT_24XX_I2C1_IRQ,
+        INT_24XX_I2C2_IRQ,
+        INT_34XX_I2C3_IRQ,
+};
+
+static resource_size_t omap4_i2c_irq[4] __initdata = {
+        OMAP44XX_IRQ_I2C1,
+        OMAP44XX_IRQ_I2C2,
+        OMAP44XX_IRQ_I2C3,
+        OMAP44XX_IRQ_I2C4,
+};
+
+static inline int omap1_i2c_add_bus(struct platform_device *pdev, int bus_id)
 {
-        struct platform_device *pdev;
+        struct omap_i2c_bus_platform_data *pd;
         struct resource *res;
-        resource_size_t base, irq;
 
-        pdev = &omap_i2c_devices[bus_id - 1];
+        pd = pdev->dev.platform_data;
+        res = pdev->resource;
+        res[0].start = OMAP1_I2C_BASE;
+        res[0].end = res[0].start + OMAP_I2C_SIZE;
+        res[1].start = INT_I2C;
+        omap1_i2c_mux_pins(bus_id);
+
+        return platform_device_register(pdev);
+}
+
+static inline int omap2_i2c_add_bus(struct platform_device *pdev, int bus_id)
+{
+        struct resource *res;
+        resource_size_t *irq;
+
+        res = pdev->resource;
+
+        if (!cpu_is_omap44xx())
+                irq = omap2_i2c_irq;
+        else
+                irq = omap4_i2c_irq;
+
         if (bus_id == 1) {
-                res = pdev->resource;
-                if (cpu_class_is_omap1()) {
-                        base = OMAP1_I2C_BASE;
-                        irq = INT_I2C;
-                } else {
-                        base = OMAP2_I2C_BASE1;
-                        irq = INT_24XX_I2C1_IRQ;
-                }
-                res[0].start = base;
-                res[0].end = base + OMAP_I2C_SIZE;
-                res[1].start = irq;
+                res[0].start = OMAP2_I2C_BASE1;
+                res[0].end = res[0].start + OMAP_I2C_SIZE;
         }
 
-        if (cpu_class_is_omap1())
-                omap1_i2c_mux_pins(bus_id);
-        if (cpu_class_is_omap2())
-                omap2_i2c_mux_pins(bus_id);
+        res[1].start = irq[bus_id - 1];
+        omap2_i2c_mux_pins(bus_id);
+
+        /*
+         * When waiting for completion of a i2c transfer, we need to
+         * set a wake up latency constraint for the MPU. This is to
+         * ensure quick enough wakeup from idle, when transfer
+         * completes.
+         */
+        if (cpu_is_omap34xx()) {
+                struct omap_i2c_bus_platform_data *pd;
+
+                pd = pdev->dev.platform_data;
+                pd->set_mpu_wkup_lat = omap_pm_set_max_mpu_wakeup_lat;
+        }
 
         return platform_device_register(pdev);
 }
 
+static int __init omap_i2c_add_bus(int bus_id)
+{
+        struct platform_device *pdev;
+
+        pdev = &omap_i2c_devices[bus_id - 1];
+
+        if (cpu_class_is_omap1())
+                return omap1_i2c_add_bus(pdev, bus_id);
+        else
+                return omap2_i2c_add_bus(pdev, bus_id);
+}
+
 /**
  * omap_i2c_bus_setup - Process command line options for the I2C bus speed
  * @str: String of options
@@ -146,8 +206,8 @@ static int __init omap_i2c_bus_setup(char *str)
         get_options(str, 3, ints);
         if (ints[0] < 2 || ints[1] < 1 || ints[1] > ports)
                 return 0;
-        i2c_rate[ints[1] - 1] = ints[2];
-        i2c_rate[ints[1] - 1] |= OMAP_I2C_CMDLINE_SETUP;
+        i2c_pdata[ints[1] - 1].clkrate = ints[2];
+        i2c_pdata[ints[1] - 1].clkrate |= OMAP_I2C_CMDLINE_SETUP;
 
         return 1;
 }
@@ -161,9 +221,9 @@ static int __init omap_register_i2c_bus_cmdline(void)
 {
         int i, err = 0;
 
-        for (i = 0; i < ARRAY_SIZE(i2c_rate); i++)
-                if (i2c_rate[i] & OMAP_I2C_CMDLINE_SETUP) {
-                        i2c_rate[i] &= ~OMAP_I2C_CMDLINE_SETUP;
+        for (i = 0; i < ARRAY_SIZE(i2c_pdata); i++)
+                if (i2c_pdata[i].clkrate & OMAP_I2C_CMDLINE_SETUP) {
+                        i2c_pdata[i].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
                         err = omap_i2c_add_bus(i + 1);
                         if (err)
                                 goto out;
@@ -197,9 +257,10 @@ int __init omap_register_i2c_bus(int bus_id, u32 clkrate,
                         return err;
         }
 
-        if (!i2c_rate[bus_id - 1])
-                i2c_rate[bus_id - 1] = clkrate;
-        i2c_rate[bus_id - 1] &= ~OMAP_I2C_CMDLINE_SETUP;
+        if (!i2c_pdata[bus_id - 1].clkrate)
+                i2c_pdata[bus_id - 1].clkrate = clkrate;
+
+        i2c_pdata[bus_id - 1].clkrate &= ~OMAP_I2C_CMDLINE_SETUP;
 
         return omap_i2c_add_bus(bus_id);
 }