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authorSimon Arlott <simon@fire.lp0.eu>2007-05-11 15:40:30 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-05-20 15:10:32 -0400
commit6cbdc8c5357276307a77deeada3f04626ff17da6 (patch)
treee0a4190d816fa4efb6ddb331b859bf0d5eb9c1a3 /arch/arm/plat-omap/sram.c
parentfc432e1952a3899ce35e84b417e5d60f74cb901b (diff)
[ARM] spelling fixes
Spelling fixes in arch/arm/. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/plat-omap/sram.c')
-rw-r--r--arch/arm/plat-omap/sram.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index bc46f33aede3..1f23f0459e5f 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -59,8 +59,8 @@ extern unsigned long omapfb_reserve_sram(unsigned long sram_pstart,
59 59
60/* 60/*
61 * Depending on the target RAMFS firewall setup, the public usable amount of 61 * Depending on the target RAMFS firewall setup, the public usable amount of
62 * SRAM varies. The default accessable size for all device types is 2k. A GP 62 * SRAM varies. The default accessible size for all device types is 2k. A GP
63 * device allows ARM11 but not other initators for full size. This 63 * device allows ARM11 but not other initiators for full size. This
64 * functionality seems ok until some nice security API happens. 64 * functionality seems ok until some nice security API happens.
65 */ 65 */
66static int is_sram_locked(void) 66static int is_sram_locked(void)
@@ -71,7 +71,7 @@ static int is_sram_locked(void)
71 type = __raw_readl(VA_CONTROL_STAT) & TYPE_MASK; 71 type = __raw_readl(VA_CONTROL_STAT) & TYPE_MASK;
72 72
73 if (type == GP_DEVICE) { 73 if (type == GP_DEVICE) {
74 /* RAMFW: R/W access to all initators for all qualifier sets */ 74 /* RAMFW: R/W access to all initiators for all qualifier sets */
75 if (cpu_is_omap242x()) { 75 if (cpu_is_omap242x()) {
76 __raw_writel(0xFF, VA_REQINFOPERM0); /* all q-vects */ 76 __raw_writel(0xFF, VA_REQINFOPERM0); /* all q-vects */
77 __raw_writel(0xCFDE, VA_READPERM0); /* all i-read */ 77 __raw_writel(0xCFDE, VA_READPERM0); /* all i-read */