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authorLinus Torvalds <torvalds@linux-foundation.org>2009-12-12 14:40:13 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2009-12-12 14:40:13 -0500
commit9c3936cb694ffd559c80dc3eb75b61f769a39259 (patch)
treecc034c09e359e43b4ff01efabc7ce47602d80acf /arch/arm/plat-omap/sram.c
parent5de76b18d1a7193c49c1a4ee72261421a17de57c (diff)
parent5ccf197859d6f6bcf56e85657019503b2d95767a (diff)
Merge branch 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
* 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: (75 commits) omap3: Fix OMAP35XX_REV macros omap: serial: fix non-empty uart fifo read abort omap3: Zoom2/3: Update hsmmc board config params omap3 : Enable TWL4030 Keypad for Zoom2 and Zoom3 boards omap3: id code detection 3525 vs 3515 omap3: rx51: Use wl1251 in SPI mode 3 omap3: zoom2/3: make MMC slot work again omap1: htcherald: Update defconfig to include mux support omap1: LCD_DMA: Use some define rather than a hexadecimal omap: header: remove unused data-type omap: arch/arm/plat-omap/devices.c - sort alphabetically omap: Correcting GPMC_CONFIG1_DEVICETYPE_NAND OMAP3: serial - allow platforms specify which UARTs to initialize omap3: cm-t35: add mux initialization OMAP4: Sync up omap4430 defconfig OMAP4: Remove the secondary wait loop OMAP4: AuxCoreBoot registers only accessible in secure mode OMAP4: Fix SRAM base and size OMAP4: Fix cpu detection omap3: pandora: board file updates for .33 ...
Diffstat (limited to 'arch/arm/plat-omap/sram.c')
-rw-r--r--arch/arm/plat-omap/sram.c12
1 files changed, 9 insertions, 3 deletions
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index ad2bf07d30b5..d8d5094b37ed 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -48,8 +48,10 @@
48#define OMAP3_SRAM_VA 0xfe400000 48#define OMAP3_SRAM_VA 0xfe400000
49#define OMAP3_SRAM_PUB_PA 0x40208000 49#define OMAP3_SRAM_PUB_PA 0x40208000
50#define OMAP3_SRAM_PUB_VA (OMAP3_SRAM_VA + 0x8000) 50#define OMAP3_SRAM_PUB_VA (OMAP3_SRAM_VA + 0x8000)
51#define OMAP4_SRAM_PA 0x40200000 /*0x402f0000*/ 51#define OMAP4_SRAM_PA 0x40300000
52#define OMAP4_SRAM_VA 0xfe400000 /*0xfe4f0000*/ 52#define OMAP4_SRAM_VA 0xfe400000
53#define OMAP4_SRAM_PUB_PA (OMAP4_SRAM_PA + 0x4000)
54#define OMAP4_SRAM_PUB_VA (OMAP4_SRAM_VA + 0x4000)
53 55
54#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) 56#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
55#define SRAM_BOOTLOADER_SZ 0x00 57#define SRAM_BOOTLOADER_SZ 0x00
@@ -140,6 +142,10 @@ void __init omap_detect_sram(void)
140 } else { 142 } else {
141 omap_sram_size = 0x8000; /* 32K */ 143 omap_sram_size = 0x8000; /* 32K */
142 } 144 }
145 } else if (cpu_is_omap44xx()) {
146 omap_sram_base = OMAP4_SRAM_PUB_VA;
147 omap_sram_start = OMAP4_SRAM_PUB_PA;
148 omap_sram_size = 0xa000; /* 40K */
143 } else { 149 } else {
144 omap_sram_base = OMAP2_SRAM_PUB_VA; 150 omap_sram_base = OMAP2_SRAM_PUB_VA;
145 omap_sram_start = OMAP2_SRAM_PUB_PA; 151 omap_sram_start = OMAP2_SRAM_PUB_PA;
@@ -153,7 +159,7 @@ void __init omap_detect_sram(void)
153 } else if (cpu_is_omap44xx()) { 159 } else if (cpu_is_omap44xx()) {
154 omap_sram_base = OMAP4_SRAM_VA; 160 omap_sram_base = OMAP4_SRAM_VA;
155 omap_sram_start = OMAP4_SRAM_PA; 161 omap_sram_start = OMAP4_SRAM_PA;
156 omap_sram_size = 0x8000; /* 32K */ 162 omap_sram_size = 0xe000; /* 56K */
157 } else { 163 } else {
158 omap_sram_base = OMAP2_SRAM_VA; 164 omap_sram_base = OMAP2_SRAM_VA;
159 omap_sram_start = OMAP2_SRAM_PA; 165 omap_sram_start = OMAP2_SRAM_PA;