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authorDavid S. Miller <davem@davemloft.net>2008-12-15 23:03:50 -0500
committerDavid S. Miller <davem@davemloft.net>2008-12-15 23:03:50 -0500
commiteb14f019597cd86c21a6c601d7e900f40030c2e7 (patch)
tree36fb2f36a1747f98988f87215db1eef3a71d45eb /arch/arm/plat-omap/sram.c
parent9a4a84294b0d60b8c287131478f743ba2bc68949 (diff)
parenta3dd15444baa9c7522c8457ab564c41219dfb44c (diff)
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
Conflicts: drivers/net/e1000e/ich8lan.c
Diffstat (limited to 'arch/arm/plat-omap/sram.c')
-rw-r--r--arch/arm/plat-omap/sram.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 9f9a921829c0..dcd9d16da2e9 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -255,7 +255,7 @@ void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
255 if (!_omap_sram_reprogram_clock) 255 if (!_omap_sram_reprogram_clock)
256 omap_sram_error(); 256 omap_sram_error();
257 257
258 return _omap_sram_reprogram_clock(dpllctl, ckctl); 258 _omap_sram_reprogram_clock(dpllctl, ckctl);
259} 259}
260 260
261int __init omap1_sram_init(void) 261int __init omap1_sram_init(void)
@@ -282,8 +282,8 @@ void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
282 if (!_omap2_sram_ddr_init) 282 if (!_omap2_sram_ddr_init)
283 omap_sram_error(); 283 omap_sram_error();
284 284
285 return _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl, 285 _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl,
286 base_cs, force_unlock); 286 base_cs, force_unlock);
287} 287}
288 288
289static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val, 289static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val,
@@ -294,7 +294,7 @@ void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type)
294 if (!_omap2_sram_reprogram_sdrc) 294 if (!_omap2_sram_reprogram_sdrc)
295 omap_sram_error(); 295 omap_sram_error();
296 296
297 return _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type); 297 _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type);
298} 298}
299 299
300static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); 300static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);