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authorSyed Mohammed, Khasim <khasim@ti.com>2008-10-09 10:51:41 -0400
committerTony Lindgren <tony@atomide.com>2008-10-09 10:51:41 -0400
commitcc26b3b01bc96a8b8c36671b0dc4898b2a152ea8 (patch)
tree8cd836cd32a38c1a849837ab295eeaa3ec104336 /arch/arm/plat-omap/sram.c
parent2e7509e5b3acc4b8653faa1966e5ac234d36ac82 (diff)
ARM: OMAP3: Add minimal omap3430 support
Add minimal omap3430 support based on earlier patches from Syed Mohammed Khasim. Also merge in omap34xx SRAM support from Karthik Dasu and use consistent naming for sram init functions. Also do following changes that make 34xx support usable: - Remove unused sram.c functions for 34xx - Rename IRQ_SIR_IRQ to INTCPS_SIR_IRQ and define it locally in entry-macro.S - Update mach-omap2/io.c to support 2420, 2430, and 34xx - Also merge in 34xx GPMC changes to add fields wr_access and wr_data_mux_bus from Adrian Hunter - Remove memory initialization call omap2_init_memory() until until more generic memory initialization patches are posted. It's OK to rely on bootloader initialization until then. Signed-off-by: Syed Mohammed, Khasim <khasim@ti.com> Signed-off-by: Karthik Dasu<karthik-dp@ti.com> Signed-off-by: Adrian Hunter <ext-adrian.hunter@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/plat-omap/sram.c')
-rw-r--r--arch/arm/plat-omap/sram.c53
1 files changed, 17 insertions, 36 deletions
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index ac67eeb6ca6a..4d22452a0743 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -271,7 +271,7 @@ int __init omap1_sram_init(void)
271#define omap1_sram_init() do {} while (0) 271#define omap1_sram_init() do {} while (0)
272#endif 272#endif
273 273
274#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) 274#if defined(CONFIG_ARCH_OMAP2)
275 275
276static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, 276static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
277 u32 base_cs, u32 force_unlock); 277 u32 base_cs, u32 force_unlock);
@@ -352,23 +352,19 @@ static inline int omap243x_sram_init(void)
352 352
353#ifdef CONFIG_ARCH_OMAP3 353#ifdef CONFIG_ARCH_OMAP3
354 354
355static u32 (*_omap2_sram_reprogram_gpmc)(u32 perf_level); 355static u32 (*_omap3_sram_configure_core_dpll)(u32 sdrc_rfr_ctrl,
356u32 omap2_sram_reprogram_gpmc(u32 perf_level) 356 u32 sdrc_actim_ctrla,
357{ 357 u32 sdrc_actim_ctrlb,
358 if (!_omap2_sram_reprogram_gpmc) 358 u32 m2);
359 omap_sram_error(); 359u32 omap3_configure_core_dpll(u32 sdrc_rfr_ctrl, u32 sdrc_actim_ctrla,
360 360 u32 sdrc_actim_ctrlb, u32 m2)
361 return _omap2_sram_reprogram_gpmc(perf_level);
362}
363
364static u32 (*_omap2_sram_configure_core_dpll)(u32 m, u32 n,
365 u32 freqsel, u32 m2);
366u32 omap2_sram_configure_core_dpll(u32 m, u32 n, u32 freqsel, u32 m2)
367{ 361{
368 if (!_omap2_sram_configure_core_dpll) 362 if (!_omap3_sram_configure_core_dpll)
369 omap_sram_error(); 363 omap_sram_error();
370 364
371 return _omap2_sram_configure_core_dpll(m, n, freqsel, m2); 365 return _omap3_sram_configure_core_dpll(sdrc_rfr_ctrl,
366 sdrc_actim_ctrla,
367 sdrc_actim_ctrlb, m2);
372} 368}
373 369
374/* REVISIT: Should this be same as omap34xx_sram_init() after off-idle? */ 370/* REVISIT: Should this be same as omap34xx_sram_init() after off-idle? */
@@ -376,31 +372,16 @@ void restore_sram_functions(void)
376{ 372{
377 omap_sram_ceil = omap_sram_base + omap_sram_size; 373 omap_sram_ceil = omap_sram_base + omap_sram_size;
378 374
379 _omap2_sram_reprogram_gpmc = omap_sram_push(omap34xx_sram_reprogram_gpmc, 375 _omap3_sram_configure_core_dpll =
380 omap34xx_sram_reprogram_gpmc_sz); 376 omap_sram_push(omap3_sram_configure_core_dpll,
381 377 omap3_sram_configure_core_dpll_sz);
382 _omap2_sram_configure_core_dpll =
383 omap_sram_push(omap34xx_sram_configure_core_dpll,
384 omap34xx_sram_configure_core_dpll_sz);
385} 378}
386 379
387int __init omap34xx_sram_init(void) 380int __init omap34xx_sram_init(void)
388{ 381{
389 _omap2_sram_ddr_init = omap_sram_push(omap34xx_sram_ddr_init, 382 _omap3_sram_configure_core_dpll =
390 omap34xx_sram_ddr_init_sz); 383 omap_sram_push(omap3_sram_configure_core_dpll,
391 384 omap3_sram_configure_core_dpll_sz);
392 _omap2_sram_reprogram_sdrc = omap_sram_push(omap34xx_sram_reprogram_sdrc,
393 omap34xx_sram_reprogram_sdrc_sz);
394
395 _omap2_set_prcm = omap_sram_push(omap34xx_sram_set_prcm,
396 omap34xx_sram_set_prcm_sz);
397
398 _omap2_sram_reprogram_gpmc = omap_sram_push(omap34xx_sram_reprogram_gpmc,
399 omap34xx_sram_reprogram_gpmc_sz);
400
401 _omap2_sram_configure_core_dpll =
402 omap_sram_push(omap34xx_sram_configure_core_dpll,
403 omap34xx_sram_configure_core_dpll_sz);
404 385
405 return 0; 386 return 0;
406} 387}